CN112782725A

CN112782725A - High-precision GPS synchronization maintaining module

Info

Publication number: CN112782725A
Application number: CN202011617580.0A
Authority: CN
Inventors: 朱骏
Original assignee: Huaqing Ruida Tianjin Technology Co ltd
Current assignee: Huaqing Ruida Tianjin Technology Co ltd
Priority date: 2020-12-30
Filing date: 2020-12-30
Publication date: 2021-05-11

Abstract

The invention provides a high-precision GPS synchronization maintaining module, and relates to the field of electronic equipment. The high-precision GPS synchronization maintaining module comprises a GPS receiving module for receiving GPS signals, an FPGA plate for ascending GPS second pulses, a DAC converter for digital-to-analog conversion, a constant-temperature crystal oscillator with adjustable frequency, and a phase-locked loop (PLL) for synchronizing external input signals and internal oscillation signals, wherein the PLL is connected with the FPGA plate, and the GPS receiving module is electrically connected with the FPGA plate. The data model of the high-precision GPS synchronization keeping module after the constant-temperature crystal oscillator frequency needs to be processed through a phase-locked loop (PLL) again, and then data can be output.

Description

High-precision GPS synchronization maintaining module

Technical Field

The invention relates to the technical field of electronic equipment, in particular to a high-precision GPS synchronization keeping module.

Background

The electromagnetic method is a method for acquiring conductivity structure information of underground geologic bodies or ore bodies by acquiring the response of a ground medium to an injected electromagnetic field. Because of the generally good electrical conductivity of metal ores, electromagnetic prospecting is the most effective geophysical prospecting means to find metal ores. For electromagnetic prospecting, reliable electromagnetic prospecting instrumentation is not always available. In the development of electromagnetic prospecting instruments, the design of synchronization between a transmitter and a receiver is a very critical technology, and in actual field experiments, the receiver and the transmitter automatically transmit and receive signals according to a preset frequency table without manual operation, so that the synchronization of transmission and reception needs to be ensured, and the transmitter and the receiver need to be synchronized in time.

Regarding the time synchronization method, the most common method at present is to use GPS for synchronization. The same GPS chip is respectively adopted in the transmitter and the receiver, and because the GPS synchronization is not influenced by distance and terrain and the time accuracy of the GPS output is very high, the adoption of the GPS is a better synchronization mode. However, the existing GPS time synchronizer often ignores the problem of finding a satellite by the GPS, and has strong dependence on GPS signals, and most of them are designed on the premise that the GPS signals can be found without failure. Because the GPS satellite signal is affected by many factors during space propagation, the signal conditions are directly unsatisfactory. For example, in low signal noise such as indoor and forest, the phenomena of blocking, multipath and interference are serious, which results in that the power of the GPS signal received by the GPS receiving chip is seriously weakened. The number of satellites which can be acquired by the GPS chip is obviously reduced. When the number of satellites captured by the GPS chip is lower than a certain value, the GPS chip cannot accurately obtain the GPS time information. In addition, the GPS chip is easily influenced by the external environment, particularly, a disturbing signal is mixed with PPS (pulse per second) output by the GPS chip in a strong electromagnetic environment, so that the PPS is possibly disabled, and the device cannot normally operate.

The conventional synchronization method shown in fig. 2 is to receive data through a GPS receiving module, output a pulse per second through a PPS port of the GPS receiving module, count clock cycles in two rising edges of the pulse per second through an FPGA, record a phase difference, adjust an output frequency by calculating a voltage-controlled terminal voltage of an adjustable constant-temperature crystal oscillator, and then perform count comparison again through the FPGA until the output frequency of the constant-temperature crystal oscillator is synchronized with the GPS frequency.

Disclosure of Invention

Technical problem to be solved

In view of the deficiencies of the prior art, the present invention provides a high-precision GPS synchronization maintaining module to solve the problems set forth in the background art.

(II) technical scheme

In order to achieve the purpose, the invention is realized by the following technical scheme: a high-precision GPS synchronization maintaining module comprises a GPS receiving module for receiving GPS signals, an FPGA board for rising GPS second pulses, a DAC converter for digital-to-analog conversion, a constant temperature crystal oscillator with adjustable frequency, and a phase-locked loop (PLL) for synchronizing external input signals and internal oscillation signals, wherein the phase-locked loop (PLL) is connected with the FPGA board.

Preferably, the GPS receiving module is electrically connected with the FPGA board, the FPGA board is connected with the DAC converter, the DAC converter is communicated with the constant temperature crystal oscillator, and the phase-locked loop (PLL) is connected with the constant temperature crystal oscillator.

Preferably, the GPS receiving module is provided with a PPS port.

Preferably, the FPGA board can be used for calculating and adjusting the voltage-controlled terminal voltage adjustment output frequency of the constant-temperature crystal oscillator.

The invention provides a high-precision GPS synchronization maintaining module, which has the following beneficial effects:

1. this high accuracy GPS keeps in step module in the course of the work, and the data model after the constant temperature crystal oscillator frequency need be handled through phase-locked loop (PLL) once more, just can carry out the output of data afterwards, has positive, negative feedback between phase-locked loop (PLL) and the FPGA board to guarantee to supervise and monitor the data calibration process of FPGA board, in order to guarantee the data time synchronization even after satellite signal briefly loses.

2. The high-precision GPS synchronization keeping module can perform autonomous calibration work on the time signal when power failure occurs, and can still perform synchronization of time data and frequency under the condition that GPS signals of satellites are not received.

Drawings

FIG. 1 is a schematic flow chart of the present invention;

fig. 2 is a schematic diagram of a work flow of a conventional synchronization maintenance module.

Detailed Description

An embodiment of the present invention provides a high-precision GPS synchronization maintaining module, as shown in fig. 1-2, including a GPS receiving module for receiving a GPS signal, an FPGA board for rising GPS second pulses, a DAC converter for digital-to-analog conversion, a constant temperature crystal oscillator with an adjustable frequency, and a phase-locked loop (PLL) for synchronizing an external input signal with an internal oscillation signal, where the phase-locked loop (PLL) is connected to the FPGA board.

The GPS receiving module is electrically connected with the FPGA board, the FPGA board is connected with the DAC converter, the DAC converter is communicated with the constant temperature crystal oscillator, and the phase-locked loop (PLL) is connected with the constant temperature crystal oscillator.

The GPS receiving module is provided with a PPS port.

The FPGA board can be used for calculating and adjusting the voltage-controlled end voltage adjustment output frequency of the constant-temperature crystal oscillator.

The working principle is as follows: the GPS receiving module receives signals, the GPS receiving module transmits the received signals to the FPGA board in a pulse form, the PPS port can be used for outputting pulse per second, the FPGA board counts clock cycles in the rising edge of the pulse per second and records phase difference, the voltage-controlled terminal voltage of the constant-temperature crystal oscillator is adjusted and adjusted by calculation to adjust output frequency, then the FPGA board counts and compares the clock cycles again until the output frequency of the constant-temperature crystal oscillator is synchronous with the GPS frequency, in the process, the data model passing through the constant-temperature crystal oscillator frequency needs to be processed by a phase-locked loop (PLL) again, data can be output later, and positive and negative feedbacks are arranged between the PLL and the FPGA board to ensure that the data calibration process of the FPGA board is monitored and monitored, so that the data time synchronization even if the satellite signals are lost for a short time is ensured.

In addition, the time signal may be autonomously calibrated when power failure occurs, and the time data and frequency may be synchronized when GPS signals are not received from satellites.

The foregoing shows and describes the general principles and broad features of the present invention and advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims

1. The high-precision GPS synchronization maintaining module is characterized by comprising a GPS receiving module for receiving GPS signals, an FPGA board for rising GPS second pulses, a DAC (digital-to-analog converter) for digital-to-analog conversion, a constant-temperature crystal oscillator with adjustable frequency and a phase-locked loop (PLL) for synchronizing external input signals with internal oscillation signals, wherein the phase-locked loop (PLL) is connected with the FPGA board.

2. The high precision GPS synchronization maintenance module according to claim 1, wherein: the GPS receiving module is electrically connected with the FPGA board, the FPGA board is connected with the DAC converter, the DAC converter is communicated with the constant temperature crystal oscillator, and the phase-locked loop (PLL) is connected with the constant temperature crystal oscillator.

3. The high precision GPS synchronization maintenance module according to claim 1, wherein: the GPS receiving module is provided with a PPS port.

4. The high precision GPS synchronization maintenance module according to claim 1, wherein: the FPGA board can be used for calculating and adjusting the voltage-controlled end voltage adjustment output frequency of the constant-temperature crystal oscillator.