CN112769515A - Bidirectional time service and distance measurement system and method based on radio station - Google Patents
Bidirectional time service and distance measurement system and method based on radio station Download PDFInfo
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Abstract
The invention provides a two-way time service and distance measurement system based on a radio station, which comprises: the system comprises a panel unit, a unit module and an improved integrated service data unit module, wherein the panel unit and the improved integrated service data unit module perform data interaction; the unit module performs data interaction with the improved integrated service data unit module; the panel unit and the unit module perform data interaction; the improved integrated service data unit comprises a high-stability crystal oscillator unit, a TOD module and a high-speed AD adopting unit, and the precision of the timestamp information sent by the TOD module is improved through the high-stability crystal oscillator unit and the high-speed AD adopting unit. According to the invention, the high-stability crystal oscillator unit, the TOD module and the high-speed AD adopting unit are used in a matched manner, so that the accuracy of time service and distance measurement information is improved as much as possible under the condition that a satellite refuses.
Description
Technical Field
The invention relates to the technical field of wireless radio stations, in particular to a bidirectional time service and distance measurement system and method based on a wireless radio station.
Background
At present, almost all communication systems rely on a combined system based on satellites to acquire time service and distance measurement information, but satellite signals are easily interfered in urban, indoor, underground and other environments, so that the time service and distance measurement precision is reduced, and the measurement and time synchronization capacity is realized aiming at the satellite rejection environment and radio station signals.
Through retrieval, patent document CN109061674A discloses a system and method for continuously monitoring operation of a beidou system by using a low-earth satellite constellation, which includes the following steps: the method comprises the following steps: designing a low-orbit constellation consisting of forty to sixty satellites; step two: the low-orbit satellite realizes the real-time/quasi-real-time high-precision orbit determination of the low-orbit satellite through GNSS data and a satellite laser ranging method; step three: bidirectional time service is carried out on all the satellites of the low-orbit constellation through links between the Beidou central station and the low-orbit system, and time synchronization of all the low-orbit satellites and the Beidou system is realized; step four: and transmitting observation data of all LEO satellites back to the central station through the inter-satellite link. Although the prior art relates to bidirectional time service and distance measurement, the prior art utilizes the time service and the distance measurement, how to realize the bidirectional time service and the distance measurement is not described, and the technical effects of reducing the jitter of the transmission time delay and improving the timestamp precision of the transmission time cannot be realized.
Therefore, it is desirable to develop a two-way time service and distance measurement system and method based on a radio station to achieve the synchronization capability of measurement and time.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a bidirectional time service and distance measurement system and method based on a radio station, which adopt an IEEE 1588 protocol as a core idea and adopt technologies such as transmitting-receiving time delay calibration and the like to realize the time service measurement capability under the current signal system.
The invention provides a bidirectional time service and distance measurement system based on a radio station, which comprises: a panel unit, a unit module and an improved integrated service data unit module,
the panel unit and the improved integrated service data unit module perform data interaction;
the unit module performs data interaction with the improved integrated service data unit module;
the panel unit and the unit module perform data interaction;
the improved integrated service data unit comprises a high-stability crystal oscillator unit, a TOD module and a high-speed AD adopting unit, and the precision of the timestamp information sent by the TOD module is improved through the high-stability crystal oscillator unit and the high-speed AD adopting unit.
Preferably, the improved integrated service data unit further includes an IEEE 1588 protocol, and in a clock synchronization process through the IEEE 1588 protocol, a message exchanged between the master clock and the slave clock includes timestamp information.
Preferably, the time stamp is marked at the MII/GMII interface near the physical layer.
Preferably, the improved integrated service data unit further includes a synchronization module, where the FPGA in the synchronization module is used to implement a main control chip, and a controller in the MAC layer and a transceiver in the physical layer perform communication interaction between a bidirectional time service and a ranging system based on a radio station.
Preferably, the TOD module intercepts or timestamps the MII/GMII interface close to the physical layer, and the TSU unit in the TOD module is capable of timestamping the PTP message with 64 bits.
Preferably, the TSU unit includes therein:
register: reading a timestamp after adding a 64-bit timestamp to the PTP message;
receive/transmit timestamp marker: recording the time of the down counter when the start delimiter of the signal frame is detected by the interface adapter;
reception/transmission frame detector: analyzing the frame information and extracting the types of PTP frames;
receive/transmit MII/GMII interface adapter: a 64-bit timestamp data stream is converted to a 32-bit AXI stream or a 32-bit AXI stream is converted to a MII/GMII information stream.
Preferably, the improved integrated service data unit further comprises a PTP message processing and clock state machine, the PTP message processing and clock state machine comprises,
master clock state machine: judging that the local clock is a main clock by utilizing an optimal main clock algorithm, and starting the whole synchronization period when detecting the rising edge of the pps signal in an idle state;
the slave clock state machine: while in idle state, the slave node monitors the received data stream until it monitors that the sync packet begins the entire synchronization cycle.
The invention provides a bidirectional time service and distance measurement method based on a radio station, which comprises the following steps:
step 1: carrying out information processing and loading TOD information;
step 2: after loading TOD information, marking a time stamp at an MII/GMII interface close to a physical layer;
and step 3: when the signal arrives at the MII/GMII interface of the physical layer, sampling and marking are carried out through a sampling sequence generated by a local clock;
and 4, step 4: and the sampled and marked time stamp is absolutely symmetrical by using a time signal propagation path of a transceiver station, and all system errors are eliminated by bidirectional time transmission.
Preferably, the sampling frequency needs to be increased in step 3, and the approach for increasing the sampling frequency includes performing high-power interpolation by using an interpolation filter or by using a high-frequency sampling module.
Preferably, in step 4, when the synchronization system is a slave clock, the synchronization is completed by exchanging timestamp information and then adjusting the local clock and the master clock, and the adjustment process is divided into offset adjustment and frequency adjustment, where the offset adjustment is performed first and then the frequency adjustment is performed.
Compared with the prior art, the invention has the following beneficial effects:
1. according to the invention, the high-stability crystal oscillator unit, the TOD module and the high-speed AD adopting unit are used in a matched manner, so that the accuracy of time service and distance measurement information is improved as much as possible under the condition that a satellite refuses.
2. According to the invention, the marking position of the timestamp is close to the physical layer, so that the time information acquired in the IEEE 1588 clock synchronization process can reflect the actual message sending and receiving time, and further more accurate message transmission path delay and the time deviation of the master clock and the slave clock can be calculated.
3. The invention improves the precision of time marking by improving the sampling frequency.
4. The invention can obtain higher time synchronization precision and punctuality precision by adopting a high-precision clock source.
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Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a diagram of the system architecture of the present invention;
FIG. 2 is a diagram of the timestamp marking location in the present invention;
FIG. 3 is a block diagram of a synchronization module according to the present invention;
FIG. 4 is a block diagram of a TSU according to the present invention;
FIG. 5 is a software block diagram of a clock synchronization system according to the present invention;
FIG. 6 is a transition diagram of the master clock state machine in the present invention;
FIG. 7 is a transition diagram of the slave clock state machine in the present invention;
FIG. 8 is a schematic diagram of frequency adjustment in the present invention;
FIG. 9 is a hierarchy diagram of the loading of time information in the present invention;
FIG. 10 is a schematic diagram of the intersection point of multiple hyperbolas in the positioning system being the position of the target to be determined;
FIG. 11 is a diagram of sampling interval 12.5 μ s for active stations;
FIG. 12 is a graph of time error and signal-to-noise ratio for a hard sampling rate of 8MHz in accordance with the present invention;
FIG. 13 is a simplified diagram of two-way time alignment time service and ranging between two radio stations;
FIG. 14 is a schematic diagram of an embodiment of the present invention.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that it would be obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit of the invention. All falling within the scope of the present invention.
As shown in fig. 1, the present invention provides a two-way time service and distance measurement system based on a radio station, comprising: the system comprises a panel unit, a unit module and an improved integrated service data unit module, wherein the panel unit and the improved integrated service data unit module perform data interaction; the unit module performs data interaction with the improved integrated service data unit module; the panel unit and the unit module perform data interaction; the improved integrated service data unit comprises a high-stability crystal oscillator unit, a TOD module and a high-speed AD adopting unit, and the precision of the timestamp information sent by the TOD module is improved through the high-stability crystal oscillator unit and the high-speed AD adopting unit. The OCXO in the modified integrated services data unit module in fig. 1 represents a high-stability crystal oscillator unit, the TOD injection module represents a TOD module, and the high-speed AD represents a high-speed AD adoption unit.
The time service function is realized among the radio stations through a high-precision clock synchronization technology, and the position information of the unknown radio station is calculated according to the signal arrival time difference among different radio stations. The principle of the positioning method based on the arrival time difference of electric waves is that the same signal is transmitted to a plurality of base stations, and the time difference between different base stations is measured. Accordingly, a pair of hyperbolas with the two base stations as focal points is formed. The intersection point of the multiple hyperbolas in the positioning system is the position of the target to be obtained, as shown in fig. 10.
As shown in fig. 9, ideally, the time information acquired by both the time synchronization parties should be the instant time of the transmission and reception time. However, the sending unit needs to process the information layer, the MAC layer, and the physical layer by layer to send the information out, so the loading level of the time information is related to the marking precision of the sending time. As can be seen from the above section, the time information (TOD information) of the radio station is loaded in the information layer, and has a certain processing delay from the actual transmission time, which is relatively large and cannot represent the instant time of the transmission and reception time, but has a certain processing delay.
The closer the time information is loaded, the closer the time stamp is to the physical layer, the smaller the processing delay is, and the easier and more accurate estimation is. The radio station does not have a pseudo-random code system, and can not mark time on a physical layer by using a pseudo code, so that the clock information is loaded on an MAC layer closest to the physical layer, the jitter of transmission time delay is reduced, and the timestamp precision of the transmission moment is improved.
Currently, in an engineering project of IEEE 1588 time synchronization, there are two main implementation schemes: 1. a hardware timestamp based scheme. This scheme typically employs specialized processing chips, such as the DP83640 chip manufactured by national semiconductor corporation; 2. a purely software timestamping approach is employed to save costs.
In embedded software based clock synchronization schemes, the clock counter is implemented by the CPU's own counter. The time stamp acquisition point is located at the lowest layer of the whole software system, namely the interrupt layer. When the CPU sends a data packet, data to be sent are written into a sending buffer area of a network card chip, then a sending command is sent to the network card, and meanwhile, a counter value is read to serve as a sending timestamp of the data packet. However, the timestamp is not the actual time of the packet and the difference between the timestamp and the actual time of the packet is uncertain. The CPU receives a data packet by responding to network card interrupt, and reads a counter value as a receiving time stamp of the data packet in an interrupt processing program, wherein the time stamp is not the time stamp when the first bit of the data packet is received. Therefore, the product of the length of the packet and the time required to transmit each bit is also subtracted. Since the interrupt response time of the CPU is indeterminate, this timestamp is not yet the true time to receive the packet, and its uncertainty varies depending on the speed of the CPU and the operating system. If other data packets which are not processed by the CPU exist in the cache of the network card chip, the accuracy of the receiving timestamp is discounted greatly. With the increase of the network transmission rate, the uncertainty of the transmission delay of the communication link becomes smaller and smaller, which leads to the obvious increase of the influence of the precision of the time stamp on the synchronization precision. The accuracy of the timestamp itself is determined by the timestamp acquisition mode, and in the above scheme based on embedded software, the timestamp acquisition point is located between the network layer and the data link layer. If the time stamp acquisition point can be moved down between the MAC layer and the physical layer, the time stamp accuracy will be greatly improved, which can only be realized by hardware circuits.
Even if the deviation between the slave clock and the master clock can be calculated very accurately, accurate synchronization of the clocks cannot be achieved by only periodically correcting the slave clock. This is because the deviation between the two is zero after each correction, but the crystal frequencies of the driving clock counters do not completely coincide with each other. A slight difference between the actual frequencies of two oscillators with the same nominal frequency still results in a gradual increase of the slave and master clock deviations over time. This drift cannot be tolerated with high-precision synchronization. If the crystal oscillator frequency of the slave clock is adjusted to be completely the same as that of the master clock, an analog circuit, namely a clock oscillation source with a frequency adjusting function, can be adopted to drive the clock; digital circuits, i.e. hardware circuits, may also be used to implement an algorithm. The effect is equivalent to that an equivalent frequency-adjustable clock counter is built by adopting a crystal oscillator with non-adjustable frequency and a small number of digital circuits.
In comparison, the implementation of IEEE 1588 time synchronization by using digital circuit hardware is low in cost, and has greater flexibility and easy scalability. Therefore, the clock synchronization system based on the FPGA and the hardware description language (VHDL) is adopted in the project, the advantages of a hardware circuit in the aspects of obtaining the timestamp and rectifying the crystal oscillator frequency are exerted, and the clock synchronization precision is greatly improved.
5 types of transmission messages are defined in the IEEE 1588 protocol: synchronization messages (sync), follow messages (follow _ up), delay request messages (delay _ req), delay response messages (delay _ resp), and management messages (management). In the IEEE 1588 clock synchronization process, the interactive messages between the master clock and the slave clock contain time stamp information. The marking position of the time stamp determines the accuracy of the time.
As shown in fig. 2, the time stamp may be marked A, B, C at three locations, namely at the application layer, MAC layer and MII/GMII interface near the physical layer. But the marking position has advantages and disadvantages at the application layer, the MAC layer and the MII/GMII interface close to the physical layer, but the invention marks the timestamp at the MII/GMII interface close to the physical layer.
Mainly because the time stamping can be implemented entirely in software at the application level, which is the simplest implementation. However, the delay jitter of the protocol stack is large and the time offset between different systems is also between hundreds of microseconds to milliseconds, so the time synchronization accuracy is low. The time stamping at the MAC layer can also be implemented completely by software and jitter of protocol stack delay can be effectively avoided. The time precision of the mode can reach a delicate level. As shown in fig. 11, the receiving sampling frequency of the active station is 80kHz, and the sampling interval is 12.5 μ s, which cannot meet the requirement of time synchronization accuracy.
And the timestamp is marked at the MII/GMII interface close to the physical layer, and a combined software and hardware mode is adopted. The method also avoids the uncertainty caused by the delay of the protocol stack, and the time precision can be further improved to dozens of nanoseconds. That is to say, the closer the mark position of the timestamp is to the physical layer, the more the time information acquired in the IEEE 1588 clock synchronization process can reflect the actual message sending and receiving time, and further the more accurate message transmission path delay and the time deviation of the master clock and the slave clock are calculated.
The following two approaches are used to increase the receiving sampling rate:
(1) high-power interpolation is carried out through an interpolation filter, and the sampling precision is improved
In the field of digital signal processing, the research of an online interpolation algorithm is mature. And if the interpolation is carried out by I times, the spectrum of the interpolated signal is the spectrum obtained by I times compressing the original spectrum. If the signal sampling rate is increased by I times, I-1 images are inevitably generated in a frequency domain, the high-frequency components are filtered by a low-pass filter, and the distortion is not generated after the signal is interpolated.
(2) And a high-frequency sampling module is adopted through hardware modification.
As shown in FIG. 11, the original 80KHz sampling frequency is increased to 8MHz by the high-frequency sampling module, the sampling interval is 12.5ns, and as shown in FIG. 12, the sampling precision can reach 62.5ns by simulation acceptance.
The clock synchronization hardware system comprises a power supply module, a serial port module, a high-stability crystal oscillator unit and a synchronization module. In the synchronization module, the FPGA is used to implement the main control chip, and the MAC controller and the physical layer transceiver are used to implement the communication interaction between the systems. The structure block diagram of the synchronization module is shown in fig. 3.
The TOD module is used for intercepting or covering time marks at an MII interface close to a physical layer. The TSU unit can add a 64-bit time stamp to the PTP message, and its structural diagram is shown in fig. 4.
The register set in FIG. 4 enables the reading of timestamps; the receiving/sending time stamp marker records the time of the down counter when the starting delimiter of the signal frame is detected by the interface adapter; the receiving/transmitting frame detector analyzes the frame information and extracts the type of the PTP frame; the MII/GMII receive/transmit interface adapter converts a data stream into a 32-bit AXI stream or converts a 32-bit AXI stream into a MII/GMII information stream.
The software framework of the clock synchronization system is shown in fig. 5, and the whole system mainly comprises a data processing and state machine part, a PTP message transmitting and receiving part, a local clock adjusting algorithm part and the like.
Then the PTP message handling and clock state machines include a master clock state machine and a slave clock state machine.
As shown in fig. 6, the master clock state machine determines that the local clock is the master clock by using a best master clock algorithm (BMC), and the master clock transitions in more detail. in idle state, when the rising edge of the pps signal is detected, the entire synchronization period is started. First, the reading operation of the ADC is started, and when the AD _ ready is equal to '1', it is determined that the data of the ADC is ready, and then the data is read and saved. Then, a SYNC state is entered, in which the master node sends a SYNC packet to the slave node, and then the module enters a SYNC _ wait state. After a fixed period of time, the module enters a FOLLOW state, in which the master node sends a FOLLOW _ UP synchronization packet to the slave node. The module then goes to after _ follow _ wait, and after a fixed time, the module goes to DELAY _ REQ _ pre, in which state the master informs the slave that a DELAY _ REQ packet can be sent. After that, the module waits for the DELAY _ REQ packet, and if the DELAY _ REQ packet is not waited for a long time, namely the module waits for timeout, the module returns to the idle state; if the DELAY _ REQ packet is received, the master node transmits DELAY _ RESP to the slave node. Finally, after a period of time, the module returns to idle state.
As shown in fig. 7, when the slave clock state machine is in idle state, the slave node monitors the received data stream until entering wait _ follow state immediately after monitoring the sync packet. In the wait _ follow state, the slave node also monitors the received data stream until following the detection of a follow _ up packet, immediately enters the wait _ pre state, and returns the wait timeout to the idle state if no follow _ up packet is received for a long time in this state. Similarly, in the wait _ pre state, jumping into the delay _ req state until a delay _ req _ pre packet is monitored; if the wait times out, an idle state is returned. In the delay _ req state, the slave node immediately enters the wait _ delay _ resp state after transmitting a delay _ req packet to the master node. In the wait _ delay _ resp state, after a delay _ resp packet is monitored, the slave node immediately enters a phase _ clock state; if the delay _ resp packet is not monitored for a long time, the idle state is returned. In the phase _ clock state, the wait _ phase _ result state is entered immediately after the phase difference calculation module is started. In the wait _ phase _ result state, after a phase measurement result is ready, entering a delay _ focus state; if the phase result is not ready for a long time or the phase result is wrong, an idle state is returned. In the delay _ focus state, the wait _ result state is entered after the offset calculation module is turned on. In the wait _ result state, when detecting that an offset measurement result is ready, entering an offset _ update state; otherwise, the idle state is returned. In the offset _ update state, the slave node clock synchronization protocol sends an offset correction signal to the local clock module, thereby updating the local clock of the slave node, and then enters an idle state.
Those skilled in the art will appreciate that, in addition to implementing the system and its various devices, modules, units provided by the present invention as pure computer readable program code, the system and its various devices, modules, units provided by the present invention can be fully implemented by logically programming method steps in such a manner as to implement the same functions in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Therefore, the system and various devices, modules and units thereof provided by the invention can be regarded as a hardware component, and the devices, modules and units included in the system for realizing various functions can also be regarded as structures in the hardware component; means, modules, units for performing the various functions may also be regarded as structures within both software modules and hardware components for performing the method.
And then, local clock regulation is carried out, when the synchronous system is a slave clock, timestamp information is required to be exchanged, then the local clock is regulated to complete synchronization with the master clock, the regulation process is divided into two steps, namely offset regulation and frequency regulation, wherein the offset regulation is firstly carried out, and then the frequency regulation is carried out.
The slave clock needs to be synchronized with the master clock for multiple times to achieve small clock deviation, the deviation is large when the slave clock is adjusted for the first time, and therefore when 5 times of master-slave synchronization is started, the local clock is set to be the time information t in Follow Up1After 5 more synchronizations, the local clock will go throughThe time deviation value obtained by calculation is sent to a second register and a nanosecond register to realize deviation adjustment, and microsecond time setting precision can be achieved between the master and the slave after deviation adjustment. And then, during each synchronization, the frequency of the local clock is adjusted, and after the frequency is adjusted, the nanosecond-level time synchronization precision between the master clock and the slave clock can be achieved.
1. For offset adjustment
PTP time data consists of second and nanosecond registers, the second register and the nanosecond register are respectively used for storing time information, and the values of the two registers are not less than 0 and cannot exceed 10 due to the fact that subtraction operation is involved in the calculation process9Thus, the register is adjusted as shown in Table 1. after the offset is calculated, the PTP local clock subtracts the offset from the current time to complete a synchronization.
TABLE 1 offset calculation
| Nanosecond register | Second register | |
| Nanosecond register ≥ 109 | -109 | +1 |
| Nanosecond register no more than 109 | +109 | -1 |
| Nanosecond register<0&&Second register>0 | -109 | +1 |
| Nanosecond register>0&&Second register<0 | +109 | -1 |
2. Algorithm for frequency adjustment
After offset adjustment, the time deviation between the PTP local clock and the main clock is in a microsecond level. Since the master and slave clocks have different frequencies, the synchronization accuracy cannot be further improved by only adjusting the offset, so that the local clock frequency needs to be changed by a frequency adjustment algorithm to be consistent with the frequency of the master clock, and the frequency adjustment principle is shown in fig. 8.
Under an active ultrashort wave communication system, the one-way time transmission cannot estimate the signal propagation time, and the distance measurement cannot be carried out. When the two stations are 3km apart, the propagation delay is approximately 3 mus, so the propagation delay is not negligible when the high precision time is transferred. When the time signal propagation paths of the transceiver station are absolutely symmetrical, all system errors can be eliminated through bidirectional time transmission, which is the advantage of the bidirectional time transmission technology from a method system and is the main reason for the method to obtain high precision. The moving speed of the terrestrial station is slow, and even if the vehicle-mounted station moves at a speed of 72km/h, the moving distance of 1 second is 20m, and the variation of the propagation delay caused by the movement is 6.7ns, as shown in fig. 13.
As shown in fig. 14, the time-frequency reference source of the active radio station is a crystal oscillator, the precision is only 10-6, that is, 1 μ s jitter exists every 1 second, and the time keeping capability is poor. If higher time synchronization precision and timekeeping precision are required, a clock source with higher precision is required. Therefore, it is considered to add an external interface to the TOD module. The TOD module has the following external interfaces:
(1) the high-precision constant-temperature crystal oscillator interface is externally connected with a crystal oscillator with the time precision of 108-109 ppm, and corresponds to the precision of 1-10 ns.
(2) The B code interface can access time information such as B codes generated by other time service signals such as a high-precision atomic clock and an optical fiber.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.
Claims (10)
1. A two-way time service and range finding system based on radio station, characterized by that, includes: a panel unit, a unit module and an improved integrated service data unit module,
the panel unit and the improved integrated service data unit module perform data interaction;
the unit module and the improved integrated service data unit module perform data interaction;
the panel unit and the unit module perform data interaction;
the improved integrated service data unit comprises a high-stability crystal oscillator unit, a TOD module and a high-speed AD adopting unit, and the precision of the timestamp information sent by the TOD module is improved through the high-stability crystal oscillator unit and the high-speed AD adopting unit.
2. The system of claim 1, wherein the improved integrated service data unit further comprises an IEEE 1588 protocol, and timestamp information is included in a message exchanged between the master clock and the slave clock in a clock synchronization process according to the IEEE 1588 protocol.
3. A radio-based two-way time and range system as claimed in claim 2, wherein the time stamp is marked at the MII/GMII interface near the physical layer.
4. The system of claim 1, wherein the improved integrated service data unit further comprises a synchronization module, the FPGA of the synchronization module is used to implement a main control chip, and the controller of the MAC layer and the transceiver of the physical layer perform communication interaction between the two-way time service and the ranging system based on the radio station.
5. The system of claim 1, wherein the TOD module intercepts or timestamps the MII/GMII interface near the physical layer, and the TSU unit in the TOD module is capable of timestamp PTP messages with 64 bits.
6. The system of claim 5, wherein the TSU unit comprises:
register: reading a timestamp after adding a 64-bit timestamp to the PTP message;
receive/transmit timestamp marker: recording the time of the down counter when the start delimiter of the signal frame is detected by the interface adapter;
reception/transmission frame detector: analyzing the frame information and extracting the types of PTP frames;
receive/transmit MII/GMII interface adapter: a 64-bit timestamp data stream is converted to a 32-bit AXI stream or a 32-bit AXI stream is converted to a MII/GMII information stream.
7. The two-way time service and ranging system according to claim 1, wherein the modified ISDN further comprises a PTP message processing and clock state machine, the PTP message processing and clock state machine comprising,
master clock state machine: judging that the local clock is a main clock by utilizing an optimal main clock algorithm, and starting the whole synchronization period when detecting the rising edge of the pps signal in an idle state;
the slave clock state machine: while in idle state, the slave node monitors the received data stream until it monitors that the sync packet begins the entire synchronization cycle.
8. A bidirectional time service and distance measurement method based on a radio station is characterized by comprising the following steps:
step 1: carrying out information processing and loading TOD information;
step 2: after loading TOD information, marking a time stamp at an MII/GMII interface close to a physical layer;
and step 3: when the signal arrives at the MII/GMII interface of the physical layer, sampling and marking are carried out through a sampling sequence generated by a local clock;
and 4, step 4: and the sampled and marked time stamp is absolutely symmetrical by using a time signal propagation path of a transceiver station, and all system errors are eliminated by bidirectional time transmission.
9. The method as claimed in claim 8, wherein the sampling frequency in step 3 needs to be increased, and the step of increasing the sampling frequency includes performing high-power interpolation by using an interpolation filter or by using a high-frequency sampling module.
10. The two-way time service and distance measurement method based on wireless radio station as claimed in claim 8, wherein in step 4, when the synchronization system is a slave clock, the synchronization is completed by exchanging timestamp information and then adjusting the local clock and the master clock, and the adjustment process is divided into offset adjustment and frequency adjustment, wherein the offset adjustment is performed first and then the frequency adjustment is performed.
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