CN112768435A - Test key structure - Google Patents
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- CN112768435A CN112768435A CN201911086116.0A CN201911086116A CN112768435A CN 112768435 A CN112768435 A CN 112768435A CN 201911086116 A CN201911086116 A CN 201911086116A CN 112768435 A CN112768435 A CN 112768435A
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- 238000012360 testing method Methods 0.000 title claims abstract description 95
- 239000004020 conductor Substances 0.000 claims abstract description 47
- 239000000463 material Substances 0.000 claims abstract description 7
- 210000003739 neck Anatomy 0.000 claims description 125
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 229920005591 polysilicon Polymers 0.000 claims description 5
- 229910021332 silicide Inorganic materials 0.000 claims description 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 8
- 238000010998 test method Methods 0.000 description 5
- 238000007664 blowing Methods 0.000 description 4
- 238000001514 detection method Methods 0.000 description 4
- 238000004458 analytical method Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B7/00—Measuring arrangements characterised by the use of electric or magnetic techniques
- G01B7/02—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width or thickness
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Automation & Control Theory (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The invention discloses a test key structure, which comprises a conductor material layer defining at least one test area, wherein the test area comprises a central part, a first sub-part, a second sub-part, a first narrow neck part and a second narrow neck part, the first sub-part is arranged corresponding to two opposite first ends of the central part and is connected with the first sub-part and the first end through the first narrow neck part extending along a first direction, the second sub-part is arranged corresponding to two opposite second ends of the central part and is connected with the second sub-part and the second end through the second narrow neck part extending along a second direction; the first upper conductor layer is arranged above the central part and is electrically connected to the central part through a first through hole contact; the second upper conductor layer is disposed above the first sub-portion and the second sub-portion, and is electrically connected to the first sub-portion and the second sub-portion through a second via contact. The test key structure can be applied to detecting the manufacturing process latitude of the electric fuse pattern.
Description
Technical Field
The invention relates to a test key structure, in particular to a test key structure applied to detecting the manufacturing process latitude of an electric fuse pattern.
Background
With the miniaturization and complexity of semiconductor manufacturing processes, semiconductor devices are more susceptible to various defects or impurities, and the failure of a single metal line, a diode, a transistor, or the like often constitutes a defect of the entire chip. Therefore, to solve this problem, the current technology forms fusible links (efuses) in the integrated circuit to ensure the availability of the integrated circuit. Generally, electrical fuses connect redundant circuits (redundancy circuits) in an integrated circuit, and these connections can be used to repair or replace defective circuits once they are detected as defective.
For the current application, how to select the thickness and width of the electrical fuse to consider whether the chip has an appropriate resistance value during the use and whether the circuit can be effectively blocked during the blowing (blow) has an absolute relationship with the performance and application of the product.
Disclosure of Invention
The invention provides a test key structure which can be applied to detecting the manufacturing process tolerance of an electric fuse pattern so as to reduce the fault analysis period of the fusing problem of the electric fuse.
The test key structure provided by the invention is applied to detecting the manufacturing process tolerance of the electric fuse pattern, and comprises a conductor material layer, a first upper conductor layer, a plurality of first through hole contacts, a second upper conductor layer and a plurality of second through hole contacts. The conductor material layer defines at least one test area, each test area comprises a central part, two first sub-parts, two second sub-parts, two first narrow neck parts and two second narrow neck parts, wherein the central part is provided with two opposite first ends and two opposite second ends, the two first sub-parts are respectively arranged corresponding to the two first ends, the two second sub-parts are respectively arranged corresponding to the two second ends, the two first narrow neck parts are respectively connected with the two first sub-parts to the two first ends, the central part is arranged between the two first sub-parts, the two first narrow neck parts extend along a first direction, the two second narrow neck parts are respectively connected with the two second sub-parts to the two second ends, the central part is arranged between the two second sub-parts, and the two second narrow neck parts extend along a second direction; the first upper conductor layer is arranged above the central part, and the first upper conductor layer and the central part are electrically connected through a first through hole contact; the second upper conductor layer is arranged above the two first sub-portions and the two second sub-portions, and is electrically connected to the two first sub-portions and the two second sub-portions through second through hole contacts.
In an embodiment of the invention, a material of the conductive material layer includes a metal, a metal silicide, a polysilicon, or a combination thereof.
In an embodiment of the invention, one of the first upper conductive layer and the second upper conductive layer is connected to a voltage source.
In an embodiment of the invention, a pre-detection voltage is applied through the voltage source, and the resistance values of the two first narrow neck portions and the two second narrow neck portions are pre-detected.
In an embodiment of the invention, a programming voltage is applied by the voltage source, and the resistance values of the two first narrow necks and the two second narrow necks are detected to determine whether at least one of the two first narrow necks or at least one of the two second narrow necks has been blown.
In an embodiment of the invention, widths of the first narrow neck portion and the second narrow neck portion are the same, and the widths of the first narrow neck portion and the second narrow neck portion correspond to a width of the electrical fuse pattern.
In an embodiment of the invention, the widths of the first narrow neck portion and the second narrow neck portion are smaller than the widths of the central portion, the first sub-portion and the second sub-portion.
In an embodiment of the invention, the first direction is perpendicular to the second direction.
In an embodiment of the invention, the central portion, the two first sub-portions, the two second sub-portions, the two first narrow neck portions and the two second narrow neck portions form a cross arrangement, and the central portion is located at a staggered center of the cross arrangement.
In an embodiment of the invention, the conductive material layer defines a plurality of test regions, the test regions are arranged in an array having a plurality of rows and a plurality of columns, the rows are along a first direction, and the columns are along a second direction.
In an embodiment of the invention, in the test areas of each row, adjacent test areas share one of the first sub-portions, and in the test areas of each column, adjacent test areas share one of the second sub-portions.
In an embodiment of the invention, in the test areas of each row, a first sub-portion of each of the adjacent test areas is connected, and in the test areas of each column, a second sub-portion of each of the adjacent test areas is connected.
In an embodiment of the invention, the widths of the first narrow necks in the test areas of different rows have different dimensions.
In an embodiment of the invention, the widths of the second narrow necks in the test areas of different columns have different dimensions.
In an embodiment of the invention, the widths of the first narrow necks in the test areas of the same row have different dimensions.
In an embodiment of the invention, the widths of the second narrow necks in the test areas of the same column have different dimensions.
The invention adopts the conductor material layer of the test key structure to have the central part, the first sub-part and the second sub-part, and the first narrow neck part between the central part and the first sub-part and the second narrow neck part between the central part and the second sub-part have different sizes and different directions, so after the pre-detection program and the fusing detection program are carried out, the upper limit allowable value and the lower limit allowable value of the electric fuse pattern can be obtained according to the detection result and the corresponding width of the first narrow neck part/the second narrow neck part, and further, the manufacturing process tolerance of the electric fuse pattern is deduced, so that the fault analysis period of the fusing problem of the electric fuse is obviously reduced.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1 is a schematic top view of a test key structure according to an embodiment of the present invention;
FIG. 2 is a schematic top view of a test key structure according to another embodiment of the present invention.
Description of the symbols
10. 10A: test key structure
12. 12A: layer of conductive material
14: via contact layer
16: an upper conductor layer
18: center part
181. 181': first end
182. 182': second end
20. 20': the first sub-part
22. 22': the second sub-part
24. 24': the first narrow neck part
26. 26': second narrow neck part
D1: a first direction
D2: second direction
W1, W2: width of
28: first via contact
30: second through hole contact
32: first upper conductor layer
34: second upper conductor layer
36: conducting wire structure
T: test area
L1: first row
L2: second row
L3: third row
L4: fourth line
L5: the fifth element
L6: line six
L7: line seven
Detailed Description
Fig. 1 is a top view of a test key structure according to an embodiment of the present invention, and as shown in fig. 1, a test key structure 10 includes a conductive material layer 12, a via contact layer 14, and an upper conductive layer 16. The conductive material layer 12 defines at least one testing region, and fig. 1 illustrates only one testing region defined for the conductive material layer 12, wherein the conductive material layer 12 in the single testing region includes a central portion 18, two first sub-portions 20, 20 ', two second sub-portions 22, 22', two first narrow neck portions 24, 24 ', and two second narrow neck portions 26, 26'. The central portion 18 has a diamond or rectangular shape, for example, and has two first ends 181, 181 'opposite to each other and two second ends 182, 182' opposite to each other; the two first sub-portions 20, 20 'are respectively disposed corresponding to the two first ends 181, 181' of the central portion 18, for example, the two first sub-portions 20, 20 'are respectively disposed at the front side and the rear side of the central portion 18, the two second sub-portions 22, 22' are respectively disposed corresponding to the two second ends 182, 182 'of the central portion 18, for example, the two second sub-portions 22, 22' are respectively disposed at the left side and the right side of the central portion 18; the two first narrow neck portions 24, 24 ' respectively connect the two first sub-portions 20, 20 ' to the two first ends 181, 181 ' of the central portion 18, so that the central portion 18 is located between the two first sub-portions 20, 20 ', and the two first narrow neck portions 24, 24 ' extend along a first direction D1; the two second narrow neck portions 26, 26 ' connect the two second sub-portions 22, 22 ' to the two second ends 182, 182 ', respectively, such that the central portion 18 is located between the two second sub-portions 22, 22 ', and the two second narrow neck portions 26, 26 ' extend along a second direction D2. In one embodiment, the width W1 of the first narrowed neck portion 24, 24 'and the width W2 of the second narrowed neck portion 26, 26' are less than the width of the central portion 18, the first sub-portion 20, 20 'and the second sub-portion 22, 22'.
In one embodiment, the first sub-portions 20, 20 'and the second sub-portions 22, 22' are substantially in the shape of a five-sided arrow, each having a tip point, wherein the first narrow neck portions 24, 24 'are connected to the tip points of the first sub-portions 20, 20' and the first ends 181, 181 'of the central portion 18, and the second narrow neck portions 26, 26' are connected to the tip points of the second sub-portions 22, 22 'and the second ends 182, 182' of the central portion 18. Preferably, the first direction D1 along which the first narrow neck portions 24, 24 'are perpendicular to the second direction D2 along which the second narrow neck portions 26, 26' are located, such that the central portion 18, the two first sub-portions 20, 20 ', the two second sub-portions 22, 22', the two first narrow neck portions 24, 24 'and the two second narrow neck portions 26, 26' are arranged in a cross shape, and the central portion 18 is located at the staggered center of the cross shape.
The material of the conductive material layer 12 includes metal, metal silicide, polysilicon or a combination thereof; in one embodiment, the conductive material layer 12 may be formed by a polysilicon layer and a metal silicide layer on the polysilicon layer.
Continuing with the above description, the via contact layer 14 may include a first via contact 28 and a second via contact 30, and the upper conductor layer 16 may include a first upper conductor layer 32 and a second upper conductor layer 34. The first upper conductor layer 32 is disposed above a portion of the central portion 18, and the first via contact 28 is disposed between the first upper conductor layer 32 and the central portion 18 to electrically connect the central portion 18 and the first upper conductor layer 32 through the first via contact 28. The second upper conductive layer 34 can be separated into four regions, which are respectively disposed above partial regions of the two first sub-portions 20, 20 'and above partial regions of the two second sub-portions 22, 22', and the second via contact 30 is disposed between the second upper conductive layer 34 and the first sub-portions 20, 20 '/second sub-portions 22, 22', so as to electrically connect the first sub-portions 20, 20 '/second sub-portions 22, 22' and the second upper conductive layer 34 through the second via contact 30. In one embodiment, a conductive line structure 36, such as a copper line layer, may be further included to electrically connect the second upper conductive layers 34 corresponding to the first sub-portions 20, 20 'and the second sub-portions 22, 22'. In one embodiment, the first via contact 28 and the second via contact 30 are, for example, tungsten plug structures.
The test key structure 10 of the embodiment of the present invention is mainly used to detect the manufacturing process latitude of the electrical fuse pattern, in one embodiment, the width W1 of the first narrowed neck 24, 24 'and the width W2 of the second narrowed neck 26, 26' in the single test area are the same, and the width W1 and the width W2 are designed to correspond to the width of the electrical fuse pattern, it should be understood that the shape of the electrical fuse pattern may be generally i-shaped, having a narrow neck portion, the width W1 of the first narrow neck portion 24, 24 'and the width W2 of the second narrow neck portion 26, 26' of the test key structure 10 of the present embodiment are designed to correspond to the width of the narrow neck portion of the electrical fuse pattern, the width W1 of the first narrow neck portion 24, 24 'and the width W2 of the second narrow neck portion 26, 26' are tested for appropriateness through the pre-test procedure and the fuse test procedure described later to obtain the process latitude of the narrow neck portion of the electrical fuse pattern.
As described above, one of the first upper conductive layer 32 and the second upper conductive layer 34 is connected to a voltage source (not shown). In one embodiment, one of the first upper conductive layer 32 and the second upper conductive layer 34 serves as an anode, and the other serves as a cathode. For example, with the first upper conductor layer 32 as an anode and the second upper conductor layer 34 as a cathode, when a voltage is applied by a voltage source, a current flows from the first upper conductor layer 32 to the second upper conductor layer 34 through the first via contact 28, the central portion 18, the first narrow neck portion 24, 24 '/the second narrow neck portion 26, 26', the first sub-portion 20, 20 '/the second sub-portion 22, 22', for example, wherein when a larger instantaneous current flows through the first narrow neck portion 24, 24 '/the second narrow neck portion 26, 26', the first narrow neck portion 24, 24 '/the second narrow neck portion 26, 26' may be blown, and the current required for blowing may not be the same depending on the thickness of the first narrow neck portion 24, 24 '/the second narrow neck portion 26, 26'.
Fig. 2 is a top view of a test key structure according to another embodiment of the present invention, and as shown in fig. 2, a test key structure 10A includes a conductive material layer 12A, a via contact layer 14 and an upper conductive layer 16, wherein the conductive material layer 12A defines a plurality of test regions T arranged in an array having a plurality of rows and a plurality of columns, and in one embodiment, each row is defined along a first direction D1 and each column is defined along a second direction D2. As shown in fig. 2, among the plurality of test regions T on each row, the adjacent test regions T may share one first sub-section (20 or 20 ') or combine two by two a first sub-section (20 or 20') adjacent to each other, and among the plurality of test regions T on each column, the adjacent test regions T may share one second sub-section (22 or 22 ') or combine two by two a second sub-section (22 or 22') adjacent to each other. As for the structure and arrangement of the via contact layer 14 and the upper conductor layer 16, which are the same as those of the embodiment shown in fig. 1, the first upper conductor layer 32 is disposed above the central portion 18, and the central portion 18 and the first upper conductor layer 32 are electrically connected through the first via contact 28; the second upper conductor layer 34 is disposed above the first sub-portions 20, 20 'and the second sub-portions 22, 22', and electrically connects the first sub-portions 20, 20 '/the second sub-portions 22, 22' and the second upper conductor layer 34 through the second via contact 30.
In fig. 2, the plurality of test areas T are arranged in an array having seven rows and seven columns, and for convenience of description, the plurality of test areas T are defined by a left and right direction as a first row L1, a second row L2, a third row L3, a fourth row L4, a fifth row L5, a sixth row L6, and a seventh row L7. In one embodiment, the width W1 of the first narrow neck portion 24/24 'of the test region T in the fourth row L4 is designed to be a nm, the width W1 of the first narrow neck portion 24/24' of the test region T in the fifth row L5, the sixth row L6 and the seventh row L7 sequentially arranged from the fourth row L4 to the right is sequentially increased by 1nm, the width W1 of the third row L3, the second row L638 and the first narrow neck portion 24/24 'of the test region T in the first row L4 to the left sequentially arranged from the fourth row L4 is sequentially decreased by 1nm, that is, the width W1 of the first narrow neck portion 24/24' of the test region T in the first row L1 to the seventh row L7 is sequentially (a-3) nm, (a-2) nm, (a-1) nm, a-3 nm, (a +1) nm, (a +2) nm and (a +2) nm. However, the arrangement of the first narrow necks 24/24 ' and the second narrow necks 26/26 ' with different preset widths is not limited thereto, and in an embodiment, the widths W2 of the second narrow necks 26/26 ' in different columns of the test areas T may have different sizes, or the widths W1 of the first narrow necks 24/24 ' in the test areas T in the same row may have different sizes, or the widths W2 of the second narrow necks 26/26 ' in the test areas T in the same column may have different sizes. The array size of the test regions T in the array form may be designed according to the size of the scribe line on the semiconductor structure, and may be further applied to the process latitude detection of the electrical fuse pattern in the 65nm, 55nm, 40nm or 28nm manufacturing process.
As described above, when performing the pre-test procedure on the test key structure 10A having the first narrow neck portion 24/24 'and the second narrow neck portion 26/26' with different widths, the voltage source applies a pre-test voltage to provide a smaller current to the first narrow neck portion 24/24 'and the second narrow neck portion 26/26', and pre-tests the resistance of the first narrow neck portion 24/24 'and the second narrow neck portion 26/26'. If it is pre-detected that the resistance of the portion of the first narrow neck portion 24/24 'and/or the second narrow neck portion 26/26' is too large (e.g., infinity), indicating that the portion of the first narrow neck portion 24/24 'and/or the second narrow neck portion 26/26' is blown, since the applied current is small, the portion of the first narrow neck portion 24/24 'and/or the second narrow neck portion 26/26' with too small width can be preliminarily screened out, and the width corresponding to the blown portion of the first narrow neck portion 24/24 'and/or the blown portion of the second narrow neck portion 26/26' can be used as the lower limit tolerance of the (narrow neck portion width of the) fuse pattern.
As described above, in performing the blowing detection procedure on the test key structure 10A having the first narrow neck portion 24/24 ' and the second narrow neck portion 26/26 with different widths, the voltage source applies a programming voltage to provide a current for setting the narrow neck portion of the fusible electrical fuse to the first narrow neck portion 24/24 ' and the second narrow neck portion 26/26 ', and detects the resistance values of the first narrow neck portion 24/24 ' and the second narrow neck portion 26/26 '. If the resistance of the portion of the first narrow neck 24/24 'and/or the second narrow neck 26/26' is detected to be not large, the width of the portion of the first narrow neck 24/24 'and/or the second narrow neck 26/26' is too large to be blown easily, so the width corresponding to the portion of the first narrow neck 24/24 'and/or the second narrow neck 26/26' can be used as the upper-limit allowable value of (the width of the narrow neck portion of) the electrical fuse pattern.
In the exemplary test key structure of the invention, by designing the first narrow neck/the second narrow neck with different sizes, after performing the pre-test procedure and the fuse test procedure, the process latitude of the fuse pattern can be obtained according to the upper limit tolerance and the lower limit tolerance of the obtained fuse pattern, thereby significantly reducing the failure analysis period of the fuse blowing problem. Since the first narrow neck portion and the second narrow neck portion in each test region each have one direction, the use of the test key structure can be applied to an electrical fuse pattern having two effective directions, with advantages of easy operation and reduced inspection time.
Although the present invention has been described with reference to the above embodiments, it should be understood that the invention is not limited thereto, and that various changes and modifications can be made by those skilled in the art without departing from the spirit and scope of the invention.
Claims (16)
1. A test key structure for detecting process latitude of an electrical fuse pattern, the test key structure comprising:
a conductive material layer defining at least one test region, each test region including a central portion, two first sub-portions, two second sub-portions, two first narrow neck portions and two second narrow neck portions, wherein,
the central portion has two opposite first ends and two opposite second ends,
the two first sub-portions are respectively disposed corresponding to the two first ends,
the two second sub-portions are respectively disposed corresponding to the two second ends,
the two first narrow neck portions are respectively connected with the two first sub portions to the two first ends, so that the central portion is arranged between the two first sub portions, and the two first narrow neck portions extend along a first direction,
the two second narrow neck parts are respectively connected with the two second sub parts to the two second ends, so that the central part is arranged between the two second sub parts, and the two second narrow neck parts extend along a second direction;
a first upper conductor layer disposed above the central portion, the first upper conductor layer and the central portion being electrically connected by the first via contacts; and
the second upper conductor layer is arranged above the two first sub-portions and the two second sub-portions, and is electrically connected to the two first sub-portions and the two second sub-portions through the second through hole contacts.
2. The test key structure of claim 1, wherein the material of the conductive material layer comprises a metal, a metal silicide, a polysilicon, or a combination thereof.
3. The test key structure of claim 1, wherein one of the first and second upper conductor layers is connected to a voltage source.
4. The test key structure of claim 3, wherein a pre-test voltage is applied via the voltage source and pre-tests the resistance of the two first narrow necks and the two second narrow necks.
5. The test key structure of claim 3, wherein a programming voltage is applied via the voltage source, and the resistance of the two first narrow necks and the two second narrow necks is detected to determine whether at least one of the two first narrow necks or at least one of the two second narrow necks has been blown.
6. The test key structure of claim 1, wherein widths of the first and second narrow necks are the same, and the widths of the first and second narrow necks correspond to a width of the electrical fuse pattern.
7. The test key structure of claim 1, wherein the two first narrow necks and the two second narrow necks have widths smaller than widths of the central portion, the two first sub-portions and the two second sub-portions.
8. The test key structure of claim 1, wherein the first direction is perpendicular to the second direction.
9. The test key structure of claim 8, wherein the central portion, the two first sub-portions, the two second sub-portions, the two first narrow neck portions and the two second narrow neck portions form a cross-shaped arrangement therebetween, and the central portion is located at a staggered center of the cross-shaped arrangement.
10. The test key structure of claim 1, wherein the layer of conductive material defines a plurality of test areas arranged in an array having a plurality of rows and a plurality of columns, the rows being along the first direction and the columns being along the second direction.
11. The test key structure of claim 10, wherein adjacent ones of the test regions on each of the rows share one of the first sub-portions, and adjacent ones of the test regions on each of the columns share one of the second sub-portions.
12. The test key structure of claim 10, wherein in the test regions on each of the rows, the first sub-portions of adjacent ones of the test regions are connected, and in the test regions on each of the columns, the second sub-portions of adjacent ones of the test regions are connected.
13. The test key structure of claim 10, wherein widths of the first narrow necks in the test areas of different rows have different dimensions.
14. The test key structure of claim 10, wherein widths of the second narrow necks in the test areas of different rows have different dimensions.
15. The test key structure of claim 10, wherein widths of the first narrow necks in the test areas of the same row have different sizes.
16. The test key structure of claim 10, wherein widths of the second narrow necks in the test areas of the same column have different sizes.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW108140103 | 2019-11-05 | ||
| TW108140103A TW202119514A (en) | 2019-11-05 | 2019-11-05 | Testkey structure |
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| Publication Number | Publication Date |
|---|---|
| CN112768435A true CN112768435A (en) | 2021-05-07 |
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| CN201911086116.0A Pending CN112768435A (en) | 2019-11-05 | 2019-11-08 | Test key structure |
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| TW (1) | TW202119514A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040004268A1 (en) * | 2002-07-08 | 2004-01-08 | International Business Machines Corporation | E-Fuse and anti-E-Fuse device structures and methods |
| US20070262413A1 (en) * | 2006-05-11 | 2007-11-15 | Booth Roger A Jr | E-fuse and method for fabricating e-fuses integrating polysilicon resistor masks |
| CN103579191A (en) * | 2012-07-20 | 2014-02-12 | 无锡华润上华半导体有限公司 | Semiconductor testing structure for testing leakage current of 6T-SRAM |
| CN204271042U (en) * | 2014-10-21 | 2015-04-15 | 中芯国际集成电路制造(北京)有限公司 | A kind of electric fuse test structure |
| US20170345827A1 (en) * | 2016-05-31 | 2017-11-30 | Taiwan Semiconductor Manufacturing Company Limited | Double Metal Layout for Memory Cells of a Non-Volatile Memory |
-
2019
- 2019-11-05 TW TW108140103A patent/TW202119514A/en unknown
- 2019-11-08 CN CN201911086116.0A patent/CN112768435A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040004268A1 (en) * | 2002-07-08 | 2004-01-08 | International Business Machines Corporation | E-Fuse and anti-E-Fuse device structures and methods |
| US20070262413A1 (en) * | 2006-05-11 | 2007-11-15 | Booth Roger A Jr | E-fuse and method for fabricating e-fuses integrating polysilicon resistor masks |
| CN103579191A (en) * | 2012-07-20 | 2014-02-12 | 无锡华润上华半导体有限公司 | Semiconductor testing structure for testing leakage current of 6T-SRAM |
| CN204271042U (en) * | 2014-10-21 | 2015-04-15 | 中芯国际集成电路制造(北京)有限公司 | A kind of electric fuse test structure |
| US20170345827A1 (en) * | 2016-05-31 | 2017-11-30 | Taiwan Semiconductor Manufacturing Company Limited | Double Metal Layout for Memory Cells of a Non-Volatile Memory |
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| TW202119514A (en) | 2021-05-16 |
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