CN112752045A - Display device and display method - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs
- H04N21/4402—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
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Abstract
The invention discloses a display device and a display method, wherein the display device comprises a processor, a display and a display, wherein the processor is configured to adjust a video signal to obtain the video signal which accords with a preset condition if the video signal is determined to be not accordant with the preset condition according to the time sequence information of the video signal, the time sequence of the video signal which accords with the preset condition is selected and then sent to the display connected with the processor, and the display is configured to display the video signal which is selected according to the received time sequence, wherein the preset condition is a condition for representing normal display of the display device. Before displaying, whether the video signal meets the normal display condition of the display equipment is judged, if not, the video signal is adjusted according to the time sequence information of the video signal to obtain the video signal meeting the normal display condition of the display equipment, so that the video signal can be normally displayed, and the stability of the system is improved.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display device and a display method.
Background
With the development of science and technology, people have higher and higher requirements on televisions, and laser televisions gradually enter the lives of people. The laser television can realize 2 times of color gradation expression capability compared with the liquid crystal television and the plasma television. The laser beam can provide the richest, complex colors that can also be accompanied by the best sharpness and depth of field.
At present, the laser television usually adopts "System On Chip (SOC) + Field Programmable Gate Array (FPGA) (Ga)teThe hardware system architecture of Array, field programmable gate Array) + laser source ", wherein, the FPGA is regarded as the middle part, how to send the video signal from SOC to the laser display part steadily is the prerequisite of the normal work of the whole system. However, the laser television may use different SOCs according to different model schemes, and different SOCs may generate different time sequences, and when some SOCs switch signals or functions, the time sequences may also change. And as a customized device, the FPGA can only support time sequences which are changed within a specific range. When the variation of the input time sequence exceeds the receivable range of the FPGA, the system becomes unstable, and abnormal phenomena such as picture flickering and the like occur.
Disclosure of Invention
The invention provides a display device and a display method, which are used for solving the problem of image display abnormity in the prior art.
In a first aspect, an embodiment of the present invention provides a display device, including:
the processor is configured to adjust the video signal according to the timing sequence information if the video signal is determined not to accord with a preset condition according to the timing sequence information of the video signal, so as to obtain the video signal which accords with the preset condition; the video signals which accord with the preset conditions are subjected to time sequence selection and then sent to the display;
the display is configured to display the video signal after the received time sequence selection;
the preset condition is a condition for representing normal display of the display equipment.
In some embodiments of the present application, the timing information of the video signal includes some or all of the following:
a high level duration in the video signal;
low level duration in said video signal;
start position information of the video signal;
end position information of the video signal;
width information of the video signal.
In some embodiments of the present application, the preset condition includes some or all of the following:
the high level duration is less than or equal to the low level duration;
the initial position information is in a first preset range;
the end position information is in a second preset range;
the width information is within a third preset range.
In some embodiments of the present application, the treatment appliance is configured to:
if the high level duration is greater than the low level duration, negating the video signal;
if the initial position information is not in the first preset range, adjusting the initial position information to be information in the first preset range according to the first preset range;
if the ending position information is not in the second preset range, adjusting the ending position information to be information in the second preset range according to the second preset range;
and if the width information is not in the third preset range, adjusting the width information to be in the third preset range according to the third preset range.
In some embodiments of the present application, the processor is further configured to:
and analyzing the video signal to obtain the time sequence information of the video signal.
In a second aspect, an embodiment of the present application provides a display method, including:
if the video signal is determined to be not in accordance with the preset condition according to the time sequence information of the video signal, adjusting the video signal according to the time sequence information to obtain the video signal in accordance with the preset condition;
after the video signals meeting the preset conditions are subjected to time sequence selection, displaying the video signals according to the time sequence selection;
the preset condition is a condition for representing normal display of the display equipment.
In some embodiments of the present application, the timing information of the video signal includes some or all of the following:
a high level duration in the video signal;
low level duration in said video signal;
start position information of the video signal;
end position information of the video signal;
width information of the video signal.
In some embodiments of the present application, the preset condition includes some or all of the following:
the high level duration is less than or equal to the low level duration;
the initial position information is in a first preset range;
the end position information is in a second preset range;
the width information is within a third preset range.
In some embodiments of the present application, the adjusting the video signal according to the timing information to obtain the video signal meeting the preset condition includes:
if the high level duration is greater than the low level duration, negating the video signal;
if the initial position information is not in the first preset range, adjusting the initial position information to be information in the first preset range according to the first preset range;
if the ending position information is not in the second preset range, adjusting the ending position information to be information in the second preset range according to the second preset range;
and if the width information is not in the third preset range, adjusting the width information to be in the third preset range according to the third preset range.
In some embodiments of the present application, before determining that the video signal does not meet the preset condition according to the parameter information of the video signal, the method further includes:
and analyzing the video signal to obtain the time sequence information of the video signal.
In a third aspect, the present application also provides a non-transitory computer-readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method of the second aspect.
The application provides a display device and a display method, wherein the display device comprises a processor, a display and a processor, wherein the processor is configured to adjust a video signal to obtain the video signal meeting a preset condition if the video signal is determined not to meet the preset condition according to time sequence information of the video signal, the time sequence of the video signal meeting the preset condition is selected and then sent to the display connected with the processor, the display is configured to display the video signal selected according to the received time sequence, and the preset condition is used for representing the normal display condition of the display device. Before displaying, whether the video signal meets the normal display condition of the display equipment is judged, if not, the video signal is adjusted according to the time sequence information of the video signal to obtain the video signal meeting the normal display condition of the display equipment, so that the video signal can be normally displayed, and the stability of the system is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 illustrates a schematic diagram of a usage scenario of a display device according to some embodiments;
fig. 2 illustrates a hardware configuration block diagram of the control apparatus 100 according to some embodiments;
fig. 3 illustrates a hardware configuration block diagram of the display apparatus 200 according to some embodiments;
FIG. 4 illustrates a software configuration diagram in the display device 200 according to some embodiments;
FIG. 5 shows a schematic diagram of a laser television according to some embodiments;
FIG. 6 shows a schematic diagram of the structure of an FPGA in a laser television according to some embodiments;
FIG. 7 illustrates a schematic structural diagram of a display device according to some embodiments;
FIG. 8 illustrates a schematic diagram of yet another FPGA in accordance with some embodiments;
FIG. 9 illustrates an architectural diagram of a processor according to some embodiments;
FIG. 10 illustrates a schematic diagram of VS polarity adjustment, according to some embodiments;
FIG. 11 illustrates a schematic diagram of HS width information and position information adjustment according to some embodiments;
FIG. 12 illustrates a flow diagram of a display method according to some embodiments;
FIG. 13 is a full flow diagram of a display method according to some embodiments.
Detailed Description
To make the purpose and embodiments of the present application clearer, the following will clearly and completely describe the exemplary embodiments of the present application with reference to the attached drawings in the exemplary embodiments of the present application, and it is obvious that the described exemplary embodiments are only a part of the embodiments of the present application, and not all of the embodiments.
It should be noted that the brief descriptions of the terms in the present application are only for the convenience of understanding the embodiments described below, and are not intended to limit the embodiments of the present application. These terms should be understood in their ordinary and customary meaning unless otherwise indicated.
The terms "first," "second," "third," and the like in the description and claims of this application and in the above-described drawings are used for distinguishing between similar or analogous objects or entities and not necessarily for describing a particular sequential or chronological order, unless otherwise indicated. It is to be understood that the terms so used are interchangeable under appropriate circumstances.
The terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a product or apparatus that comprises a list of elements is not necessarily limited to all elements expressly listed, but may include other elements not expressly listed or inherent to such product or apparatus.
The term "module" refers to any known or later developed hardware, software, firmware, artificial intelligence, fuzzy logic, or combination of hardware and/or software code that is capable of performing the functionality associated with that element.
Fig. 1 is a schematic diagram of a usage scenario of a display device according to an embodiment. As shown in fig. 1, the display apparatus 200 is also in data communication with a server 400, and a user can operate the display apparatus 200 through the smart device 300 or the control device 100.
In some embodiments, the control apparatus 100 may be a remote controller, and the communication between the remote controller and the display device includes at least one of an infrared protocol communication or a bluetooth protocol communication, and other short-distance communication methods, and controls the display device 200 in a wireless or wired manner. The user may control the display apparatus 200 by inputting a user instruction through at least one of a key on a remote controller, a voice input, a control panel input, and the like.
In some embodiments, the smart device 300 may include any one of a mobile terminal, a tablet, a computer, a laptop, an AR (Augmented Reality)/VR (Virtual Reality) device, and the like.
In some embodiments, the smart device 300 may also be used to control the display device 200. For example, the display device 200 is controlled using an application program running on the smart device.
In some embodiments, the smart device 300 and the display device may also be used for communication of data.
In some embodiments, the display device 200 may also be controlled in a manner other than the control apparatus 100 and the smart device 300, for example, the voice instruction control of the user may be directly received by a module configured inside the display device 200 to obtain a voice instruction, or may be received by a voice control apparatus provided outside the display device 200.
In some embodiments, the display device 200 is also in data communication with a server 400. The display device 200 may be allowed to be communicatively connected through a Local Area Network (LAN), a Wireless Local Area Network (WLAN), and other networks. The server 400 may provide various contents and interactions to the display apparatus 200. The server 400 may be a cluster or a plurality of clusters, and may include one or more types of servers.
In some embodiments, software steps executed by one step execution agent may be migrated on demand to another step execution agent in data communication therewith for execution. Illustratively, software steps performed by the server may be migrated to be performed on a display device in data communication therewith, and vice versa, as desired.
Fig. 2 exemplarily shows a block diagram of a configuration of the control apparatus 100 according to an exemplary embodiment. As shown in fig. 2, the control device 100 includes a controller 110, a communication interface 130, a user input/output interface 140, a memory, and a power supply. The control apparatus 100 may receive an input operation instruction from a user and convert the operation instruction into an instruction recognizable and responsive by the display device 200, serving as an interaction intermediary between the user and the display device 200.
In some embodiments, the Communication interface 130 is used for external Communication, and includes at least one of a WIFI (Wireless Fidelity) chip, a bluetooth module, NFC (Near Field Communication), or an alternative module.
In some embodiments, the user input/output interface 140 includes at least one of a microphone, a touchpad, a sensor, a key, or an alternative module.
Fig. 3 shows a hardware configuration block diagram of the display apparatus 200 according to an exemplary embodiment.
In some embodiments, the display apparatus 200 includes at least one of a tuner demodulator 210, a communicator 220, a detector 230, an external device interface 240, a controller 250, a display 260, an audio output interface 270, a memory, a power supply, a user interface.
In some embodiments, the controller includes a central processing unit, a video processor, an audio processor, a graphic processor, a RAM (Random Access Memory), a ROM (Read-Only Memory), a first interface to an nth interface for input/output.
In some embodiments, the display 260 includes a display screen component for displaying images, and a driving component for driving image display, a component for receiving image signals from the controller output, and displaying video content, image content, and a menu manipulation Interface, and a User Interface (UI) Interface.
In some embodiments, the display 260 may be at least one of a liquid crystal display, an OLED (organic light-Emitting Diode) display, and a projection display, and may also be a projection device and a projection screen.
In some embodiments, the tuner/demodulator 210 receives broadcast television signals via wired or wireless reception, and demodulates audio/video signals, such as EPG (electronic Program Guide) data signals, from a plurality of wireless or wired broadcast television signals.
In some embodiments, communicator 220 is a component for communicating with external devices or servers according to various communication protocol types. For example: the communicator may include at least one of a WIFI module, a bluetooth module, a wired ethernet module, and other network communication protocol chips or near field communication protocol chips, and an infrared receiver. The display apparatus 200 may establish transmission and reception of control signals and data signals with the control device 100 or the server 400 through the communicator 220.
In some embodiments, the detector 230 is used to collect signals of the external environment or interaction with the outside. For example, detector 230 includes a light receiver, a sensor for collecting ambient light intensity; alternatively, the detector 230 includes an image collector, such as a camera, which may be used to collect external environment scenes, attributes of the user, or user interaction gestures, or the detector 230 includes a sound collector, such as a microphone, which is used to receive external sounds.
In some embodiments, the external device interface 240 may include, but is not limited to, the following: any one or more of a High Definition Multimedia Interface (HDMI), an analog or data High Definition component input Interface (component), a composite video input Interface, a USB (Universal Serial Bus) input Interface, and an RGB (red, green, and blue) port. The interface may be a composite input/output interface formed by the plurality of interfaces.
In some embodiments, the controller 250 and the modem 210 may be located in different separate devices, that is, the modem 210 may also be located in an external device of the main device where the controller 250 is located, such as an external set-top box.
In some embodiments, the controller 250 controls the operation of the display device and responds to user operations through various software control programs stored in memory. The controller 250 controls the overall operation of the display apparatus 200. For example: in response to receiving a user command for selecting a UI object to be displayed on the display 260, the controller 250 may perform an operation related to the object selected by the user command.
In some embodiments, the object may be any one of selectable objects, such as a hyperlink, an icon, or other actionable control. The operations related to the selected object are: displaying an operation connected to a hyperlink page, document, image, or the like, or performing an operation of a program corresponding to the icon.
In some embodiments the controller comprises at least one of a Central Processing Unit (CPU), a video processor, an audio processor, a Graphics Processing Unit (GPU), a RAM, a ROM, first to nth interfaces for input/output, a communication Bus (Bus), and the like.
And the CPU is used for executing the operating system and the application program instructions stored in the memory and executing various application programs, data and contents according to various interaction instructions for receiving external input so as to finally display and play various audio and video contents. The CPU processor may include a plurality of processors. E.g. comprising a main processor and one or more sub-processors.
In some embodiments, a graphics processor for generating various graphics objects, such as: at least one of an icon, an operation menu, and a user input instruction display figure. The graphic processor comprises an arithmetic unit, which performs operation by receiving various interactive instructions input by a user and displays various objects according to display attributes; the system also comprises a renderer for rendering various objects obtained based on the arithmetic unit, wherein the rendered objects are used for being displayed on a display.
In some embodiments, the video processor is configured to receive an external video signal, and perform at least one of video processing such as decompression, decoding, scaling, noise reduction, frame rate conversion, resolution conversion, and image synthesis according to a standard codec protocol of the input signal, so as to obtain a signal displayed or played on the direct display device 200.
In some embodiments, the video processor includes at least one of a demultiplexing module, a video decoding module, an image composition module, a frame rate conversion module, a display formatting module, and the like. The demultiplexing module is used for demultiplexing the input audio and video data stream. And the video decoding module is used for processing the video signal after demultiplexing, including decoding, scaling and the like. And an image synthesis module, such as an image synthesizer, configured to superimpose and mix a graphics generator with the scaled video image according to a GUI (Graphical User Interface) signal input by a User or generated by the User, so as to generate an image signal for display. And the frame rate conversion module is used for converting the frame rate of the input video. And the display formatting module is used for converting the received video output signal after the frame rate conversion, and changing the signal to be in accordance with the signal of the display format, such as an output RGB data signal.
In some embodiments, the audio processor is configured to receive an external audio signal, decompress and decode the received audio signal according to a standard codec protocol of the input signal, and perform at least one of noise reduction, digital-to-analog conversion, and amplification processing to obtain a sound signal that can be played in the speaker.
In some embodiments, a user may enter user commands on a Graphical User Interface (GUI) displayed on display 260, and the user input interface receives the user input commands through the Graphical User Interface (GUI). Alternatively, the user may input the user command by inputting a specific sound or gesture, and the user input interface receives the user input command by recognizing the sound or gesture through the sensor.
In some embodiments, a "user interface" is a media interface for interaction and information exchange between an application or operating system and a user that enables conversion between an internal form of information and a form that is acceptable to the user. A common presentation form of a user interface is a graphical user interface, which refers to a user interface displayed in a graphical manner and related to computer operations. It may be an interface element such as an icon, window, control, etc. displayed in a display screen of the electronic device, where the control may include at least one of an icon, button, menu, tab, text box, dialog box, status bar, navigation bar, etc. visual interface elements.
In some embodiments, user interface 280 is an interface that may be used to receive control inputs (e.g., physical buttons on the body of the display device, or the like).
In some embodiments, a system of a display device may include a Kernel (Kernel), a command parser (shell), a file system, and an application program. The kernel, shell, and file system together make up the basic operating system structure that allows users to manage files, run programs, and use the system. After power-on, the kernel is started, kernel space is activated, hardware is abstracted, hardware parameters are initialized, and virtual memory, a scheduler, signals and Inter-Process Communication (IPC) are operated and maintained. And after the kernel is started, loading the shell and the user application program. The application program is compiled into machine code after being started, and a process is formed.
Referring to fig. 4, in some embodiments, the system is divided into four layers, which are an Application (Applications) layer (abbreviated as "Application layer"), an Application Framework (Application Framework) layer (abbreviated as "Framework layer"), an Android runtime (Android runtime) and system library layer (abbreviated as "system runtime library layer"), and a kernel layer from top to bottom.
In some embodiments, at least one application program runs in the application program layer, and the application programs may be windows (windows) programs carried by an operating system, system setting programs, clock programs or the like; or an application developed by a third party developer. In particular implementations, the application packages in the application layer are not limited to the above examples.
The framework layer provides an Application Programming Interface (API) and a programming framework for the application program of the application layer. The application framework layer includes a number of predefined functions. The application framework layer acts as a processing center that decides to let the applications in the application layer act. The application program can access the resources in the system and obtain the services of the system in execution through the API interface.
As shown in fig. 4, in the embodiment of the present application, the application framework layer includes a manager (Managers), a Content Provider (Content Provider), and the like, where the manager includes at least one of the following modules: an Activity Manager (Activity Manager) is used for interacting with all activities running in the system; the Location Manager (Location Manager) is used for providing the system service or application with the access of the system Location service; a Package Manager (Package Manager) for retrieving various information related to an application Package currently installed on the device; a Notification Manager (Notification Manager) for controlling display and clearing of Notification messages; a Window Manager (Window Manager) is used to manage the icons, windows, toolbars, wallpapers, and desktop components on a user interface.
In some embodiments, the activity manager is used to manage the lifecycle of the various applications as well as general navigational fallback functions, such as controlling exit, opening, fallback, etc. of the applications. The window manager is used for managing all window programs, such as obtaining the size of a display screen, judging whether a status bar exists, locking the screen, intercepting the screen, controlling the change of the display window (for example, reducing the display window, displaying a shake, displaying a distortion deformation, and the like), and the like.
In some embodiments, the system runtime layer provides support for the upper layer, i.e., the framework layer, and when the framework layer is used, the android operating system runs the C/C + + library included in the system runtime layer to implement the functions to be implemented by the framework layer.
In some embodiments, the kernel layer is a layer between hardware and software. As shown in fig. 4, the core layer includes at least one of the following drivers: audio drive, display driver, bluetooth drive, camera drive, WIFI drive, USB drive, HDMI drive, sensor drive (like fingerprint sensor, temperature sensor, pressure sensor etc.) and power drive etc..
The display device in the embodiment of the invention can be a laser television, the processor can be an FPGA, and the display can be a laser display unit.
The implementation of the invention is described below with the display device being a laser television, the processor being an FPGA, and the display being a laser display unit. It should be noted that the following is only an example, and the display device, the processor and the display unit in the embodiment of the present invention are not limited in particular.
As shown in fig. 5, the laser television may include an SOC 501, an FPGA 502, and a laser display unit 503, where the video data signal is sent from the SOC to the FPGA in the form of a serial signal, and after a series of processing is performed on the video data signal by the FPGA, the processed signal is sent to the laser display unit for display.
Fig. 6 is a schematic diagram of an FPGA in a laser television. As can be seen in fig. 6, the FPGA includes a serial-to-parallel conversion module 601, a timing analysis module 602, a timing selection module 603, an image rectification module 604, and a signal transmission module 605.
Video data signals are sent to the FPGA from the SOC in the form of serial signals, a serial-to-parallel conversion module 601 in the FPGA parses the serial Video signals into parallel Video signals, a timing parsing module 602 parses the parallel Video signals into VGA (Video Graphics Array) signals, namely VS (field sync signal), HS (line sync signal), and DE (data availability signal) RGB (red, green, and blue), a timing selection module 603 selects the signals according to the timing of the signals, and a graphic correction module 604 adjusts the projection shape of the laser television and sends the Video signals to a laser display unit through a signal sending module 605.
When the FPGA shown in fig. 6 processes the video signal, the timing sequence of the signal is not adjusted, the laser television may use different SOCs according to different models, the different SOCs may generate video signals with different timing sequences, the FPGA is a customized device and can only support timing sequences that change within a specific range, and if the timing sequence of the received video signal is not within the timing sequence range acceptable to the FPGA, the image may be displayed abnormally.
The display device provided in the embodiment of the present invention, as shown in fig. 7, may include a processor 701 and a display 702, where the processor 701 may determine, according to timing information of a video signal, that the video signal does not meet a preset condition, then adjust the video signal to obtain a video signal meeting the preset condition, and send the video signal meeting the preset condition to the display after performing timing selection on the video signal meeting the preset condition;
the display 702 may display the sequentially selected video signals.
The processor 701 may further perform parsing on the video signal to obtain timing information of the video signal before determining that the video signal does not meet the preset condition according to the timing information of the video signal.
In a specific implementation, the processor 701 may be an FPGA, and may also be another processor.
If the processor 701 is an FPGA, the FPGA may have a structure as shown in fig. 8, and includes a serial-to-parallel conversion module 801, a timing analysis module 802, a timing monitoring module 803, a timing judgment module 804, a timing adjustment module 805, a timing selection module 806, a graph correction module 807, and a signal transmission module 808, where the serial-to-parallel conversion module 801 analyzes a received serial video signal into parallel video signals, the timing analysis module 802 analyzes the parallel video signals into VGA signals, i.e., VS, HS, DE, and RGB, the timing monitoring module 803 analyzes the VGA signals to obtain timing information of the VGA signals, the timing judgment module 804 judges whether the VGA signals meet preset conditions according to the timing information of the VGA signals, and if yes, the VGA signals are transmitted to the timing selection module 806 through the timing adjustment module 805, and of course, the timing judgment module 804 may also directly transmit the VGA signals to the timing selection module 806, if the video signal does not meet the preset condition, the timing adjustment module 805 adjusts the video signal to obtain a video signal meeting the preset condition, the timing selection module 806 selects the timing of the video signal meeting the preset condition, and after the image correction module 807 adjusts the projection shape of the laser television, the signal sending module 808 sends the video signal meeting the preset condition to the laser display unit for displaying.
In an implementation, the timing information of the video signal may be part or all of the following information:
high level duration in the video signal, low level duration in the video signal, start position information of the video signal, end position information of the video signal, width information of the video signal.
For example, the timing monitoring module 803 monitors the length, period, and position of the VS, HS, and DE parameters, and analyzes the length, period, and position of the high level, the low level, the start position, the end position, and the width of the VS, HS, and DE parameters.
The preset conditions in the embodiment of the present invention may include some or all of the following:
the high level duration is less than or equal to the low level duration;
the initial position information is in a first preset range;
the end position information is in a second preset range;
the width information is within a third preset range.
It should be noted that, because the concept of polarity of signals such as VS and HS of VGA can be divided into positive polarity and negative polarity, generally, the high level duration of the signal is longer than the low level duration, and then the high level duration is negative polarity, and the high level duration is less than or equal to the low level duration, and then the high level duration is positive polarity. In the embodiment of the invention, the FPGA only receives the positive video signal, so that the duration of the high level is less than or equal to the duration of the low level as a preset condition.
The processor judges whether the video signal meets a preset condition or not, and can judge whether the high level time length of the video signal is less than or equal to the low level time length, whether the initial position information is in a first preset range or not, whether the end position information is in a second preset range or not, and whether the width information is in a third preset range or not.
If the high level duration of the video signal is greater than the low level duration, determining that the video signal is not in accordance with the preset condition, if the start position information of the video signal is not within a first preset range, determining that the video signal is not in accordance with the preset condition, if the end position information is not within a second preset range, determining that the video signal is not in accordance with the preset condition, and if the width information is not within a third preset range, determining that the video signal is not in accordance with the preset condition.
It should be noted that, as long as the above conditions are met, it can be determined that the video signal is not met with the preset conditions.
For the video signal which does not meet the preset condition, the processor needs to adjust the video signal to obtain the video signal which meets the preset condition, and the specific adjustment mode can adjust the video signal according to the judgment result.
For example, if the duration of the high level is greater than the duration of the low level, the video signal is inverted; if the initial position information of the video signal is not in the first preset range, adjusting the initial position information to be information in the first preset range according to the first preset range; if the ending position information of the video signal is not in the second preset range, adjusting the ending position information to be information in the second preset range according to the second preset range; and if the width information of the video signal is not in the third preset range, adjusting the width information to be in the third preset range according to the third preset range.
As shown in fig. 9, for a schematic structural diagram of a processor according to an embodiment of the present invention, as can be seen from fig. 9, input signals of the processor are video signals VS _ org, HS _ org, DE _ org, and DATA _ in (R, G, B, red, green, and blue three primary colors), output signals are three signals of VS _ new, HS _ new, and DE _ new, which are VGA signals after being adjusted, and are generated by a "timing adjustment module". DATA _ out is the outgoing synchronous DATA signal, consisting of R, G, B.
For ease of understanding, the following description will be made of specific examples of embodiments of the present invention.
The first embodiment is as follows:
as shown in FIG. 10, a schematic diagram of the polarity adjustment of VS is shown, and two cases of analyzing the analyzed VS signals, positive VS1_ org and negative VS2_ org are shown in FIG. 10. Specifically, the timing monitoring module 803 determines whether the VS _ org is a positive polarity signal or a negative polarity signal, and counts the high and low level lengths of the VS signal. The high level count length is VS _ high _ count, and the low level count length is VS _ low _ count. The timing determination module 804 compares the signal duty ratio. If VS _ high _ count > VS _ low _ count, it indicates that the analyzed VS is a negative polarity signal; if VS _ high _ count is less than or equal to VS _ low _ count, it indicates that the resolved VS is a positive polarity signal.
As can be seen from fig. 10, in VS1_ org, VS _ high _ count < VS _ low _ count indicates that resolved VS1_ org is a positive-polarity signal; in VS2_ org, VS _ high _ count > VS _ low _ count, which indicates that the parsed VS2_ org is a negative polarity signal.
Since the FPGA only receives the positive polarity signal in the embodiment of the present invention, when it is detected that the analyzed VS2_ org is the negative polarity signal, the timing adjustment module 805 negates the analyzed VS2_ org to obtain a new timing signal VS _ new.
Likewise, HS can adjust polarity according to the same method.
Example two:
in the embodiment of the invention, the width of VS and HS signals and the position of VS and HS signals are required, and the width and the position are ensured to be within a certain threshold range, otherwise, an FPGA internal module cannot work normally. Taking the analyzed HS signal as an example, how to adjust the signal width of the HS and the position of the HS will be described.
As shown in fig. 11, adjustment of HS width information and position information is performed.
Case 1:
the resolved HS is as HS1_ org in fig. 11. The timing monitoring module 803 analyzes the width information HS1_ wide, the start position information HS1_ start, and the end position information HS1_ end of the HS according to the counting signal HS _ location _ count.
Note that the count signal HS _ location _ count here is a position of the low level of DE _ org, and in order to ensure that HS and DE do not appear at the same timing as a high level, the position of the low level of DE may be used as the count signal of the position of HS.
The timing determination module 804 determines whether the HS1_ org satisfies a preset condition according to the information analyzed by the timing monitoring module 803. The width information of HS and the start position information and the end position information of the signal both correspond to the corresponding threshold values. The threshold is preset according to actual conditions, wherein the threshold of the position information is within a low level range of DE, for example, in fig. 11, the low level of DE is 1 to 27, and the threshold of the position information is set between 1 to 27, and specifically, the threshold needs to be determined according to an adjustment range of a timing sequence of the FPGA.
The threshold corresponding to the width information of HS is: HS _ wide _ max and HS _ wide _ min, i.e. the maximum and minimum values of the width. If HS _ wide _ max > HS1_ wide > HS _ wide _ min, HS1_ wide meets the requirement. Similarly, the threshold corresponding to the start position information HS1_ start is HS _ start _ max and HS _ start _ min, i.e., the maximum value and the minimum value of the start position information. The threshold values corresponding to the end position information HS1_ end are HS _ end _ max and HS _ end _ min, that is, the maximum value and the minimum value of the end position information. In the example of fig. 11, reference is made to HS _ location _ count:
HS width information threshold: HS _ wide _ max is 5, HS _ wide _ min is 3;
HS starting position information threshold: HS _ start _ max is 13, HS _ start _ min is 9;
HS end position information threshold: HS _ end _ max is 17, HS _ end _ min is 14;
HS1_ wide of HS1_ org in the example is equal to HS1_ end minus HS1_ start, i.e. 23 minus 21, equal to 2, i.e. HS1_ wide is 2, since HS1_ wide (2) < HS _ wide _ min (3), and therefore does not meet the requirement, the width of HS1_ org needs to be adjusted: the "timing adjustment module" adjusts the width of HS1_ wide (2) to the signal width HS1_ new _ wide (4) in HS1_ mew.
In the example, HS1_ start (21) > HS _ start _ max (13) of HS1_ org does not satisfy the condition of HS _ start _ max (13) > HS1_ start > HS _ start _ min (9). HS1_ start (21) needs to be adjusted to the position of HS _ new _ start (12) of HS1_ new.
In the example, HS1_ end (23) > HS _ end _ max (15) of HS1_ org does not satisfy the condition of HS _ end _ max (17) > HS1_ end > HS _ end _ min (14). HS1_ end (23) needs to be adjusted to the position of HS _ new _ end (16) of HS1_ new.
Case 2:
the resolved HS is as HS2_ org in fig. 11. In this case, HS2_ wide is equal to HS2_ end minus HS2_ start, i.e. 11 minus 5, equal to 6, since HS2_ wide (6) > HS _ wide _ max (5), HS2_ start (5) < HS _ start _ min (9), HS2_ end (10) < HS _ end _ min (14). According to the setting requirement, HS2_ org needs to be adjusted to HS2_ new, and the adjusted signal meets the following requirements:
HS_wide_max(5)>HS_new_wide(4)>HS_wide_min(3),
HS_start_max(13)>HS_new_start(12)>HS_start_min(9),
HS_end_max(17)>HS_new_end(16)>HS_end_min(14);
similarly, when the HS position signal has other conditions which do not meet the requirement, the HS position signal can be adjusted according to the method. The position of the VS can also be adjusted according to this principle.
It should be noted that, when adjusting a video signal that does not meet the preset condition, the information that does not meet the preset condition may be selected to be adjusted according to the preset range, for example, the information that does not meet the preset condition is adjusted to a middle value of the preset range, or may be adjusted to a preset value within the preset range.
Based on the same inventive concept, the present application further provides a display method, as shown in fig. 12, including:
s1201, if the video signal is determined to be not in accordance with the preset condition according to the time sequence information of the video signal, adjusting the video signal according to the time sequence information to obtain the video signal in accordance with the preset condition;
and S1202, after the video signal meeting the preset condition is subjected to time sequence selection, displaying the video signal according to the time sequence selection.
The preset condition is a condition for representing normal display of the display equipment.
In the embodiment of the present invention, the timing information of the video signal may include part or all of the following:
a high level duration in the video signal;
low level duration in said video signal;
start position information of the video signal;
end position information of the video signal;
width information of the video signal.
In one possible implementation, the preset condition includes some or all of the following:
the high level duration is less than or equal to the low level duration;
the initial position information is in a first preset range;
the end position information is in a second preset range;
the width information is within a third preset range.
In a possible implementation manner, the adjusting the video signal to obtain the video signal meeting the preset condition includes:
if the high level duration is greater than the low level duration, negating the video signal;
if the initial position information is not in the first preset range, adjusting the initial position information to be information in the first preset range according to the first preset range;
if the ending position information is not in the second preset range, adjusting the ending position information to be information in the second preset range according to the second preset range;
and if the width information is not in the third preset range, adjusting the width information to be in the third preset range according to the third preset range.
In a possible implementation manner, before determining, according to parameter information of a video signal, that the video signal does not meet a preset condition, the method further includes:
and analyzing the video signal to obtain the time sequence information of the video signal.
In the embodiment of the invention, if the video signal is determined not to accord with the preset condition according to the time sequence information of the video signal, the video signal is adjusted to obtain the video signal which accords with the preset condition, the time sequence of the video signal which accords with the preset condition is selected, and then the video signal which accords with the preset condition is displayed according to the selected time sequence, wherein the preset condition is a condition for representing normal display of display equipment. The video signal is adjusted to obtain the video signal which accords with the normal display condition of the display equipment if the video signal does not accord with the normal display condition of the display equipment, so that the video signal can be normally displayed, and the stability of the system is improved.
Fig. 13 is a schematic overall flow chart of a display method according to an embodiment of the present invention.
S1301, receiving a video signal;
s1302, converting the serial video signal into a parallel video signal;
s1303, analyzing the parallel video signals into VGA signals;
s1304, analyzing the VGA signal to obtain timing sequence information of VS, HS and DE, wherein the timing sequence information comprises high level duration, low level duration, initial position information, end position information and width information;
s1305, judging whether polarities of VS, HS and DE are positive or not according to the high-level time length and the low-level time length, if yes, executing S1307, and if not, executing S1306;
s1306, inverting the video signal;
s1307, judging whether the position information and the width information of the VS and the HS are in the threshold range according to the initial position information, the end position information, the width information and the threshold, if so, executing S1309, otherwise, executing S1308;
s1308, adjusting width information and/or position information of the video signal;
s1309, selecting the video signal;
s1310, outputting the data of the image correction module by using the adjusted time sequence;
and S1311, normal display.
Further, an embodiment of the present invention further provides a computer-readable non-volatile storage medium, which includes program code, and when the program code runs on a computing terminal, the program code is configured to enable the computing terminal to execute the steps of the display method according to the embodiment of the present invention.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.
The foregoing description, for purposes of explanation, has been presented in conjunction with specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the embodiments to the precise forms disclosed above. Many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles and the practical application, to thereby enable others skilled in the art to best utilize the embodiments and various embodiments with various modifications as are suited to the particular use contemplated.
Claims (10)
1. A display device, comprising: a processor and a display coupled to the processor, wherein:
the processor is configured to adjust the video signal according to the timing sequence information if the video signal is determined not to accord with a preset condition according to the timing sequence information of the video signal, so as to obtain the video signal which accords with the preset condition; the video signals which accord with the preset conditions are subjected to time sequence selection and then sent to the display;
the display is configured to display the video signal after the received time sequence selection;
the preset condition is a condition for representing normal display of the display equipment.
2. The display device according to claim 1, wherein the timing information of the video signal includes part or all of:
a high level duration in the video signal;
low level duration in said video signal;
start position information of the video signal;
end position information of the video signal;
width information of the video signal.
3. The display device according to claim 2, wherein the preset condition includes some or all of:
the high level duration is less than or equal to the low level duration;
the initial position information is in a first preset range;
the end position information is in a second preset range;
the width information is within a third preset range.
4. The display device of claim 3, wherein the processor is configured to:
if the high level duration is greater than the low level duration, negating the video signal;
if the initial position information is not in the first preset range, adjusting the initial position information to be information in the first preset range according to the first preset range;
if the ending position information is not in the second preset range, adjusting the ending position information to be information in the second preset range according to the second preset range;
and if the width information is not in the third preset range, adjusting the width information to be in the third preset range according to the third preset range.
5. The display device of any of claims 1-4, wherein the processor is further configured to:
and analyzing the video signal to obtain the time sequence information of the video signal.
6. A display method, comprising:
if the video signal is determined to be not in accordance with the preset condition according to the time sequence information of the video signal, adjusting the video signal according to the time sequence information to obtain the video signal in accordance with the preset condition;
after the video signals meeting the preset conditions are subjected to time sequence selection, displaying the video signals according to the time sequence selection;
the preset condition is a condition for representing normal display of the display equipment.
7. The method of claim 6, wherein the timing information of the video signal comprises some or all of:
a high level duration in the video signal;
low level duration in said video signal;
start position information of the video signal;
end position information of the video signal;
width information of the video signal.
8. The method of claim 7, wherein the preset conditions include some or all of:
the high level duration is less than or equal to the low level duration;
the initial position information is in a first preset range;
the end position information is in a second preset range;
the width information is within a third preset range.
9. The method of claim 8, wherein the adjusting the video signal according to the timing information to obtain the video signal meeting the predetermined condition comprises:
if the high level duration is greater than the low level duration, negating the video signal;
if the initial position information is not in the first preset range, adjusting the initial position information to be information in the first preset range according to the first preset range;
if the ending position information is not in the second preset range, adjusting the ending position information to be information in the second preset range according to the second preset range;
and if the width information is not in the third preset range, adjusting the width information to be in the third preset range according to the third preset range.
10. A computer storage medium having a computer program stored thereon, the program, when executed by a processor, implementing the steps of the method according to any one of claims 6 to 9.
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