CN112738430B

CN112738430B - Switchable pixel structure

Info

Publication number: CN112738430B
Application number: CN202011616729.3A
Authority: CN
Inventors: 王欣洋; 刘洋; 郭杨钰
Original assignee: Changchun Changguang Chenxin Microelectronics Co ltd
Current assignee: Changchun Changguang Chenxin Microelectronics Co ltd
Priority date: 2020-12-30
Filing date: 2020-12-30
Publication date: 2023-05-26
Anticipated expiration: 2040-12-30
Also published as: CN112738430A

Abstract

The invention provides a switchable pixel structure, comprising: the capacitive feedback operational amplifier, the dual-purpose capacitor and the change-over switch are arranged in one of two configurations through the switch: (1) The capacitor feedback operational amplifier is connected in series between the output and the reverse input of the capacitor feedback operational amplifier and is used for realizing a high gain mode and a CDS function; (2) And the feedback capacitor on the feedback loop of the capacitive feedback operational amplifier is connected in parallel to realize a low-gain high-capacity mode. Compared with the traditional pixel circuit, the pixel structure provided by the invention can be switched between low noise and high noise, and in the switching process, the full-well capacity value can be switched, and the switching between strong and weak light modes is realized by controlling the integral capacitance value through a switch. In the case of low light imaging, with a high gain amplifier, which ensures that the low input signal is not drowned by noise, a better sensitivity can be obtained with a high gain amplifier, which further improves the efficiency if CDS operation is also used.

Description

Switchable pixel structure

Technical Field

The present invention relates to the field of image sensors, and in particular, to a switchable pixel structure.

Background

Infrared image sensors are widely used in a variety of applications. Many such sensors rely on pixel designs with capacitive feedback op-amp (Capacitive Trans Impedance Amplifier, CTIA) pixels. In CTIA-based pixels, reset noise is the dominant source of noise. One way to reduce this noise is to use correlated double sampling (Correlated Double Sample, CDS), where the amount of accumulated charge in the reset pixel is measured and subtracted from the signal charge to remove the noise component. Implementing the CDS function in the readout portion of a pixel may have a high requirement on circuit performance because two consecutive reads are required, and thus a high requirement on readout bandwidth, and implementing the CDS function in the readout portion may double the total power of the system. Therefore, it is very advantageous for image sensor design to be able to implement CDS functions within a pixel circuit. Currently, a circuit that realizes a CDS function within a pixel has been developed.

The circuit is advantageous in low light imaging environments where high gain amplifiers are used, and where a high signal to noise ratio ensures that low input signals are not inundated with noise. If CDS operation is also used, the sensitivity obtained using the high gain amplifier can be further improved. However, the use of a high gain amplifier means that the dynamic range of the pixel will decrease and the bright part of the scene will saturate the full well capacity of the sensor more easily. To maximize the capacity of the pixel well, the gain of the amplifier must be kept low, which is not ideal for dim scenes where noise is a problem. In prior art infrared image sensor pixel designs, there is no way to choose between maximizing sensitivity and maximizing capacity.

Disclosure of Invention

The present invention aims to provide a pixel structure that can be dynamically switched between two modes, with two modes, in which the pixel performs correlated double sampling to remove reset noise in a high-sensitivity mode, in which the pixel is configured in a high-capacity mode, avoiding full-well capacity saturation, so as to respond to field lighting conditions to be imaged.

In order to achieve the above purpose, the present invention adopts the following specific technical scheme:

the switchable pixel structure provided by the invention comprises: the capacitor feedback operational amplifier, the feedback capacitor, the first dual-purpose capacitor, the second dual-purpose capacitor, the reset switch, the first change-over switch, the second change-over switch, the third change-over switch, the clamp switch and the clamp voltage source; the inverting input end of the capacitive feedback operational amplifier is connected with the photoelectric detector, and the non-inverting input end of the capacitive feedback operational amplifier is connected with the reset voltage; two ends of the reset switch are respectively connected with the output end and the inverting input end of the capacitor feedback operational amplifier; one end of the feedback capacitor is connected with the inverting input end of the capacitor feedback operational amplifier, and the other end of the feedback capacitor is connected with the third change-over switch in series and then is connected with the pixel readout circuit; the first change-over switch is connected with the first dual-purpose capacitor in series and then connected with two ends of the feedback capacitor, one end of the second change-over switch is connected between the first change-over switch and the first dual-purpose capacitor, and the other end of the second change-over switch is connected between the third change-over switch and the feedback capacitor; the clamping voltage source is connected between the third change-over switch and the pixel readout circuit through the clamping switch; one end of the second dual-purpose capacitor is connected between the pixel reading circuit and the third change-over switch, and the other end of the second dual-purpose capacitor is connected with the pixel reading circuit.

Preferably, the pixel reading circuit includes a source follower, a gate of the source follower is connected to the third switch, a drain of the source follower is grounded, and a source of the source follower is taken as an output.

Preferably, the other end of the second dual-purpose capacitor is connected with the drain electrode of the source follower.

Compared with the traditional pixel circuit, the pixel structure provided by the invention can be switched between low noise and high noise, and in the switching process, the full-well capacity value can be switched, and the switching between strong and weak light modes is realized by controlling the integral capacitance value through a switch. In the case of low light imaging, with a high gain amplifier, which ensures that the low input signal is not drowned by noise, a better sensitivity can be obtained with a high gain amplifier, which further improves the efficiency if CDS operation is also used.

Drawings

Fig. 1 is a circuit diagram of a switchable pixel structure according to one embodiment of the invention.

Wherein reference numerals include: the capacitive feedback operational amplifier 1, a feedback capacitor 2, a first dual-purpose capacitor 3, a second dual-purpose capacitor 4, a reset switch 5, a first switch 6, a second switch 7, a third switch 8, a clamp switch 9, a pixel reading circuit 10, a source follower 11 and a photoelectric detector 12.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not to be construed as limiting the invention.

The present invention provides an innovative pixel readout architecture that allows a pixel to operate in either a high sensitivity mode or a high capacity mode. The switching of different modes is timed by a dual-purpose capacitor. The dual-purpose capacitor is used to store the pixel reset signal and allow CDS within the pixel in the high sensitivity mode. In this mode, the feedback coefficient of the operational amplifier is low, and the gain of the operational amplifier is high. Therefore, in this mode, the pixels are selected for high-sensitivity imaging, and have a high signal-to-noise ratio and CDS function, so that the influence of noise on signal measurement can be further reduced. In the high-capacity mode, a dual-purpose capacitor is used to increase the capacitance of the CTIA feedback loop, thereby reducing the gain of the operational amplifier, which means that a larger range of input signals can fit the charge accumulation capability of the pixel. In this mode, the pixels are optimized to have a higher dynamic range.

The invention provides effective utilization of limited space and expansion of the capacitance of a pixel. As the demand for higher arrays and smaller pixel pitches increases, the available area of the large capacity capacitor required for CDS functions or low gain functions becomes smaller and smaller. However, as the pixel gain decreases, the importance of the CDS function decreases, as lower CTIA gain reduces the effect of reset noise. The present invention achieves this balance by enabling the dual-purpose capacitor to be utilized where the sensor function is selected. The present invention implements an innovative circuit for two mode switching that can switch between a first mode with high gain, performing intra-pixel correlated double sampling, and a second mode with high capacity.

The switchable pixel structure provided by the embodiment of the invention will be described in detail below.

Fig. 1 shows a circuit of a switchable pixel structure according to an embodiment of the invention.

As shown in fig. 1, the switchable pixel structure provided by the invention comprises a capacitive feedback operational amplifier 1, a feedback capacitor 2, a first dual-purpose capacitor 3, a second dual-purpose capacitor 4, a reset switch 5, a first switch 6, a second switch 7, a third switch 8, a clamp switch 9 and a clamp voltage source VCLAMP; the inverting input end of the capacitive feedback operational amplifier 1 is connected with the photoelectric detector 12, and the non-inverting input end of the capacitive feedback operational amplifier 1 is connected with the reset voltage VRESET; two ends of the reset switch 5 are respectively connected with the output end of the capacitive feedback operational amplifier 1 and the inverting input end of the capacitive feedback operational amplifier 1; one end of the feedback capacitor 2 is connected with the inverting input end of the capacitor feedback operational amplifier 1, and the other end is connected with the third change-over switch 8 in series and then connected with the pixel readout circuit 10; the first switch 6 is connected in series with the first dual-purpose capacitor 3 and then connected to two ends of the feedback capacitor 2, one end of the second switch 7 is connected between the first switch 6 and the first dual-purpose capacitor 3, and the other end is connected between the third switch 8 and the feedback capacitor 2; a clamp voltage source VCLAMP is connected between the third transfer switch 8 and the pixel readout circuit 10 through a clamp switch 9; one end of the second dual-purpose capacitor 4 is connected between the pixel reading circuit 10 and the third change-over switch 8, and the other end is connected with the pixel reading circuit 10.

The pixel reading circuit 10 includes a source follower 11, a gate of the source follower 11 is connected to the third switch 8, a drain of the source follower 11 is grounded, a source of the source follower 11 is taken as an output pix_out, and the other end of the second dual-purpose capacitor 4 is connected to the drain of the source follower 11.

Before imaging starts, the capacitive feedback operational amplifier 1 must be reset, the reset switch 5 is closed, the output terminal of the capacitive feedback operational amplifier 1 is short-circuited to the inverting input terminal, and the node voltage must be reset to VRESET.

The second change-over switch 7 is closed, the first change-over switch 6 and the third change-over switch 8 are opened, the pixel is switched into a high-sensitivity mode, and the clamp power supply VCLAMP is connected through closing the clamp switch 9, so that the CDS function in the pixel is realized. After releasing the clamp voltage, the reset level will be stored across the first dual-purpose capacitor 3. The CDS side of the capacitor follows the normal integration of the charge from the CTIA to the integration node and is the final signal level of the pixel, i.e. the difference between the amount of charge at node 220 and the clamp value previously placed on node 219 and stored on the first dual-purpose capacitor 3. In this high sensitivity mode, only the capacitance of feedback capacitance 2 sets the gain of the CTIA circuit.

The second switch 7 is opened and the first switch 6 and the third switch 8 are closed to switch the pixel to a high capacity mode, at which time the first dual-purpose capacitor 3 is connected in parallel with the feedback capacitor 2, thereby increasing the total capacitance of the feedback loop of the capacitive feedback operational amplifier 1 and reducing the CTIA gain. The total capacitance of the feedback loop of the capacitance feedback operational amplifier 1 is increased, so that the circuit can work normally in strong light environment, and high performance in strong light and weak light environment can be realized.

When the rolling shutter exposure is performed, the second dual-purpose capacitor 4 is used as a secondary integration capacitor, and the capacitance is increased based on the interelectrode capacitance of the source follower 11.

When global shutter pixel exposure is performed, the second dual-purpose capacitor 4 can be used as a signal storage capacitor, and the signal voltage obtained through integration is controlled by the third change-over switch 8 to be stored on the second dual-purpose capacitor 4, so that unified storage of signals is realized, and further, row-by-row signal reading is performed.

When global shutter pixel exposure is performed, the first switch 6 is turned off, the second switch 7 is turned off, all pixels are exposed simultaneously, and if charges are stored on the first dual-purpose capacitor 3, and pixels of different rows are read out, exposure time is inconsistent, so that the second dual-purpose capacitor 4 is introduced by closing the third switch 8, and simultaneous exposure of pixels is realized.

In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.

While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.

The above embodiments of the present invention do not limit the scope of the present invention. Any of various other corresponding changes and modifications made according to the technical idea of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A switchable pixel structure comprising: the capacitor feedback operational amplifier, the feedback capacitor, the first dual-purpose capacitor, the second dual-purpose capacitor, the reset switch, the first change-over switch, the second change-over switch, the third change-over switch, the clamp switch and the clamp voltage source; the inverting input end of the capacitive feedback operational amplifier is connected with the photoelectric detector, and the non-inverting input end of the capacitive feedback operational amplifier is connected with the reset voltage; the two ends of the reset switch are respectively connected with the output end and the inverting input end of the capacitor feedback operational amplifier; one end of the feedback capacitor is connected with the inverting input end of the capacitor feedback operational amplifier, and the other end of the feedback capacitor is connected with the third change-over switch in series and then connected with the pixel readout circuit; the first change-over switch is connected with the first dual-purpose capacitor in series and then is connected with two ends of the feedback capacitor, one end of the second change-over switch is connected between the first change-over switch and the first dual-purpose capacitor, and the other end of the second change-over switch is connected between the third change-over switch and the feedback capacitor; the clamping voltage source is connected between the third change-over switch and the pixel readout circuit through the clamping switch; one end of the second dual-purpose capacitor is connected between the pixel reading circuit and the third change-over switch, and the other end of the second dual-purpose capacitor is connected with the pixel reading circuit; the pixel reading circuit comprises a source electrode follower, wherein a grid electrode of the source electrode follower is connected with the third change-over switch, a drain electrode of the source electrode follower is grounded, a source electrode of the source electrode follower is used as output, and the other end of the second dual-purpose capacitor is connected with the drain electrode of the source electrode follower.