CN112735315A

CN112735315A - Display panel and display device

Info

Publication number: CN112735315A
Application number: CN202011627772.XA
Authority: CN
Inventors: 陈惠莹; 邹宗骏; 孙莹; 许育民
Original assignee: Xiamen Tianma Microelectronics Co Ltd
Current assignee: Xiamen Tianma Microelectronics Co Ltd
Priority date: 2020-12-31
Filing date: 2020-12-31
Publication date: 2021-04-30
Anticipated expiration: 2040-12-31
Also published as: CN112735315B

Abstract

The application discloses a display panel and a display device, which relate to the technical field of display and are provided with a display area, a non-display area, a first scanning line and a second scanning line, wherein the first scanning line and the second scanning line are positioned in the display area; the grid driving circuit is positioned in the non-display area and comprises a plurality of cascaded shift registers, at least part of the shift registers comprise a first signal output end and a second signal output end, the first signal output end is electrically connected with the first scanning line, and the second signal output end is electrically connected with the second scanning line; the first signal output end and the second signal output end synchronously output the first effective pulse signal at the same time. This application is through the mode that will adopt to add the second scanning line, and the driving capability of reinforcing display panel improves display panel's display effect.

Description

Display panel and display device

Technical Field

The present application relates to the field of display technologies, and in particular, to a display panel and a display device.

Background

With the development of Display technology, Liquid Crystal Display (LCD) panels and Organic Light Emitting Display (OLED) panels have become two major Display panels in the Display field, and are widely used in computers, mobile phones, wearable devices, vehicles, and other applications.

Generally, based on the LCD and the OLED, each of the LCD and the OLED includes a display area and a non-display area surrounding the display area, the display area includes a plurality of rows and columns of sub-pixels and a plurality of scan lines, each of which connects one row of sub-pixels. The non-display area comprises a grid driving circuit, and the grid driving circuit is used for generating scanning signals and transmitting the scanning signals to scanning lines so as to control sub-pixels in the display area to be lightened line by line. However, the scanning signal generated by the gate driving circuit has a fixed frequency, and the scanning time for each row of sub-pixels is fixed, so when the width and length of the display panel are large and the scanning line is long, the position with the maximum load on the scanning line is inevitably generated, and the display effect of the display position corresponding to the position is poor.

Disclosure of Invention

In view of this, the present disclosure provides a display panel and a display device, which increase the driving capability of the display panel by adding the second scan line, so as to improve the display effect of the display panel.

In order to solve the technical problem, the following technical scheme is adopted:

in a first aspect, the present application provides a display panel provided with a display area and a non-display area at least partially surrounding the display area, the display panel comprising:

the display device comprises a first scanning line and a second scanning line, wherein the first scanning line and the second scanning line are positioned in a display area, the first scanning line comprises a first end and a second end, the second scanning line comprises a first end and a second end, and the first scanning line and the second scanning line both extend along a first direction and are arranged along a second direction; the second scanning line is electrically connected with the first scanning line, and the first direction is intersected with the second direction;

the grid driving circuit is positioned in the non-display area and comprises a plurality of cascaded shift registers, at least part of the shift registers comprise a first signal output end and a second signal output end, the first signal output end is electrically connected with the first scanning line, and the second signal output end is electrically connected with the second scanning line; the first signal output end and the second signal output end synchronously output the first effective pulse signal at the same time.

In a second aspect, the present application further provides a display device, including a display panel, where the display panel is the display panel provided in the present application.

Compared with the prior art, the display panel and the display device provided by the invention at least realize the following beneficial effects:

the display panel and the display device provided by the application are provided with a first scanning line, and are further provided with a second scanning line, wherein the second scanning line is electrically connected with the position with the largest load in the first scanning line, the first scanning line is electrically connected with the first signal output end of the shift register, the second scanning line is electrically connected with the second signal output end of the shift register, the first signal output end and the second signal output end synchronously output a first effective pulse signal at the same time, so that the second scanning line compensates the position with the largest load in the first scanning line, the position with the larger load in the first scanning line can still input the effective scanning signal, the charging time of the first scanning line is sufficient, the driving capability of the display panel is enhanced, and the display effect of the display panel is improved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;

fig. 2 is a schematic connection diagram of a shift register according to an embodiment of the present application;

fig. 3 is a schematic partial structure diagram of a display panel according to an embodiment of the present disclosure;

fig. 4 is a schematic partial structure diagram of a display panel according to an embodiment of the present disclosure;

fig. 5 is a schematic partial structure diagram of a display panel according to an embodiment of the present disclosure;

fig. 6 is a schematic partial structure diagram of a display panel according to an embodiment of the present disclosure;

fig. 7 is a schematic partial structure diagram of a display panel according to an embodiment of the present disclosure;

fig. 8 is a cross-sectional view of a display panel according to an embodiment of the present application;

fig. 9 is a schematic structural diagram of a display device according to an embodiment of the present disclosure.

Detailed Description

As used in the specification and in the claims, certain terms are used to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This specification and claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. "substantially" means within an acceptable error range, within which a person skilled in the art can solve the technical problem to substantially achieve the technical result. Furthermore, the term "coupled" is intended to encompass any direct or indirect electrical coupling. Thus, if a first device couples to a second device, that connection may be through a direct electrical coupling or through an indirect electrical coupling via other devices and couplings. The description which follows is a preferred embodiment of the present application, but is made for the purpose of illustrating the general principles of the application and not for the purpose of limiting the scope of the application. The protection scope of the present application shall be subject to the definitions of the appended claims. The same parts between the embodiments are not described in detail.

The following detailed description is to be read in connection with the drawings and the detailed description.

Fig. 1 is a schematic structural diagram of a display panel 100 according to an embodiment of the present application, and fig. 2 is a schematic connection diagram of a shift register 60 according to an embodiment of the present application, please refer to fig. 1 and fig. 2, the present application provides a display panel 100 having a display area 10 and a non-display area 20 at least partially surrounding the display area 10, the display panel 100 includes:

a first scan line 30 and a second scan line 40 located in the display area 10, the first scan line 30 including a first end 31 and a second end 32, the second scan line 40 including a first end 41 and a second end 42, the first scan line 30 and the second scan line 40 both extending along a first direction D1 and being arranged along a second direction D2; the second scan line 40 is electrically connected to the first scan line 30, and the first direction D1 intersects the second direction D2;

a gate driving circuit 50 disposed in the non-display region 20, the gate driving circuit 50 including a plurality of cascaded shift registers 60, at least a portion of the shift registers 60 including a first signal output terminal Gout1 and a second signal output terminal Gout2, the first signal output terminal Gout1 being electrically connected to the first scan line 30, and the second signal output terminal Gout2 being electrically connected to the second scan line 40; the first signal output terminal Gout1 and the second signal output terminal Gout2 synchronously output the first valid pulse signal at the same time.

It should be noted that the embodiment shown in fig. 1 only schematically shows a part of the structure included in the display area 10 and the non-display area 20, and does not represent the specific size thereof, wherein the number of the shift registers 60 and the scan lines does not represent the actual number, and the number of the sub-pixels Pixel in the Pixel row does not represent the actual number; the embodiment shown in fig. 2 only schematically illustrates an implementation manner in which one shift register 60 electrically connects two scan lines, and of course, other structures are included in the shift register 60, and the present application is not limited in detail.

Specifically, as shown in fig. 1 and fig. 2, the display panel 100 of the present application is provided with a display area 10 and a non-display area 20, a first scan line 30 and a second scan line 40 are disposed in the display area 10, the first scan line 30 and the second scan line 40 both extend along a first direction D1 and are arranged along a second direction D2, the second scan line 40 is electrically connected to the first scan line 30, and optionally, there are a plurality of positions where the first scan line 30 is electrically connected to the second scan line 40. The display device further comprises a plurality of Data lines Data, wherein the Data lines Data and the scan lines define a plurality of sub-pixels, the plurality of sub-pixels are arranged along the first direction D1 to form a Pixel row, optionally, the sub-pixels in the same Pixel row are all connected with one scan line, wherein the first scan line 30 in the display device is electrically connected with the sub-pixels in the Pixel row, and the second scan line 40 is electrically connected with the first scan line 30.

Further, a gate driving circuit 50 is disposed in the non-display region 20, the gate driving circuit 50 includes a plurality of cascaded shift registers 60, that is, in adjacent two shift registers 60, the signal output terminal in the shift register 60 of the previous stage is electrically connected to the signal input terminal in the shift register 60 of the next stage, as the shift signal terminal next shown in fig. 1, at least a portion of the shift register 60 includes a first signal output terminal Gout1 and a second signal output terminal Gout2, the first signal output terminal Gout1 is electrically connected to the first scan line 30, the second signal output terminal Gout2 is electrically connected to the second scan line 40, the first signal output terminal Gout1 and the second signal output terminal Gout2 simultaneously output the first valid pulse signal in synchronization, the first signal output terminal Gout1, the second signal output terminal Gout2 and the shift signal terminal next may output the same signal synchronously or different signals simultaneously. In general, since the scanning time of each row of pixel rows is fixed, when the width and length of the display panel are large, the length of the scan line is long, and there is a position with a large load in the scan line, for example, a position far away from the signal output terminal of the shift register along the extending direction of the scan line, which results in insufficient charging time of the scan line, causing the problem of deviation of the effective pulse signal of the signal output terminal, slow rising, and the like, and causing the display panel to be abnormal, in the present application, on the basis of providing the first scan line 30, the second scan line 40 is further provided, the second scan line 40 is electrically connected to the first scan line 30, the first scan line 30 is electrically connected to the pixel rows in the display panel 100, and the first scan line 30 is electrically connected to the first signal output terminal Gout1 of the shift register 60, the second scan line 40 is electrically connected to the second signal output terminal Gout2 of the shift register 60, the first effective pulse signal is synchronously output by the first signal output end Gout1 and the second signal output end Gout2, the second scanning line 40 compensates the position with the largest load in the first scanning line 30, the second scanning line directly transmits the effective pulse signal to the position with the larger load on the first scanning line, the problem of insufficient driving capability at the position with the larger load in the scanning line in the prior art is solved, and therefore the charging time of the first scanning line 30 is sufficient, the driving capability of the display panel 100 is enhanced, and the display effect of the display panel 100 is improved.

It should be noted that the sub-Pixel of the present application is electrically connected to the Pixel driving circuit, and if the thin film transistor in the Pixel driving circuit is an N-type thin film transistor, the scan signal output by the first signal output terminal Gout1 and the second signal output terminal Gout2 jumps from a low level state to a high level state and then triggers the data signal to be transmitted to the sub-Pixel for charging, that is, the type of the first effective pulse signal is a positive pulse; if the thin film transistors in the Pixel driving circuit are P-type thin film transistors, the scan signals output by the first signal output terminal Gout1 and the second signal output terminal Gout2 jump from a high level state to a low level state and then trigger the data signals to be transmitted to the sub-pixels Pixel for charging, that is, the type of the first effective pulse signal is a negative pulse.

Further, with reference to fig. 2, the following describes, by way of specific example, that the first scan line 30 and the second scan line 40 output valid pulse signals simultaneously, and the present application further includes a first clock signal line Ckv1 and a second clock signal line Ckv 2; the shift register 60 includes a latch 61, a first and logic operation circuit 62, and a first buffer 63; a clock signal input terminal of latch 61 is electrically connected to first clock signal line Ckv1, and an input terminal of latch 61 is electrically connected to an output terminal of latch 61 in upper shift register 60; a first input terminal of the first and logic operation circuit 62 is electrically connected to the output terminal of the latch 61, and a second input terminal of the first and logic operation circuit 62 is electrically connected to the second clock signal line Ckv 2; the output end of the first and logic operation circuit 62 is electrically connected to the input end of the first buffer 63, and the output end of the first buffer 63 is connected to the first end 31 of the first scan line 30;

further, the shift register 60 further includes a second and logic operation circuit 64 and a second buffer 65, a first input terminal of the second and logic operation circuit 64 is electrically connected to the output terminal of the latch 61, a second input terminal of the second and logic operation circuit 64 is electrically connected to the second clock signal line Ckv2, an output terminal of the second and logic operation circuit 64 is electrically connected to an input terminal of the second buffer 65, and an output terminal of the second buffer 65 is connected to the first terminal 41 of the second scan line 40. Through the above structural arrangement, it is realized that the same shift register 60 includes two output ends, and simultaneously and synchronously inputs effective pulse signals to the scanning lines.

Optionally, fig. 3 is a schematic partial structure diagram of a display panel provided in an embodiment of the present application, please refer to fig. 3, in which the first scan line 30 and the second scan line 40 are located on different layers and electrically connected through a via 70.

Specifically, referring to fig. 3, in the present embodiment, the first scan line 30 and the second scan line 40 are located at different layers and electrically connected through the via 70, so as to transmit the scan signal from the second scan line 40 to the first scan line 30, and further, to transmit the scan signal from the second scan line 40 to the position with the largest load in the first scan line 30, so as to implement load compensation for the first scan line 30. In addition, the first scanning line 30 and the second scanning line 40 are arranged in different layers, which is beneficial to reducing the space occupied by the second scanning line 40 in the display area after the second scanning line 40 is increased, and is beneficial to improving the screen occupation ratio.

Alternatively, as shown in fig. 3, the gate driving circuit 50 is a single-side driving circuit;

the second end 32 of the first scan line 30 is electrically connected to the second end 42 of the second scan line 40.

Specifically, as shown in fig. 3, the gate driving circuit 50 is a single-side driving circuit, wherein the second end 32 of the first scan line 30 is electrically connected to the second end 42 of the second scan line 40, when the gate driving circuit 50 is the single-side driving circuit, one end of the first scan line 30 away from the shift register 60 is the second end 32 of the first scan line 30, and when the width and length of the display panel 100 are relatively large, the second end 32 of the first scan line 30 is the position with the largest load, and the second end 32 of the first scan line 30 needs to be compensated, so that the scan signal can reach the second end 32 of the first scan line 30 sufficiently, thereby enhancing the driving capability of the display panel 100.

Optionally, as shown in fig. 3, the second end 32 of the first scan line 30 is electrically connected to the second end 42 of the second scan line 40 through a plurality of vias 70;

the distance between two adjacent vias 70 gradually increases along the direction in which the second end 32 of the first scan line 30 points to the first end 31.

Specifically, please refer to fig. 3 continuously, the first scan line 30 and the second scan line 40 are electrically connected by a plurality of vias 70, and the distance between two adjacent vias 70 gradually increases along the direction that the second end 32 of the first scan line 30 points to the first end 31, such as L1 and L2 in fig. 3, the load of the L1 region is larger, and the load of the L2 region is smaller, so that the compensation of the region signal with larger load is more sufficient, and therefore, the distance of L1 is smaller than the distance of L2, it can be understood that the load of the second end 42 of the second scan line 40 is the largest, and in order to achieve a better compensation effect, the density of the vias 70 at the second end 42 of the second scan line 40 can be set to be larger, and the density of the vias 70 gradually decreases along the direction of load reduction, and the vias 70 can be reasonably manufactured on the basis of achieving better compensation load.

Alternatively, fig. 4 is a schematic diagram of another partial structure of the display panel provided in the embodiment of the present application, fig. 5 is a schematic diagram of another partial structure of the display panel provided in the embodiment of the present application, please refer to fig. 4 and fig. 5, in which the gate driving circuit 50 is a dual-side driving circuit;

the non-display area 20 is further provided with a first frame area 21 and a second frame area 22, the plurality of cascaded shift registers 60 includes a plurality of cascaded first shift registers 61 located in the first frame area 21, and a plurality of cascaded second shift registers 62 located in the second frame area 22, at least a part of the first shift registers 61 or the second shift registers 62 includes a first signal output terminal Gout1 and a second signal output terminal Gout 2;

the first end 31 and the second end 32 of each first scanning line 30 are electrically connected to a first shift register 61 and a second shift register 62, respectively, and the first shift register 61 and the second shift register 62 electrically connected to one first scanning line 30 form a shift register group.

It should be noted that the embodiments shown in fig. 4 and fig. 5 only schematically show the electrical connection relationship diagram of a part of the shift register 60, wherein the number of the sub-pixels Pixel electrically connected to the first scan line 30 does not represent the actual number.

Specifically, as shown in fig. 4 and fig. 5, the gate driving circuit 50 is dual-side driven, the shift registers 60 are disposed on two opposite sides of the non-display area 20, that is, the first frame area 21 is disposed with a plurality of cascaded first shift registers 61, the second frame area 22 is disposed with a plurality of cascaded second shift registers 62, at least a portion of the first shift registers 61 includes a first signal output terminal Gout1 and a second signal output terminal Gout2, or at least a portion of the second shift registers 62 includes a first signal output terminal Gout1 and a second signal output terminal Gout2, the first end 31 of each first scan line 30 is electrically connected to one first shift register 61, the second end 32 of each first scan line 30 is electrically connected to one second shift register 62, the first shift register 61 and the second shift register 62 electrically connected to the same first scan line 30 form a shift register group, one shift register group corresponds to one first scanning line 30 and one second scanning line 40. Thus, the gate driving circuit 50 with dual-side driving has stronger driving capability, and the display effect of the display panel 100 is improved.

Optionally, as shown in fig. 4 and fig. 5, the first end 41 of the second scan line 40 is electrically connected to the first shift register 61 or the second shift register 62, and the second end 42 of the second scan line 40 electrically connected to the same shift register group is electrically connected to the first position 33 of the first scan line 30, wherein a distance between the first position 33 of the first scan line 30 and the first end 31 of the first scan line 30 is equal to a distance between the first position 33 of the first scan line 30 and the second end 32 of the first scan line 30 within the error tolerance range.

In the embodiment shown in fig. 4 and 5, the second scan line may be electrically connected to the first shift register 61, or may be electrically connected to the second shift register 62, that is, the first shift register 61 may be used to provide a scan signal to the second scan line 40, or the second shift register 62 may be used to provide a scan signal to the second scan line 40.

Specifically, with continuing reference to fig. 4 and fig. 5, in the present embodiment, the first end 41 of the second scan line 40 is electrically connected to the first shift register 61 or the second shift register 62, it can be understood that each of the first scan lines 30 is correspondingly provided with one second scan line 40, when the gate driving circuit 50 is in the dual-side driving mode, both ends of the first scan line 30 are electrically connected to the shift register 60, and one end of the second scan line 40 is electrically connected to the shift register 60, alternatively, one end of the second scan line 40 may be electrically connected to both the first shift register 61 located in the first frame region 21 and the second shift register 62 located in the second frame region 22, and the other end of the second scan line 40 is electrically connected to the first scan line 30, because when the gate driving circuit 50 is in the dual-side driving mode, the load at the middle position of the first scan line 30 is the largest, therefore, the other end of the second scan line 40 is electrically connected to the middle position of the first scan line 30, i.e. the first position 33, and the distance between the first position 33 and the first end 31 of the first scan line 30 is equal to the distance between the second end 32 of the first scan line 30 within the allowable error range, so that the second scan line 40 compensates the position where the first scan line 30 is most loaded, so as to enhance the driving capability of the display panel 100.

Optionally, fig. 6 is a schematic partial structure view of another display panel provided in the embodiment of the present application, please refer to fig. 6, in which a first end 41 of one second scan line 40 of two adjacent second scan lines 40 is electrically connected to the first shift register 61, and a first end 41 of the other second scan line 40 is electrically connected to the second shift register 62.

It should be noted that the embodiment shown in fig. 6 only schematically shows the electrical connection relationship diagram of a part of the shift register 60, wherein the number of the sub-pixels Pixel electrically connected to the first scan line 30 does not represent the actual number.

Specifically, as shown in fig. 6, based on that the first end 41 of the second scan line 40 can be electrically connected to both the first shift register 61 and the second shift register 62, in this embodiment, in two adjacent second scan lines 40, the first end 41 of one second scan line 40 is electrically connected to the first shift register 61, and the first end 41 of the other second scan line 40 is electrically connected to the second shift register 62, it can be understood that the second scan lines 40 are alternately arranged, so that the alternate driving of the second scan lines 40 is beneficial to reduce the burden of single-side driving.

Optionally, fig. 7 is a schematic partial structure diagram of another display panel provided in the embodiment of the present application, please refer to fig. 7, in which a first end 41 and a second end 42 of each second scan line 40 are electrically connected to a first shift register 61 and a second shift register 62 in the same shift register group, respectively;

the first position 43 of the second scan line 40 electrically connected to the same shift register set is electrically connected to the first position 33 of the first scan line 30, wherein the distance between the first position 43 of the second scan line 40 and the first end 41 of the second scan line 40 is equal to the distance between the first position 43 of the second scan line 40 and the second end 42 of the second scan line 40 within the error tolerance.

It should be noted that the embodiment shown in fig. 7 only schematically shows the electrical connection relationship diagram of a part of the shift register 60, wherein the number of the sub-pixels Pixel electrically connected to the first scan line 30 does not represent the actual number.

Specifically, with reference to fig. 7 and fig. 1, the first end 41 and the second end 42 of each second scan line 40 are electrically connected to the first shift register 61 and the second shift register 62 in the same shift register group, respectively, it can be understood that when the gate driving circuit 50 is dual-side driving, both ends of the second scan line 40 are electrically connected to the shift register 60, so as to reduce the burden of single-side driving. Further, the first position 43 of the second scan line 40 electrically connected to the same shift register group is electrically connected to the first position 33 of the first scan line 30, and it can be understood that the first position 43 of the second scan line 40 is a middle position of the second scan line 40, and a distance between the middle position and the first end 41 of the second scan line 40 is equal to a distance between the middle position and the second end 42 of the second scan line 40, so that the load of the single-side driving is reduced, the load compensation can be performed on the first scan line 30 through the second scan line 40, and further, the signal compensation can be performed at a position where the load of the first scan line 30 is the maximum, so as to enhance the driving capability of the display panel 100.

Optionally, fig. 8 is a cross-sectional view of the display panel according to the embodiment of the present application, please refer to fig. 8 in combination with fig. 7, wherein the first end 41 and the second end 42 of each second scan line 40 are electrically connected to the first shift register 61 and the second shift register 62 in the same shift register group, respectively;

the first scanning line 30 and the second scanning line 40 which are electrically connected with the same shift register group are electrically connected through a plurality of through holes 70;

the distance between two adjacent via holes 70 gradually increases along the direction that the first position 33 of the first scanning line 30 points to the first end 31 of the first scanning line 30;

the distance between two adjacent vias 70 gradually increases along the direction from the first position 33 of the first scan line 30 to the second end 32 of the first scan line 30;

wherein, the distance between the first position 33 of the first scanning line 30 and the first end 31 of the first scanning line 30 and the distance between the first position 33 of the first scanning line 30 and the second end 32 of the first scanning line 30 are equal within the error tolerance.

Specifically, as shown in fig. 7 and fig. 8, the second scan line 40 in the present embodiment is also driven bilaterally, that is, the first end 41 and the second end 42 of the second scan line 40 are electrically connected to the first shift register 61 and the second shift register 62 in the same shift register group, and the first scan line 30 and the second scan line 40 electrically connected to the same shift register group are electrically connected through the via 70. Optionally, the distance between two adjacent vias 70 increases along the direction in which the first position 33 of the first scan line 30 points to the first end 31 of the first scan line 30, i.e. along the third direction D3 in fig. 8; along the direction from the first position 33 of the first scan line 30 to the second end 32 of the first scan line 30, the distance between two adjacent vias 70 gradually increases (see fig. 8), it is understood that the via holes 70 electrically connecting the first scan line 30 and the second scan line 40 are concentrated in the middle position area of the first scan line 30, and the more the density of the vias 70 located at the middle position is increased, the more the density of the vias 70 located away from the middle position is decreased, i.e., L4 > L3 in fig. 8, the density of the vias 70 depends on the load size of the first scan line 30, when the dual-side driving is performed, the position where the load is the largest is located in the middle region of the first scan line 30, and thus, signal compensation is required, the signal compensation form of electrically connecting the plurality of via holes 70 is adopted, so that the signal compensation of the area with the maximum load of the first scan line 30 can be more sufficient, and the driving capability of the display panel 100 can be improved more favorably.

Optionally, as shown in fig. 1, a plurality of sub-pixels Pixel are further included, and a distance between two adjacent vias 70 is greater than a distance between two adjacent sub-pixels Pixel.

Specifically, as shown in fig. 1, the distance between two adjacent vias 70 in this embodiment needs to be greater than the distance between two adjacent sub-Pixel pixels. When the distance between two adjacent via holes 70 is too small, the requirement on the manufacturing process is higher, increasing the difficulty, and when the distance between two adjacent via holes 70 is too large, the load of the first scan line cannot be compensated well, and a good effect cannot be achieved.

Optionally, please refer to fig. 8 in combination with fig. 1, which further includes: a first metal layer 35 and a second metal layer 45;

the first scan line 30 is located on the first metal layer 35, and the second scan line 40 is located on the second metal layer 45.

An insulating layer 80 is further provided between the first metal layer 35 and the second metal layer 45.

Specifically, as shown in fig. 1, in the present embodiment, the display panel 100 further includes a first metal layer 35 and a second metal layer 45, where the first metal layer 35 may be a gate layer or a source/drain layer of a thin film transistor in the pixel driving circuit, and the second metal layer 45 is an additional film layer and is specially used for setting the second scan line 40, and a resistivity of the second metal layer 45 is smaller than a resistivity of the first metal layer 35, so that attenuation of the scan signal when the second scan line 40 is set in other film layers can be effectively avoided, and the scan signal on the second scan line 40 can be more effectively transmitted to the first scan line 30.

Based on the same inventive concept, the present application further provides a display device 200, fig. 9 is a schematic structural diagram of the display device 200 provided in the present application, please refer to fig. 9, the display device 200 provided in the present application includes a display panel 100, wherein the display panel 100 is the display panel 100 provided in any of the embodiments of the present application.

It should be noted that, for the embodiments of the display device 200 provided in the embodiments of the present application, reference may be made to the embodiments of the display panel 100, and repeated descriptions are omitted. The display device 200 provided by the present application may be: any product or component with practical functions such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.

According to the embodiments, the application has the following beneficial effects:

the display panel 100 and the display device 200 provided by the present application adopt a manner of further providing the second scan line 40 on the basis of providing the first scan line 30, the second scan line 40 is electrically connected to the position with the largest load in the first scan line 30, the first scan line 30 is electrically connected to the first signal output terminal Gout1 of the shift register 60, the second scan line 40 is electrically connected to the second signal output terminal Gout2 of the shift register 60, the first signal output terminal Gout1 and the second signal output terminal Gout2 synchronously output the first effective pulse signal at the same time, so that the second scan line 40 compensates the position with the largest load in the first scan line 30, the charging time of the first scan line 30 is sufficient, the driving capability of the display panel 100 is enhanced, and the display effect of the display panel 100 is improved.

The foregoing description shows and describes several preferred embodiments of the present application, but as aforementioned, it is to be understood that the application is not limited to the forms disclosed herein, but is not to be construed as excluding other embodiments and is capable of use in various other combinations, modifications, and environments and is capable of changes within the scope of the inventive concept as expressed herein, commensurate with the above teachings, or the skill or knowledge of the relevant art. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the application, which is to be protected by the claims appended hereto.

Claims

1. A display panel provided with a display area and a non-display area at least partially surrounding the display area, the display panel comprising:

the first scanning line and the second scanning line are positioned in the display area, the first scanning line comprises a first end and a second end, the second scanning line comprises a first end and a second end, and the first scanning line and the second scanning line extend along a first direction and are arranged along a second direction; the second scanning line is electrically connected with the first scanning line, and the first direction intersects with the second direction;

the grid driving circuit is positioned in the non-display area and comprises a plurality of cascaded shift registers, at least part of the shift registers comprise a first signal output end and a second signal output end, the first signal output end is electrically connected with the first scanning line, and the second signal output end is electrically connected with the second scanning line; wherein the first signal output terminal and the second signal output terminal synchronously output a first effective pulse signal at the same time.

2. The display panel according to claim 1, wherein the first scan line and the second scan line are located on different layers and are electrically connected by a via.

3. The display panel according to claim 2, wherein the gate driving circuit is single-side driven;

and the second end of the first scanning line is electrically connected with the second ends of the two scanning lines.

4. The display panel according to claim 3, wherein a second end of the first scan line and a second end of the second scan line are electrically connected through a plurality of the vias;

and the distance between every two adjacent via holes is gradually increased along the direction that the second end of the first scanning line points to the first end.

5. The display panel according to claim 2, wherein the gate driving circuit is bilateral driving;

the non-display area is further provided with a first frame area and a second frame area, the plurality of cascaded shift registers comprise a plurality of cascaded first shift registers located in the first frame area, and a plurality of cascaded second shift registers located in the second frame area, and at least part of the first shift registers or the second shift registers comprise the first signal output end and the second signal output end;

the first end and the second end of each first scanning line are respectively and electrically connected with one first shift register and one second shift register, and one first shift register and one second shift register which are electrically connected with one first scanning line form a shift register group.

6. The display panel according to claim 5, wherein a first end of the second scan line is electrically connected to the first shift register or the second shift register, and a second end of the second scan line electrically connected to the same shift register group is electrically connected to a first position of the first scan line, wherein a distance between the first position of the first scan line and the first end of the first scan line is equal to a distance between the first position of the first scan line and the second end of the first scan line within an error tolerance range.

7. The display panel according to claim 6,

in two adjacent second scanning lines, a first end of one of the second scanning lines is electrically connected with the first shift register, and a first end of the other second scanning line is electrically connected with the second shift register.

8. The display panel according to claim 5, wherein a first end and a second end of each of the second scan lines are electrically connected to a first shift register and a second shift register of the same shift register group, respectively;

and a first position of the second scanning line electrically connected with the same shift register group is electrically connected with a first position of the first scanning line, wherein the distance between the first position of the second scanning line and the first end of the second scanning line is equal to the distance between the first position of the second scanning line and the second end of the second scanning line within an error allowance range.

9. The display panel according to claim 5, wherein a first end and a second end of each of the second scan lines are electrically connected to a first shift register and a second shift register of the same shift register group, respectively;

the first scanning line and the second scanning line which are electrically connected with the same shift register group are electrically connected through a plurality of through holes;

the distance between every two adjacent via holes is gradually increased along the direction from the first position of the first scanning line to the first end of the first scanning line;

the distance between every two adjacent via holes is gradually increased along the direction from the first position of the first scanning line to the second end of the first scanning line;

wherein a distance between the first position of the first scan line and the first end of the first scan line and a distance between the first position of the first scan line and the second end of the first scan line are equal within an error tolerance range.

10. The display panel according to claim 2, further comprising a plurality of sub-pixels, wherein a distance between two adjacent via holes is greater than a distance between two adjacent sub-pixels.

11. The display panel according to claim 1, further comprising: a first metal layer and a second metal layer;

the first scanning line is located on the first metal layer, and the second scanning line is located on the second metal layer.

12. A display device characterized by comprising the display panel according to any one of claims 1 to 11.