CN112732001A - Low-power-consumption power supply circuit, method, chip and electronic equipment - Google Patents
Low-power-consumption power supply circuit, method, chip and electronic equipment Download PDFInfo
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- CN112732001A CN112732001A CN202110353269.8A CN202110353269A CN112732001A CN 112732001 A CN112732001 A CN 112732001A CN 202110353269 A CN202110353269 A CN 202110353269A CN 112732001 A CN112732001 A CN 112732001A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Abstract
The invention provides a low-power consumption power supply circuit, a method, a chip and electronic equipment, which comprises the following steps: the voltage stabilizing module is used for generating a power supply; the logic control module is used for generating a power supply control signal and n gating signals; when the voltage stabilizing module works, the power supply control signal controls the first capacitor to be connected with the output end of the voltage stabilizing module; when the voltage stabilizing module does not work, the power supply control signal controls the first capacitor to be disconnected with the output end of the voltage stabilizing module; the gating signal is used for gating a power supply path of the corresponding power utilization circuit; wherein n is a natural number of 1 or more. The low-power-consumption power supply circuit, the method, the chip and the electronic equipment can effectively reduce the power consumption and time consumption of the LDO during starting, and further can improve the compatibility of the LDO chip.
Description
Technical Field
The invention relates to the field of integrated circuits, in particular to a low-power-consumption power supply circuit, a low-power-consumption power supply method, a low-power-consumption power supply chip and electronic equipment.
Background
A low dropout regulator (LDO) is a module capable of providing stable power, and generally has very low self-noise and high power Supply Rejection ratio (psrr), and is widely used in integrated circuit design.
The power consumption and the time consumption of the existing low dropout linear regulator are generally high when the low dropout linear regulator is started. In addition, the output bonding pad of the low dropout regulator chip is mainly used for connecting an external capacitor and an electric circuit, and because the corresponding bonding pads of the capacitor and the electric circuit are different, for the electric circuit with special placing requirements, the connecting port of the electric circuit must be connected to the corresponding bonding pad in a pull wire mode, so that the compatibility of the chip is limited.
Therefore, how to reduce power consumption and time overhead when the LDO is started and further improve compatibility of the LDO chip has become one of the problems to be solved by those skilled in the art.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention aims to provide a low power consumption power supply circuit, method, chip and electronic device.
To achieve the above and other related objects, the present invention provides a low power consumption power supply circuit, including at least:
the voltage stabilizing module is used for generating a power supply;
the logic control module is used for generating a power supply control signal and n gating signals; when the voltage stabilizing module works, the power supply control signal controls the first capacitor to be connected with the output end of the voltage stabilizing module, and when the voltage stabilizing module does not work, the power supply control signal controls the first capacitor to be disconnected with the output end of the voltage stabilizing module; the gating signal is used for gating a power supply path of the corresponding power utilization circuit; wherein n is a natural number of 1 or more.
Optionally, the logic control module further generates an enable signal, and the enable signal is used for controlling the working state of the voltage stabilizing module.
More optionally, the voltage stabilizing module includes a power switch tube, a feedback unit, an error amplifier, and an enable switch; one end of the power switch tube is connected with power supply voltage, the other end of the power switch tube is grounded through the feedback unit, and a connection node of the power switch tube and the feedback unit outputs the power supply; the error amplifier receives the feedback voltage output by the feedback unit and a reference voltage, amplifies the difference between the feedback voltage and the reference voltage and outputs the amplified difference to the control end of the power switch tube; one end of the enabling switch is connected with the power supply voltage, the other end of the enabling switch is connected with the control end of the power switch tube, the enabling switch receives the enabling signal, and when the enabling signal is effective, the voltage stabilizing module is started to work.
More optionally, the feedback unit includes a first resistor, a second resistor, and a second capacitor; one end of the first resistor is connected with the power switch tube, the other end of the first resistor is connected with one end of the second resistor, and the feedback voltage is output by a connection node of the first resistor and the second resistor; the other end of the second resistor is grounded; the second capacitor is connected in parallel with two ends of the first resistor.
More optionally, the second resistor is an adjustable resistor.
More optionally, the low power consumption power supply circuit further includes a power supply control switch; one end of the power supply control switch is connected with the output end of the voltage stabilizing module, the other end of the power supply control switch is connected with the first capacitor, and the power supply control switch receives the power supply control signal.
More optionally, the low power consumption power supply circuit further includes at least n gating switches; one end of each gating switch is connected with the output end of the voltage stabilizing module, the other end of each gating switch is connected with the power utilization circuit, and each gating switch receives the corresponding gating signal.
In order to achieve the above and other related objects, the present invention provides a low power consumption power supply method, based on the above low power consumption power supply circuit, the low power consumption power supply method at least includes:
the voltage stabilizing module starts to work, and a power supply control signal controls a first capacitor to be connected with the output end of the voltage stabilizing module;
each gating signal gates a corresponding power supply path to supply power to the power utilization circuit;
and when the power supply is finished, the voltage stabilizing module stops working, and the power supply control signal controls the first capacitor to be disconnected with the output end of the voltage stabilizing module.
Optionally, the operating state of the voltage stabilizing module is controlled based on an enable signal, and the enable signal is synchronized with the power supply control signal.
Optionally, after a first delay time elapses after the voltage stabilizing module operates, each gating signal starts to operate to supply power to each power utilization circuit.
Optionally, each gating signal controls the power supply path of each power utilization circuit to be disconnected for a second delay time, and then the power supply is determined to be finished.
To achieve the above and other related objects, the present invention provides a chip, comprising: the low-power-consumption power supply circuit and the bonding pads; each bonding pad is used for connecting or controlling the first capacitor and the power utilization circuit respectively.
Optionally, when the low-power-consumption power supply circuit includes a power supply control switch and a gating switch, each power utilization circuit is connected to a corresponding pad based on a placement position or a placement direction.
More optionally, each power consuming circuit is disposed on the chip.
To achieve the above and other related objects, the present invention provides an electronic device including: the low-power-consumption power supply circuit, the power supply control switch, the first capacitor, the n gating switches and the m power utilization circuits;
one end of the power supply control switch is connected with the output end of the low-power-consumption power supply circuit, the other end of the power supply control switch is connected with the upper polar plate of the first capacitor, and the power supply control switch receives the power supply control signal; the lower polar plate of the first capacitor is grounded;
one end of each gating switch is connected with the output end of the voltage stabilizing module, the other end of each gating switch is connected with at least one power utilization circuit, and each gating switch receives a corresponding gating signal output by the low-power-consumption power supply circuit and supplies power to the power utilization circuit based on the gating signal;
wherein m is a natural number not less than n.
To achieve the above and other related objects, the present invention provides an electronic device including: the low-power-consumption power supply circuit comprises a first capacitor, n gating switches and m power utilization circuits;
the upper polar plate of the first capacitor is connected with a power supply control switch in the low-power-consumption power supply circuit, and the lower polar plate is grounded;
one end of each gating switch is connected with the output end of the voltage stabilizing module, the other end of each gating switch is connected with at least one power utilization circuit, and each gating switch receives a corresponding gating signal output by the low-power-consumption power supply circuit and supplies power to the corresponding power utilization circuit based on the gating signal;
wherein m is a natural number not less than n.
To achieve the above and other related objects, the present invention provides an electronic device including: the low-power-consumption power supply circuit, the first capacitor and the m power utilization circuits;
the upper polar plate of the first capacitor is connected with a power supply control switch in the low-power-consumption power supply circuit, and the lower polar plate is grounded;
each circuit is respectively connected with the corresponding gating switch, and acquires a power supply based on the corresponding gating signal;
wherein m is a natural number not less than n.
Optionally, the power utilization circuit comprises a pressure sensor.
As described above, the low power consumption power supply circuit, the low power consumption power supply method, the low power consumption power supply chip, and the electronic device of the present invention have the following advantages:
the low-power-consumption power supply circuit, the method, the chip and the electronic equipment can effectively reduce the power consumption and time consumption of the LDO during starting, and further can improve the compatibility of the LDO chip.
Drawings
Fig. 1 is a schematic structural diagram of a low power consumption power supply circuit and an electronic device thereof according to the present invention.
Fig. 2 is a schematic diagram of another structure of the low power consumption power supply circuit and the electronic device thereof according to the present invention.
FIG. 3 is a schematic diagram illustrating the low power supply circuit of FIG. 2 to reduce power consumption and time overhead when the LDO is started.
Fig. 4 shows a schematic diagram of a location of a chip pad of a low power supply circuit.
FIG. 5 is a schematic diagram of a placement requirement of the sensor.
Fig. 6 is a schematic diagram illustrating the low power supply method of the present invention.
Description of the element reference numerals
1-a low power consumption power supply circuit; 11-a voltage stabilizing module; 111-a feedback unit; 112-an error amplifier; 12-a logic control module; 2-a sensor.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 6. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
Example one
As shown in fig. 1, the present embodiment provides a low power consumption power supply circuit 1, where the low power consumption power supply circuit 1 includes:
a voltage stabilizing module 11 and a logic control module 12.
As shown in fig. 1, the voltage stabilizing module 11 is configured to generate a power supply VLDO.
Specifically, in the present embodiment, the voltage stabilizing module 11 includes a power switch MP1, a feedback unit 111, an error amplifier 112, and an enable switch SW. As an example, the power switch MP1 is implemented by a PMOS device. The source of the power switch MP1 is connected to the power supply voltage VDD, and the drain is connected to the feedback unit 111 and outputs the power supply VLDO. One end of the feedback unit 111 is connected to the power switch tube MP1, and the other end is grounded GND; as an example, the feedback unit 111 includes a first resistor R1, a second resistor R2 (for example, the second resistor R2 is an adjustable resistor), and a second capacitor C2, wherein one end of the first resistor R1 is connected to the drain of the power switch MP1, the other end of the first resistor R1 is connected to one end of the second resistor R2, a connection node between the first resistor R1 and the second resistor R2 outputs a feedback voltage VFB, the other end of the second resistor R2 is connected to the ground GND, and the second capacitor C2 is connected in parallel to two ends of the first resistor R2. The error amplifier 112 receives the feedback voltage VFB and a reference voltage VBG outputted by the feedback unit 111, amplifies a difference between the feedback voltage VFB and the reference voltage VBG, and outputs the amplified difference to a control terminal (gate) of the power switch MP 1; as an example, the error amplifier 112 has a non-inverting input terminal connected to the feedback voltage VFB and an inverting input terminal connected to the reference voltage VBG; in practical use, the correspondence between the polarity of the input terminal of the error amplifier 112 and the input signal can be set according to actual needs, so as to ensure that the feedback voltage VFB is negative feedback. One end of the enable switch SW is connected to the power supply voltage VDD, and the other end of the enable switch SW is connected to the control end of the power switch MP1, the enable switch SW receives the enable signal EN _ LDO (in this embodiment, the control end of the enable switch SW is connected to the enable signal EN _ LDO via an inverter not), when the enable signal EN _ LDO is active (for example, active high), the enable switch SW is turned off, and the voltage stabilizing module 11 is enabled; when the enable signal EN _ LDO is inactive (for example, low level is inactive), the enable switch SW is turned on, and the voltage stabilization module 11 stops working; in practical use, the level corresponding to the enable signal can be set according to needs, and is not limited to this embodiment. The device types of the power switching tube can be replaced, and the connection relationship with other devices can be modified adaptively, which is not described in detail herein.
It should be noted that any circuit structure capable of generating a stable power supply VLDO is applicable to the present invention, and is not limited to this embodiment.
As shown in FIG. 1, the logic control module 12 is used for generating a power supply control signal CTL0 and n strobe signals CTL 1-CTLn. When the voltage stabilizing module 11 works, the power supply control signal CTL0 controls the first capacitor C1 to be connected with the output end of the voltage stabilizing module 11; when the voltage regulation module 11 does not work, the power supply control signal CTL0 controls the first capacitor C1 to be disconnected from the output terminal of the voltage regulation module 11. The gating signals CTL 1-CTLn are used for gating power supply paths of corresponding power utilization circuits; wherein n is a natural number of 1 or more.
As another implementation manner of the present invention, the logic control module 12 is further configured to generate an enable signal EN _ LDO of the voltage regulation module 11, where the enable signal EN _ LDO is used to control an operating state of the voltage regulation module 11.
Specifically, in the present embodiment, the logic control module 12 generates the enable signal EN _ LDO, the power supply control signal CTL0, and n strobe signals CTL 1-CTLn, and when the enable signal EN _ LDO is active (for example, active high), the voltage stabilizing module 11 is in an active state; at this time, the power supply control signal CTL0 controls the first capacitor C1 to be connected to the output terminal of the voltage stabilization module 11, so as to store and stabilize the power supply VLDO. When the enable signal EN _ LDO is inactive (for example, low level is inactive), the regulator module 11 is in a state of stopping operation; at this time, the power supply control signal CTL0 controls the first capacitor C1 to be disconnected from the output terminal of the voltage regulation module 11, so as to avoid charge leakage loss in the first capacitor C1.
Example two
The present embodiment provides a chip, which includes the power supply circuit 1 with low power consumption of the first embodiment and a plurality of pads.
Specifically, the structure and principle of the low power consumption power supply circuit 1 are not described herein again, wherein the power supply source VLDO, the power supply control signal CTL0, and the gate signals CTL1 to CTLn are respectively led out through a pad. The bonding pads corresponding to the power supply VLDO are used for supplying power to the first capacitor and the electric circuits, the bonding pads corresponding to the power supply control signals CTL0 control the connection path of the first capacitor, and the bonding pads corresponding to the gating signals CTL 1-CTLn respectively control the connection path of the electric circuits. The circuits may be disposed around the chip on which the low power consumption power supply circuit 1 is disposed as needed, including but not limited to an upper surface (surface on which pads are disposed), a lower surface, or a side surface.
EXAMPLE III
As shown in fig. 1, the present embodiment provides an electronic device, including: the low-power-consumption power supply circuit comprises a low-power-consumption power supply circuit 1, a power supply control switch SW0, a first capacitor C1, n gating switches SW 1-SWn and m sensors 2.
As shown in FIG. 1, the low power consumption power supply circuit 1 is used for providing a power supply VLDO, a power supply control signal CTL0 and n strobe signals CTL 1-CTLn.
Specifically, the structure and principle of the low power consumption power supply circuit 1 are described in the first embodiment, which is not described herein again.
As shown in fig. 1, one end of the power supply control switch SW0 is connected to the output end of the voltage regulator module 11, and the other end is connected to the upper plate of the first capacitor C1, and the power supply control switch SW0 receives the power supply control signal CTL 0. The lower plate of the first capacitor C1 is grounded.
As shown in fig. 1, one end of each of the gate switches SW 1-SWn is connected to the output end of the voltage stabilizing module 11, the other end is connected to at least one sensor 2, and each of the gate switches SW 1-SWn receives the corresponding gate signal CTL 1-CTLn output by the low power supply circuit 1, and supplies power to the corresponding sensor based on the gate signal. Where n is a natural number equal to or greater than 1, and m is a natural number equal to or greater than n, in this example, n = m. It should be noted that when m sensors are simultaneously connected to be used, the load carrying capacity of the voltage stabilizing module 11 needs to be satisfied, and the value of m can be set according to actual needs and use conditions.
Specifically, as an example, each of the gate switches SW 1-SWn is connected to a sensor; in practical use, the number of the sensors corresponding to each gating switch can be set according to requirements. As an example, the sensor 2 employs a pressure sensor; in practical use, any power utilization circuit powered by the voltage stabilizing module is suitable for the invention, and is not limited to the embodiment.
Specifically, when the voltage stabilizing module 11 is normally powered, the unnecessary sensor operation loss can be avoided by only gating the necessary sensor switches. Other working principles are not described in detail herein, as long as they are referred to above.
As an implementation manner of the present invention, in this example, the low power consumption power supply circuit 1 is a chip, the control end of the power supply control switch SW0 is connected to the power supply control signal CTL0 through a pad, each of the gate switches SW1 to SWn is connected to a corresponding gate signal through a pad, and the power supply control switch SW0 and each of the gate switches SW1 to SWn are connected to the power supply VLDO through the same pad. The power supply control switch SW0 and the gating switches SW 1-SWn are arranged outside the chip and are realized by adopting relay switches. As another implementation mode of the invention, the grounding end of each sensor 2 is directly connected with the GND of the chip, and switch control is not needed, so that the material consumption can be saved or the number of the chip bonding pads can be saved.
More specifically, after the power supply voltage VDD is supplied, when the enable signal EN _ LDO is active (high level), the power supply control switch SW0 is closed, the upper plate of the first capacitor C1 is connected to the output terminal of the voltage stabilization module 11, the voltage stabilization module 11 generates a stable power supply VLDO, and the first capacitor C1 is full of charge and stabilizes the power supply VLDO; when the enable signal EN _ LDO is inactive (low level), the power supply control switch SW0 is turned off, the upper plate of the first capacitor C1 is disconnected from the output terminal of the regulator module 11, and the charge is not discharged and is stored in the first capacitor C1. As shown in fig. 2, when the enable signal EN _ LDO is asserted again (i.e., the enable signal toggles from 0 to 1), no additional charge is required to be provided to the first capacitor C1, thereby avoiding the charging process of the first capacitor C1 during power-up. If the power supply control switch SW0 is not present, when the enable signal EN _ LDO is active, the first capacitor C1 is full of charge; when the enable signal EN _ LDO is inactive, charge is drained through the feedback unit 111, as shown in fig. 2, when the enable signal EN _ LDO is active again, additional charge needs to be provided to the first capacitor C1. Obviously, the starting time T2 of the power supply VLDO after the power supply control switch SW0 is added is less than the starting time T1 without the power supply control switch; the power consumption I _ MAX2 in the startup phase after the power supply control switch SW0 is added is smaller than the power consumption IMAX1 without the power supply control switch, where I _ STA1= I _ STA2 is the power consumption of the voltage stabilizing module 11 itself. Meanwhile, when the voltage stabilizing module 11 supplies power normally, the necessary sensor switch can be controlled by supplying power only, and redundant working loss of the sensor is avoided.
Example four
As shown in fig. 3, the present embodiment provides a low power consumption power supply circuit 1, which is different from the first embodiment in that the logic control module 1 further includes a power supply control switch and at least n gating switches.
Specifically, one end of the power supply control switch SW0 is connected to the output end of the voltage stabilizing module 11; the other end of the first capacitor is connected with the upper polar plate of the first capacitor C1 to provide the charge and discharge current IC of the capacitor; the power supply control switch SW0 receives the power supply control signal CTL 0. The power supply control signal CTL0 controls the power supply control switch SW0 to be turned on or off, so as to control the on/off of the first capacitor C1 connected to the power supply control switch SW0 and the power supply source VLDO.
Specifically, as an example, the low power supply circuit 1 includes n gate switches, denoted as SW1, SW2 … … SWn. One end of each gating switch is connected with the output end of the voltage stabilizing module 11; the other end of the voltage regulator is connected with an electric circuit and provides working voltages VS1 and VS2 … … VSn for the electric circuit; each gate switch receives a corresponding gate signal (CTL 1, CTL2 … … CTLn, n is a natural number equal to or greater than 1). And controlling the on or off of the corresponding gating switch through each gating signal so as to supply power to the power utilization circuit needing power utilization.
It should be noted that the connection relationship and the operation principle of other devices are the same as those in the first embodiment, and are not described herein again.
EXAMPLE five
The present embodiment provides a chip, which includes the low power consumption power supply circuit 1 described in the fourth embodiment.
Specifically, the structure and principle of the low power consumption power supply circuit 1 are not described herein in detail, wherein the charging and discharging current IC and each of the working voltages VS1 and VS2 … … VSn are respectively led out through a pad. Each pad is used to supply power to the first capacitor and the power utilization circuit, and each power utilization circuit may be disposed around the chip where the low power consumption power supply circuit 1 is located as required, including but not limited to the upper surface (the surface on which the pad is disposed), the lower surface, or the side surface.
It should be noted that, for the low power consumption power supply circuit 1 chip of this embodiment, connection modes of output pads may be interchanged in a cross manner, that is, the first capacitor may select any pad connection, and the power utilization circuit (including but not limited to a pressure sensor) may also select any pad connection. Therefore, the compatibility of the chip can be improved, the shortest VLDO power supply line is ensured, and meanwhile, the external circuit can be placed in a plurality of directions; the power utilization circuit is compatible with different placing requirements (including but not limited to placing direction and placing position). Assuming that the low power consumption power supply circuit 1 chip includes three output PADs PAD0, PAD1, PAD2, the arrangement position is as shown in fig. 4, and assuming that the placement requirement of the sensor is as shown in fig. 5, the sensor can be connected to the PAD0 nearby, and other PADs are connected to other sensors and the first capacitor, respectively.
EXAMPLE six
As shown in fig. 3, the present embodiment provides an electronic device, including: the low-power consumption power supply circuit 1, a first capacitor C1 and n sensors 2.
As shown in fig. 3, the low power consumption power supply circuit 1 is used for providing a charging and discharging current IC and operating voltages VS1 and VS2 … … VS n.
Specifically, the structure and principle of the low power consumption power supply circuit 1 refer to the fourth embodiment, which is not described herein again.
As shown in fig. 3, the upper plate of the first capacitor C1 receives the charging and discharging current IC, and the lower plate is grounded.
As shown in fig. 3, each sensor 2 is connected to a corresponding gate switch, and acquires a power supply based on a corresponding gate signal. Wherein n is a natural number of 1 or more.
Specifically, as an example, each gating switch is connected to a sensor, in actual use, the number of the sensors corresponding to each gating switch may be set as needed, and the sensors may be replaced by any power utilization circuit that supplies power by using a voltage stabilizing module, which is not limited in this embodiment. For other working principles, see above, they are not repeated herein.
As an implementation manner of the present invention, in this example, the low power consumption power supply circuit 1 is a chip, the upper plate of the first capacitor C1 is connected to the charge and discharge current IC through a pad, and each sensor 2 is connected to a corresponding operating voltage through a pad. The power supply control switch SW0 and the gating switches are disposed in a chip and may be implemented by MOS switches, including but not limited to MOS switches.
EXAMPLE seven
The present embodiment provides a low power consumption power supply circuit, a corresponding chip and an electronic device, which are different from the first to sixth embodiments in that the power supply control switch SW0 and the gate open tubes SW1 to SWn may be partially disposed in the chip (as a part of the low power consumption power supply circuit) and partially disposed outside the chip.
By way of example, the power supply control switch SW0 is disposed inside the chip, and each gate-on tube SW 1-SWn is disposed outside the chip; or the power supply control switch SW0 is arranged outside the chip, and each gate-on tube SW 1-SWn is arranged in the chip; or the power supply control switch SW0 and a part of gate open tubes are arranged in the chip, and the other part of gate open tubes are arranged outside the chip; not to be enumerated here, the corresponding die pad is adaptively adjusted.
Example eight
As shown in fig. 6, this embodiment provides a low-power-consumption power supply method, in this embodiment, the low-power-consumption power supply method is implemented based on the low-power-consumption power supply circuit in the first embodiment, the fourth embodiment, or the seventh embodiment, and the low-power-consumption power supply method includes:
the voltage stabilizing module starts to work, and a power supply control signal controls a first capacitor to be connected with the output end of the voltage stabilizing module;
each gating signal gates a corresponding power supply path to supply power to the power utilization circuit;
and when the power supply is finished, the voltage stabilizing module stops working, and the power supply control signal controls the first capacitor to be disconnected with the output end of the voltage stabilizing module.
Specifically, after the voltage stabilizing module 11 is operated stably (the enable signal EN _ LDO is active, and the switch corresponding to the power supply control signal CTL0 is closed), power is supplied to the application circuit based on each of the strobe signals CTL1 to CTLn. When any one or more corresponding switches in the gating signals CTL 1-CTLn are in a closed state, the switch corresponding to the power supply control signal CTL0 must be in a closed state, that is, the switch corresponding to the power supply control signal CTL0 needs to be closed before the switch corresponding to each gating signal CTL 1-CTLn; and only after all the switches corresponding to the gating signals CTL 1-CTLn are disconnected, the switch corresponding to the power supply control signal CTL0 can be disconnected.
As an example, as shown in fig. 6, the enable signal EN _ LDO is synchronized with the power supply control signal CTL0, that is, the enable signal EN _ LDO is active while the power supply control signal CTL0 controls the first capacitor C1 to be connected to the output terminal of the regulator module 11, and the enable signal EN _ LDO is inactive while the power supply control signal CTL0 controls the first capacitor C1 to be disconnected from the output terminal of the regulator module 11. After the enable signal EN _ LDO is active, each strobe signal is generated after a first delay time Td1 to supply power to the application circuit, and the first delay time Td1 may ensure that the voltage stabilizing module 11 outputs a stable power supply VLDO, which is not limited herein. When the power supply of each strobe signal is finished (in this embodiment, each strobe signal controls the power supply path of each power consuming circuit to be disconnected and continues for the second delay time Td2 to determine that the power supply is finished), the enable signal EN _ LDO is controlled to be inactive (meanwhile, the power supply control signal CTL0 controls the first capacitor C1 to be disconnected from the output end of the voltage stabilizing module 11), and the second delay time Td2 is greater than zero, so that each strobe signal is in an off state when the enable signal EN _ LDO is inactive. In this example, the power supply control signal and the strobe signal are both in a high level and in a conducting state, and a low level and in a shutting state, and in actual use, a corresponding level may be set as required, which is not limited to this example.
In summary, the present invention provides a low power consumption power supply circuit, method, chip and electronic device, including: the voltage stabilizing module is used for generating a power supply; the logic control module is used for generating a power supply control signal and n gating signals; when the voltage stabilizing module works, the power supply control signal controls the first capacitor to be connected with the output end of the voltage stabilizing module, and when the voltage stabilizing module does not work, the power supply control signal controls the first capacitor to be disconnected with the output end of the voltage stabilizing module; the gating signal is used for gating a power supply path of the corresponding power utilization circuit; wherein n is a natural number of 1 or more. The low-power-consumption power supply circuit, the method, the chip and the electronic equipment can effectively reduce the power consumption and time consumption of the LDO during starting, and further can improve the compatibility of the LDO chip. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (18)
1. A low power supply circuit, characterized in that the low power supply circuit comprises at least:
the voltage stabilizing module is used for generating a power supply;
the logic control module is used for generating a power supply control signal and n gating signals; when the voltage stabilizing module works, the power supply control signal controls the first capacitor to be connected with the output end of the voltage stabilizing module, and when the voltage stabilizing module does not work, the power supply control signal controls the first capacitor to be disconnected with the output end of the voltage stabilizing module; the gating signal is used for gating a power supply path of the corresponding power utilization circuit; wherein n is a natural number of 1 or more.
2. The low power consumption power supply circuit according to claim 1, wherein: the logic control module also generates an enable signal, and the enable signal is used for controlling the working state of the voltage stabilizing module.
3. The low power consumption power supply circuit according to claim 2, wherein: the voltage stabilizing module comprises a power switch tube, a feedback unit, an error amplifier and an enabling switch; one end of the power switch tube is connected with power supply voltage, the other end of the power switch tube is grounded through the feedback unit, and a connection node of the power switch tube and the feedback unit outputs the power supply; the error amplifier receives the feedback voltage output by the feedback unit and a reference voltage, amplifies the difference between the feedback voltage and the reference voltage and outputs the amplified difference to the control end of the power switch tube; one end of the enabling switch is connected with the power supply voltage, the other end of the enabling switch is connected with the control end of the power switch tube, the enabling switch receives the enabling signal, and when the enabling signal is effective, the voltage stabilizing module is started to work.
4. A low power consumption power supply circuit according to claim 3, wherein: the feedback unit comprises a first resistor, a second resistor and a second capacitor; one end of the first resistor is connected with the power switch tube, the other end of the first resistor is connected with one end of the second resistor, and the feedback voltage is output by a connection node of the first resistor and the second resistor; the other end of the second resistor is grounded; the second capacitor is connected in parallel with two ends of the first resistor.
5. The low power consumption power supply circuit according to claim 4, wherein: the second resistor is an adjustable resistor.
6. A low power consumption power supply circuit according to any one of claims 1 to 5, characterized in that: the low-power-consumption power supply circuit also comprises a power supply control switch; one end of the power supply control switch is connected with the output end of the voltage stabilizing module, the other end of the power supply control switch is connected with the first capacitor, and the power supply control switch receives the power supply control signal.
7. The low power consumption power supply circuit according to claim 6, wherein: the low-power-consumption power supply circuit also comprises n gating switches; one end of each gating switch is connected with the output end of the voltage stabilizing module, the other end of each gating switch is connected with the power utilization circuit, and each gating switch receives the corresponding gating signal.
8. A low power consumption power supply method based on the low power consumption power supply circuit of any one of claims 1 to 7, characterized in that the low power consumption power supply method at least comprises:
the voltage stabilizing module starts to work, and a power supply control signal controls a first capacitor to be connected with the output end of the voltage stabilizing module;
each gating signal gates a corresponding power supply path to supply power to the power utilization circuit;
and when the power supply is finished, the voltage stabilizing module stops working, and the power supply control signal controls the first capacitor to be disconnected with the output end of the voltage stabilizing module.
9. The low power consumption power supply method according to claim 8, wherein: and controlling the working state of the voltage stabilizing module based on an enabling signal, wherein the enabling signal is synchronous with the power supply control signal.
10. The low power consumption power supply method according to claim 8, wherein: after the voltage stabilizing module works, after a first delay time, each gating signal starts to work to supply power to each power utilization circuit.
11. The low power consumption power supply method according to claim 8, wherein: and each gating signal controls the power supply paths of each power utilization circuit to be disconnected for the second delay time, and then the power supply is judged to be finished.
12. A chip, characterized in that it comprises at least: a low power consumption power supply circuit as claimed in any one of claims 1 to 7 and a plurality of pads; each bonding pad is used for connecting or controlling the first capacitor and the power utilization circuit respectively.
13. The chip of claim 12, wherein: when the low-power-consumption power supply circuit comprises a power supply control switch and a gating switch, each power utilization circuit is connected with the corresponding bonding pad based on the placement position or the placement direction.
14. The chip of claim 12 or 13, wherein: each power utilization circuit is disposed on the chip.
15. An electronic device, characterized in that the electronic device comprises: the low-power-consumption power supply circuit, the power supply control switch, the first capacitor, the n gating switches and the m power utilization circuits according to any one of claims 1 to 5;
one end of the power supply control switch is connected with the output end of the low-power-consumption power supply circuit, the other end of the power supply control switch is connected with the upper polar plate of the first capacitor, and the power supply control switch receives the power supply control signal; the lower polar plate of the first capacitor is grounded;
one end of each gating switch is connected with the output end of the voltage stabilizing module, the other end of each gating switch is connected with at least one power utilization circuit, and each gating switch receives a corresponding gating signal output by the low-power-consumption power supply circuit and supplies power to the power utilization circuit based on the gating signal;
wherein m is a natural number not less than n.
16. An electronic device, characterized in that the electronic device comprises: the low power consumption power supply circuit of claim 6, a first capacitor, n gating switches and m power consuming circuits;
the upper polar plate of the first capacitor is connected with a power supply control switch in the low-power-consumption power supply circuit, and the lower polar plate is grounded;
one end of each gating switch is connected with the output end of the voltage stabilizing module, the other end of each gating switch is connected with at least one power utilization circuit, and each gating switch receives a corresponding gating signal output by the low-power-consumption power supply circuit and supplies power to the corresponding power utilization circuit based on the gating signal;
wherein m is a natural number not less than n.
17. An electronic device, characterized in that the electronic device comprises: the low power consumption power supply circuit of claim 7, a first capacitor and m power consuming circuits;
the upper polar plate of the first capacitor is connected with a power supply control switch in the low-power-consumption power supply circuit, and the lower polar plate is grounded;
each circuit is respectively connected with the corresponding gating switch, and acquires a power supply based on the corresponding gating signal;
wherein m is a natural number not less than n.
18. The electronic device of any of claims 15-17, wherein: the power utilization circuit comprises a pressure sensor.
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| CN202110353269.8A CN112732001A (en) | 2021-04-01 | 2021-04-01 | Low-power-consumption power supply circuit, method, chip and electronic equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114337268A (en) * | 2021-12-30 | 2022-04-12 | 合肥市芯海电子科技有限公司 | Boost circuit, chip and electronic equipment |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1294325A (en) * | 1999-10-21 | 2001-05-09 | 精工爱普生株式会社 | Voltage supply unit and semiconductor device, electrooptical device and electronic machine |
| US20140103889A1 (en) * | 2012-10-11 | 2014-04-17 | Earl W. McCune, Jr. | Rapid-Transition DC-DC Converter |
| CN104881072A (en) * | 2015-05-22 | 2015-09-02 | 无锡中星微电子有限公司 | Low-dropout voltage regulator and power supply system |
| CN204631670U (en) * | 2015-05-22 | 2015-09-09 | 无锡中星微电子有限公司 | Low difference voltage regulator and electric power system |
| CN105388949A (en) * | 2014-08-27 | 2016-03-09 | 瑞萨电子株式会社 | Semiconductor device |
| CN105549673A (en) * | 2015-12-25 | 2016-05-04 | 上海华虹宏力半导体制造有限公司 | Dual-mode switching type LDO circuit |
| CN210835770U (en) * | 2019-12-16 | 2020-06-23 | 欧普照明股份有限公司 | Power supply circuit |
| CN112327987A (en) * | 2020-11-18 | 2021-02-05 | 上海艾为电子技术股份有限公司 | Low dropout regulator and electronic equipment |
-
2021
- 2021-04-01 CN CN202110353269.8A patent/CN112732001A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1294325A (en) * | 1999-10-21 | 2001-05-09 | 精工爱普生株式会社 | Voltage supply unit and semiconductor device, electrooptical device and electronic machine |
| US20140103889A1 (en) * | 2012-10-11 | 2014-04-17 | Earl W. McCune, Jr. | Rapid-Transition DC-DC Converter |
| CN105388949A (en) * | 2014-08-27 | 2016-03-09 | 瑞萨电子株式会社 | Semiconductor device |
| CN104881072A (en) * | 2015-05-22 | 2015-09-02 | 无锡中星微电子有限公司 | Low-dropout voltage regulator and power supply system |
| CN204631670U (en) * | 2015-05-22 | 2015-09-09 | 无锡中星微电子有限公司 | Low difference voltage regulator and electric power system |
| CN105549673A (en) * | 2015-12-25 | 2016-05-04 | 上海华虹宏力半导体制造有限公司 | Dual-mode switching type LDO circuit |
| CN210835770U (en) * | 2019-12-16 | 2020-06-23 | 欧普照明股份有限公司 | Power supply circuit |
| CN112327987A (en) * | 2020-11-18 | 2021-02-05 | 上海艾为电子技术股份有限公司 | Low dropout regulator and electronic equipment |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114337268A (en) * | 2021-12-30 | 2022-04-12 | 合肥市芯海电子科技有限公司 | Boost circuit, chip and electronic equipment |
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