CN112702141B - Adjustable serial offset list polar code decoding method and device - Google Patents
Adjustable serial offset list polar code decoding method and device Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0036—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
Abstract
The application relates to a method and a device for decoding adjustable serial offset list polar codes. The method comprises the following steps: determining candidate paths suitable for current sequence bit data in a bit sequence to be decoded and the number of the current paths; calculating the sequence decoding accuracy corresponding to the current sequence bit data, and screening the target paths of the current path number from the candidate paths according to the sequence decoding accuracy; calculating the target probability corresponding to the current sequence bit data; adjusting the number of the current paths according to the target probability and a preset threshold value, and screening the target paths of the adjusted number of the target paths from the candidate paths again; sequentially circulating the steps until the last sequential bit data, and obtaining a plurality of decoding paths from the first sequential bit data to the last sequential bit data; and taking the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result. By adopting the method, the decoding complexity of the polar code can be reduced.
Description
Technical Field
The present application relates to the field of communications, and in particular, to a method and an apparatus for decoding an adjustable serial cancellation list polarization code.
Background
With the development of scientific technology, research work on the fifth-Generation mobile communication technology (5th-Generation, 5G) has been started worldwide. In the face of the requirements for low latency and high reliability in 5G communication, currently, a polar code encoding method is mainly used to encode transmission information in mobile communication, and then a Serial Cancellation List (SCL) is used to decode the encoded transmission information to complete information transmission.
In the conventional SCL decoding method, a list with a fixed length is required to reserve the most possible path during decoding, and in order to ensure good decoding performance, a list with a larger length is often required to reserve more possible paths, so that the calculation amount is increased, and the decoding complexity is greatly improved.
Disclosure of Invention
In view of the foregoing, there is a need to provide a method and an apparatus for decoding a serial cancellation list polarization code with adjustable decoding complexity.
A method of adjustable serial cancellation list polar code decoding, the method comprising:
determining a candidate path applicable to current sequence bit data in a bit sequence to be decoded;
determining the number of current paths according to the length of the bit sequence to be decoded;
calculating decoding results and sequence decoding correct rates of the current sequential bit data under different candidate paths, and screening target paths corresponding to the current sequential bit data in the number of the current paths from the candidate paths according to the sequence decoding correct rates;
calculating the target probability corresponding to the current sequence bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path;
adjusting the number of the current paths according to the target probability and a preset threshold value to obtain the number of target paths, and re-screening the number of the target paths in the candidate paths, wherein the number of the target paths corresponds to the current sequence bit data;
determining different candidate paths of the next sequential bit data based on each re-screened target path, taking the next sequential bit data as current sequential bit data, taking the number of the target paths as the number of the current paths, and returning to the step of calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under the different candidate paths until the last sequential bit data, so as to obtain a plurality of decoding paths from the first sequential bit data to the last sequential bit data;
and calculating the sequence decoding accuracy of each decoding path, and taking the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result.
In one embodiment, the bit sequence to be decoded comprises information bits and frozen bits; before the calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under different candidate paths, the method further comprises:
and when the current sequence bit data is not the information bit, setting the decoding result of the current sequence bit data to be 0.
In one embodiment, the calculating decoding results and sequence decoding correctness of the current sequential bit data under different candidate paths, and according to the sequence decoding correctness, screening target paths corresponding to the current sequential bit data in the number of the current paths from the candidate paths includes:
calculating the possibility metric value of the correct path when different candidate paths are decoded from the first sequence bit data to the current sequence bit data;
converting the likelihood metric value into a corresponding sequence decoding correct rate;
and screening target paths corresponding to the number of current paths from the candidate paths, wherein the sequence decoding accuracy is the largest.
In one embodiment, the calculating the target probability corresponding to the current sequential bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path includes:
acquiring the sequence decoding accuracy of the target path;
and adding the sequence decoding correct rates to obtain the target probability corresponding to the current sequence bit data.
In one embodiment, the adjusting the current path number according to the target probability and a preset threshold includes:
and when the target probability is less than or equal to a threshold value, increasing the current path number by two times.
In one embodiment, the data to be encoded contains redundant symbols; the bit sequence to be decoded is obtained by encoding the data to be encoded containing the redundant symbols; the method further comprises the following steps:
respectively performing cyclic redundancy check on the decoding result set of each bit data corresponding to each decoding path;
and when the decoding result set of each bit data on the decoding path passes the cyclic redundancy check, taking the decoding result of each bit data on the decoding path passing the cyclic redundancy check as a target result.
In one embodiment, the data to be encoded contains redundant symbols; the bit sequence to be decoded is obtained by encoding the data to be encoded containing the redundant symbols; the method further comprises the following steps:
respectively performing cyclic redundancy check on the decoding result set of each bit data corresponding to each decoding path;
acquiring a preset log-likelihood ratio calculation function; the log-likelihood ratio calculation function comprises a first calculation function and a second calculation function;
and when the decoding result set of each bit data on the decoding path passes through the cyclic redundancy check, calculating a log-likelihood ratio corresponding to the decoding path passing through the cyclic redundancy check based on the first calculation function, and taking the calculated log-likelihood ratio as a target result.
In one embodiment, the method further comprises:
and when the decoding result set of each bit data on all the decoding paths does not pass the cyclic redundancy check, calculating the log-likelihood ratio corresponding to the decoding paths based on the second calculation function, and taking the calculated log-likelihood ratio as a target result.
An adjustable serial cancellation list polar code decoding apparatus, the apparatus comprising:
the initial path number acquisition module is used for determining a candidate path applicable to the current sequence bit data in the bit sequence to be decoded; determining the number of the current paths according to the number of the candidate paths;
the path number adjusting module is used for calculating decoding results and sequence decoding accuracy of the current sequence bit data under different candidate paths, and screening target paths corresponding to the current sequence bit data in the current path number from the candidate paths according to the sequence decoding accuracy; calculating the target probability corresponding to the current sequence bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path; adjusting the number of the current paths according to the target probability and a preset threshold value to obtain the number of target paths, and re-screening the number of the target paths in the candidate paths, wherein the number of the target paths corresponds to the current sequence bit data;
a decoding result obtaining module, configured to determine that next sequential bit data is based on different candidate paths of each re-screened target path, use the next sequential bit data as current sequential bit data, use the number of target paths as the number of current paths, and return to the step of calculating decoding results and sequence decoding accuracy of the current sequential bit data in the different candidate paths until last sequential bit data, so as to obtain multiple decoding paths from first sequential bit data to last sequential bit data; and calculating the sequence decoding accuracy of each decoding path, and taking the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result.
A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program:
determining a candidate path applicable to current sequence bit data in a bit sequence to be decoded;
determining the number of current paths according to the length of the bit sequence to be decoded;
calculating decoding results and sequence decoding correct rates of the current sequence bit data under different candidate paths, and screening target paths corresponding to the current sequence bit data in the number of the current paths from the candidate paths according to the sequence decoding correct rates;
calculating the target probability corresponding to the current sequence bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path;
adjusting the number of the current paths according to the target probability and a preset threshold value to obtain the number of target paths, and re-screening the number of the target paths in the candidate paths, wherein the number of the target paths corresponds to the current sequence bit data;
determining different candidate paths of the next sequential bit data based on each re-screened target path, taking the next sequential bit data as current sequential bit data, taking the number of the target paths as the number of the current paths, and returning to the step of calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under the different candidate paths until the last sequential bit data, so as to obtain a plurality of decoding paths from the first sequential bit data to the last sequential bit data;
and calculating the sequence decoding accuracy of each decoding path, and taking the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result.
A computer-readable storage medium, on which a computer program is stored which, when executed by a processor, carries out the steps of:
determining a candidate path applicable to current sequence bit data in a bit sequence to be decoded;
determining the number of current paths according to the length of the bit sequence to be decoded;
calculating decoding results and sequence decoding correct rates of the current sequence bit data under different candidate paths, and screening target paths corresponding to the current sequence bit data in the number of the current paths from the candidate paths according to the sequence decoding correct rates;
calculating the target probability corresponding to the current sequence bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path;
adjusting the number of the current paths according to the target probability and a preset threshold value to obtain the number of target paths, and re-screening the number of the target paths in the candidate paths, wherein the number of the target paths corresponds to the current sequence bit data;
determining different candidate paths of the next sequential bit data based on each re-screened target path, taking the next sequential bit data as current sequential bit data, taking the number of the target paths as the number of the current paths, and returning to the step of calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under the different candidate paths until the last sequential bit data, so as to obtain a plurality of decoding paths from the first sequential bit data to the last sequential bit data;
and calculating the sequence decoding accuracy of each decoding path, and taking the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result.
According to the adjustable serial offset list polar code decoding method and device, the number of the target paths is adaptively adjusted by judging the possibility that the current target path is the correct decoding path, so that the number of the target paths with smaller length can be adopted at the beginning of decoding, and the possibility that the current target path is the correct decoding path is continuously measured in the decoding process. If the probability that the current target path is a correct decoding path is high, keeping the number of the target paths unchanged; if the probability that the current target path is the correct decoding path is low, the number of the target paths is increased to reserve more decoding paths and prevent the correct paths from being deleted by mistake, so that the excellent error code probability performance similar to that of the traditional polar code decoding method can be achieved with less calculation amount and memory cost, the decoding complexity is saved to a great extent, and the high efficiency of the decoding process and the reliability of the result are ensured.
Drawings
FIG. 1 is a diagram illustrating an exemplary implementation of a tunable serial cancellation list polar code decoding method;
FIG. 2 is a flow diagram illustrating a method for adjustable serial cancellation list polar code decoding in one embodiment;
FIG. 3 is a diagram of a decoding tree in one embodiment;
FIG. 4 is a diagram illustrating a decoding tree for decoding first-order bit data according to an embodiment;
FIG. 5 is a diagram illustrating a decoding tree for decoding second-order bit data according to an embodiment;
FIG. 6 is a block diagram of an adjustable serial cancellation list polar code decoding apparatus in one embodiment;
FIG. 7 is a block diagram of an adjustable serial cancellation list polar code decoding apparatus in another embodiment;
FIG. 8 is a diagram illustrating an internal structure of a computer device according to an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The adjustable serial cancellation list polar code decoding method provided by the application can be applied to a communication system shown in fig. 1. The communication system includes a sending end device 102 and a receiving end device 104. The sending end device 102 includes a polarization code encoding means for executing a subsequent polarization encoding method; the receiving end device 104 includes a polar code decoding apparatus, and is configured to execute a subsequent polar code decoding method and output a decoding result. As shown in fig. 1, the sending end device 102 may be a base station, and the receiving end device 104 may be a terminal device; in other implementations, the sending end device 102 and the receiving end device 104 are both other devices that can use polarization codes for information transmission. When a transmitting end 102 needs to transmit information to a receiving end 104, the transmitting end performs polar code encoding on the information to generate a bit sequence. Each bit sequence generated by the transmitting end 102 has a length of N, that is, each bit sequence consists of N bits. Moreover, each bit takes a value of 0 or 1, and N is usually a preset positive integer. After receiving the bit sequence, the receiving end 104 decodes the bit sequence to obtain a decoding result.
In one embodiment, as shown in fig. 2, an adjustable serial cancellation list polar code decoding method is provided, which is described by taking the method as an example applied to the receiving device in fig. 1, and includes the following steps:
s202, determining a candidate path applicable to the current sequence bit data in the bit sequence to be decoded.
Specifically, when decoding an adjustable serial cancellation list polar code (referred to as adjustable polar code decoding), the polar code decoding process can be indicated based on the constructed code tree Γ ═ epsilon, V, where epsilon and V represent the set of edges and nodes in the code tree, respectively. Defining the depth of a node as the shortest path length from the node to a root node, and for a polarization code with a bit sequence length of N, dividing a code tree node set V into N +1 subsets according to the depth d, and recording the subsets as VdWhere d is 0,1, …, N, each subset contains the possible decoding results of the corresponding sequence of bit data. In particular, V0Containing only root nodes, i.e. | V01. Each node u e V in the code tree Γ except for leaf nodes (i.e., when d ═ N)dAre respectively marked with 0 and 1 through two edges and two Vd+1Is connected. Sequence corresponding to a certain node u
Is defined as the sequence of labels of the edges that need to be traversed to reach the node u starting from the root node, and will also be
And recording as a candidate path. If the ith-ordered node u represents a sequence
Its left and right successor nodes respectively represent a candidate path from the current node to the successor node
And
the set of edges connecting nodes with depths i-1 and i is defined as the ith layer edge, denoted ε i. Obviously, the polar code decoding code tree is essentially a full binary tree, so the decoding process is to find a proper path on the full binary tree.
Fig. 3 is a schematic diagram of a decoding tree in an embodiment, where when a decoder in a receiving end receives a bit sequence to be decoded, the decoder in the receiving end performs traversal decoding on each bit data in the bit sequence to be decoded in sequence.
Further, as shown in fig. 3, when the decoder in the receiving end decodes the first sequential bit data, the decoder in the receiving end generates a root node, two edges marked with 0 and 1, and a first-layer successor node corresponding to the first sequential bit data, and connects the root node and the first-layer successor node based on the two edges marked with 0 and 1, so as to obtain a candidate path to which the first sequential bit data is applicable.
S204, determining the number of the current paths according to the length of the bit sequence to be decoded.
S206, calculating decoding results and sequence decoding accuracy of the current sequence bit data under different candidate paths, and screening target paths corresponding to the current sequence bit data in the number of the current paths from the candidate paths according to the sequence decoding accuracy.
The current path number is the number of decoding paths which are reserved in the decoding process of the adjustable polar code and have the maximum possibility of being decoded correctly.
Specifically, it is agreed that the current path number is not greater than the length of the bit sequence to be decoded, and therefore, for example, when the length of the bit sequence to be decoded is 16 bits, it is agreed that the initial current path number is 1 or 4.
Further, when the decoder in the receiving end decodes the first sequential bit data, the decoder in the receiving end is based on
And calculating the sequence decoding accuracy under different candidate paths.
Wherein, P is the correct rate of sequence decoding,
for the first i bits in the bit sequence to be decoded of the l path under the condition that the channel observed value of the decoder in the receiving end is y, the decoding estimated value is
The probability of (c). The channel observation value is a bit sequence to be decoded received by a decoder in a receiving end.
The first i bit data decoding estimated value of the ith path in the representation list is represented, and l is a path identifier.
Further, a decoder in the receiving end screens target paths corresponding to the first sequence bit data in the current path number from the candidate paths based on the sequence decoding accuracy. FIG. 4 is a diagram illustrating a decoding tree for decoding first-order bit data according to an embodiment. As shown in fig. 4, if the initial current path number is 1, the sequence decoding accuracy of the candidate path marked as 0 is calculated to be 0.4, and the sequence decoding accuracy of the candidate path marked as 1 is calculated to be 0.11, at this time, the decoder in the receiving end decodes the candidate path formed by the root node, the edge marked as 0 and the first layer node with higher sequence decoding accuracy
As the target path. If the initial current path number is 4 and is greater than the candidate path number, the decoder in the receiving end will take the two candidate paths in fig. 4
Are all taken as target paths.
Further, a decoder in the receiving end determines a decoding result of the current sequential bit data based on the selected target path. For example, when the path marked 0 in fig. 4 is determined as the target path, the decoder in the receiving end takes 0 as the decoding result of the first sequential bit data. When determining that the paths marked as 0 and 1 in fig. 4 are both target paths, the decoder in the receiving end takes both 0 and 1 as the decoding result of the first sequential bit data.
And S206, calculating the target probability corresponding to the current sequence bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path.
S208, according to the target probability and the preset threshold, the number of the current paths is adjusted to obtain the number of the target paths, and the target paths corresponding to the current sequence bit data of the number of the target paths are screened from the candidate paths again.
Wherein the threshold value can be obtained by a threshold value calculation function tr (i).
Pe (j) is a theoretical Approximation of the decoding error probability of the jth bit, and can be calculated by using a Bhattacharyya Parameter method (Bhattacharyya Parameter), a Density Evolution method (Density Evolution), a Gaussian Approximation method (Gaussian Approximation), and a degenerate or evolutionary Channel method (deriving and Upgrading Channel) of the existing polar code structure. e.g. of the typemFor the set of indices of erroneous bits in the mth path, { 1., i } -emThe subtraction in (1) is collective subtraction.
Specifically, when the decoder in the receiving end initially screens out the target path, the decoder in the receiving end calculates the sum of the sequence decoding accuracy rates of all the target paths to obtain the target probability corresponding to the previous sequence bit data.
Further, the decoder in the receiving end compares the target probability corresponding to the previous sequence bit data with a preset threshold, and when the target probability corresponding to the current sequence bit data is greater than or equal to the preset threshold, it can be considered that the target path screened by the decoder in the receiving end at this time can correctly decode the current sequence bit data, and the decoder in the receiving end keeps the number of the current paths unchanged at this time. When the target probability corresponding to the bit data in the current order is smaller than the preset threshold, it may be considered that the target path screened by the decoder in the receiving end cannot correctly decode the bit data in the current order, and at this time, the decoder in the receiving end keeps expanding the number of previous paths by a preset multiple, for example, by twice.
Further, the decoder in the receiving end re-screens the expanded target paths corresponding to the current sequential bit data in the number of the target paths from the candidate paths based on the sequence decoding accuracy. For example, when the initial current path number is 1,
the decoding accuracy of the sequence of (1) is 0.4,
the sequence decoding accuracy of (1) is 0.11, when the root node, the edge marked as 0 and the path formed by the first layer node
When the path is the target path, the decoder in the receiving end compares the sequence decoding accuracy rate of 0.4 with the threshold value of 0.5, and then the decoder in the receiving end expands the initial current path number to two times based on the comparison result. Then, the decoder in the receiving end screens out the candidate paths again based on the sequence decoding accuracy
These two target paths. And the decoder in the receiving end modifies the decoding result of the first sequence bit data again into 0 or 1 according to the re-screened target path.
For another example, when the initial number of current paths is 1, the sequence decoding accuracy of the candidate path marked as 0 is 0.4, and the sequence decoding accuracy of the candidate path marked as 1 is correctThe rate is 0.11, the root node, the edge marked as 0 and the first layer node form a path
When the target path is the target path, a decoder in the receiving end compares the sequence decoding accuracy rate of 0.4 with a threshold value of 0.3, at this time, the target probability corresponding to the first sequence bit data is greater than the threshold value, the decoder in the receiving end keeps the initial current path quantity value unchanged, then the decoder in the receiving end judges whether the screened target path is greater than the candidate path, when the target path is greater than the candidate path, the decoder in the receiving end prunes the decoding tree, reserves the target path and deletes the non-target path.
S210, determining different candidate paths of the next sequential bit data based on each re-screened target path, taking the next sequential bit data as the current sequential bit data, taking the number of the target paths as the number of the current paths, returning to the step of calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under different candidate paths until the last sequential bit data, and obtaining a plurality of decoding paths from the first sequential bit data to the last sequential bit data.
Specifically, when decoding bit data of the next sequence i, a decoder in the receiving end establishes two sub-nodes under each reserved sub-node of the i-1 th layer in a decoding tree to obtain a plurality of i-th layer sub-nodes, and a path from a root node to each i-th layer sub-node in the decoding tree is used as a candidate path corresponding to the i-th bit data. Fig. 5 is a decoding tree generated when the second sequential bit data is decoded in one embodiment. Wherein the dotted line is a candidate path that is clipped when decoding the first sequential bit data.
Further, the decoder determines different candidate paths of the next sequential bit data based on each re-screened target path, takes the next sequential bit data as the current sequential bit data, takes the number of the target paths as the number of the current paths, and returns to the step of calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under the different candidate paths until the last sequential bit data, so as to obtain a plurality of decoding paths from the first sequential bit data to the last sequential bit data.
For example, when the length of the sequence to be decoded is 2, the number of target paths is 1, and the decoding result of the first sequential bit data is 0, only one target path corresponding to the first sequential bit data is reserved
And taking the second sequence bit data as the current sequence bit data and taking the target path as the current target path number by the decoder. Then, the decoder calculates
And
the sequence decoding accuracy of (1) is 0.12 and 0.2. The decoder screens out a target path from the candidate paths based on the number of the current target paths
And comparing the sequence decoding accuracy rate 0.2 of the target path with the threshold value 0.3 to obtain that the target probability corresponding to the current sequence bit data is smaller than the preset threshold value. The decoder enlarges the number of the current target paths to two times, and re-screens the candidate paths based on the enlarged number of the target paths to obtain
And
and the two target paths are obtained because the length of the sequence to be decoded is 2 and the decoder traverses the whole sequence to be decoded.
S212, calculating the sequence decoding accuracy of each decoding path, and taking the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result.
Specifically, in the above example, after the decoder has traversed the entire sequence to be decoded to obtain two target paths, the decoder obtains the sequence decoding correctness rates 0.12 and 0.2 of the two target paths, and takes the decoding result of each bit data on the decoding path with the highest correctness rate as the target result {0,1 }.
In one embodiment, a variable length list may be created to store the target paths, where the length of the list is equal to the number of paths. When the decoder screens out the target path from the candidate paths based on the target probability corresponding to the current sequence bit data, the decoder sets the target path to be in an activated state, namely the decoder gives an activation value to the target path
Wherein
The function is activated for the state of the ith sequentially decoded data for the ith path. When in use
When the first path is activated, the first path is considered to be activated. The decoder then stores the activated destination path identification in a list.
Further, the decoder determines the state values of all paths present in the decoding tree when the decoding tree is in a state of being in a state of being in a state of being in a decoding tree
And is
Then the corresponding correctness measure parameter is assigned to the path, i.e.
Wherein the content of the first and second substances,
mold two and for two-step。
Further, when there is
And is
Judging whether the ith path exists in the list or not, if so, deleting the ith path from the list by the decoder.
Further, when there is
And is
The decoder assigns corresponding correctness measure parameters to the two paths respectively, and for the paths
Is provided with
For the path
Is provided with
In the adjustable serial offset list polar code decoding method, the number of the target paths is adaptively adjusted by judging the possibility that the current target path is the correct decoding path, so that the number of the target paths with smaller length can be adopted at the beginning of decoding, and the possibility that the current target path is the correct decoding path is continuously measured in the decoding process. If the probability that the current target path is a correct decoding path is high, keeping the number of the target paths unchanged; if the probability that the current target path is the correct decoding path is low, the number of the target paths is increased to reserve more decoding paths and prevent the correct paths from being deleted by mistake, so that the excellent error code probability performance similar to that of the traditional polar code decoding method can be achieved with less calculation amount and memory cost, the decoding complexity is saved to a great extent, and the high efficiency of the decoding process and the reliability of the result are ensured.
In one embodiment, before calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under different candidate paths, the method further comprises: and when the current sequence bit data is not the information bit, setting the decoding result of the current sequence bit data to be 0.
The bit sequence to be decoded comprises information bits and frozen bits. The bit sequence to be decoded can be represented as (N, K, a, UAc), N being the length of the bit sequence to be decoded, K being the number of Information bits, set a being the set of Information bit indices, UAc being the Frozen (Frozen) bits, the number of which is N-K, the Frozen bits being known bits.
Specifically, the decoder determines whether the current sequential bit data is included in the information bit set, and if not, the decoder sets the decoding result of the current sequential bit data to 0, and then the decoder performs decoding of the next sequential bit data.
In the above embodiment, since the frozen bit is known bit data, when the decoder determines that the current sequence bit data is the frozen bit, the decoding result may be directly set without performing subsequent target path screening on the current sequence bit data, thereby saving resources consumed by the decoder in decoding.
In one embodiment, the calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under different candidate paths, and the screening, according to the sequence decoding accuracy, target paths corresponding to the current sequential bit data in the number of the current paths from the candidate paths includes: calculating the possibility metric value of the correct path when different candidate paths are decoded from the first sequence bit data to the current sequence bit data; converting the likelihood metric into a corresponding sequence decoding correct rate; and screening target paths corresponding to the current path number, wherein the sequence decoding accuracy is maximum, from the candidate paths.
Specifically, for convenience of description, the probability metric value of the correct path when the candidate path is decoded from the first sequential bit data to the current sequential bit data is referred to as the correctness metric parameter PM (pathmetrics), and the probability metric value of the correct path when the candidate path is decoded to the ith sequential bit data is PMi[l]，PMi[l]The calculation formula of (c) is:
wherein the content of the first and second substances,
when the ith candidate path is decoded to the ith sequential bit data, the bit sequence to be decoded and the decoding estimation value of the ith path to the ith-1 sequential bit data from the first sequential bit data are subjected to recursive computation in an LLR (Log Likelihood Ratio) domain.
The calculation function of (a) is:
Wherein the content of the first and second substances,
indicating decoded estimates of the first i-1 bits with odd exponentials, e.g.
Indicating the decoded estimate of the ith path for the even-numbered bits of the first i-1 bits.
In order to perform a binary addition operation,
the operation represented is:
for convenience of calculation, an approximation method can be adopted instead of the calculation method
And (3) operation:
wherein sign () is a sign function, and min { } is a small function.
Further, when the decoder is based on PMi[l]After obtaining the likelihood metric values corresponding to the current sequential bit data under different candidate paths, the decoder bases on
The probability conversion function converts the likelihood metric values into corresponding sequence decoding correctness rates.
Further, the decoder selects the target paths corresponding to the current path number, in which the sequence decoding accuracy is the maximum, from the candidate paths.
In the above embodiment, the target paths are correspondingly screened out based on the sequence decoding accuracy and the number of paths, so that the target probability corresponding to the current sequential bit data can be calculated subsequently based on the sequence decoding accuracy of the target paths.
In one embodiment, calculating the target probability corresponding to the current sequential bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path includes: acquiring the sequence decoding accuracy of a target path; and adding the sequence decoding correct rates to obtain the target probability corresponding to the current sequence bit data.
Wherein, the target probability reflects the possibility that all the screened target paths are correct decoding paths. When the target probability is larger, the probability that all target paths are correctly decoded is larger.
Specifically, the decoder obtains the sequence decoding accuracy of the target paths, and adds the obtained sequence decoding accuracy of each target path to obtain a target probability corresponding to the current sequential bit data. As shown in FIG. 5, when the target path is
And
and are connected with
The corresponding sequence decoding accuracy is 0.12, and
when the correct rate of the corresponding sequence decoding is 0.2, the decoder decodes the obtained sequenceAnd adding the code correct rates to obtain a target probability 0.32 corresponding to the second sequence bit data.
In the above embodiment, the target probability corresponding to the current sequential bit data can be accurately predicted by the sequence decoding probability corresponding to the target path, so that the number of paths can be adjusted based on the target probability.
In one embodiment, adjusting the current number of paths according to the target probability and a preset threshold includes: and when the target probability is less than or equal to the threshold value, increasing the number of the current paths by two times.
Specifically, when the target probability corresponding to the current sequential bit data obtained by the decoder is less than the threshold, the decoder increases the current path usage by two times.
In the above embodiment, when the probability that the current target path is the correct decoding path is low, the amount of use of the current path is increased by two times, and more decoding paths can be reserved, so that the correct path is prevented from being deleted by mistake, and further, excellent error code probability performance similar to that of the conventional polar code decoding method can be achieved with less calculation amount and memory overhead, so that the decoding complexity is saved to a great extent, and the high efficiency of the decoding process and the reliability of the result are ensured.
In an embodiment, the method for decoding an adjustable serial cancellation list polar code further includes: respectively carrying out cyclic redundancy check on the decoding result set of each bit data corresponding to each decoding path; and when the decoding result set of each bit data on the decoding path passes the cyclic redundancy check, taking the decoding result of each bit data on the decoding path passing the cyclic redundancy check as a target result.
The decoding result set is a set for storing the decoding result of each bit of data. For example, as shown in FIG. 5, with u1 2The decoding result set corresponding to 0 is {0,0}, and u1 2The decoding result set corresponding to 1 is {0,1 }.
The bit sequence to be decoded is obtained by encoding the data to be encoded containing the redundant symbols. Cyclic Redundancy Check (CRC) is an effective codeword checking method, which inserts partial Redundancy symbols into encoded codewords and checks at a decoding end to determine the correctness of a decoding result.
Specifically, a coding end inserts a redundancy symbol into a bit sequence to be coded, and then a coder performs cyclic redundancy check coding on the bit sequence to be coded with the inserted redundancy symbol. When the decoder receives the bit sequence to be decoded after the redundancy check coding, the decoder traverses the bit sequence to be decoded to obtain a plurality of decoding paths from the first sequence bit data to the last sequence bit data.
Further, the decoder acquires a plurality of decoding result sets corresponding to the decoding paths, and performs cyclic redundancy check on each decoding result set. And when the decoding result set corresponding to the decoding path passes the cyclic redundancy check, the decoder outputs the decoding result set passing the cyclic redundancy check as a target decoding result.
And when the decoding result sets of all the decoding paths do not pass the cyclic redundancy check, the decoder calculates the sequence decoding accuracy of each decoding path and takes the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result.
In the above embodiment, when the final decoding path is obtained, the decoding path is checked by using an agreed CRC check method, so that the effective identification rate of the correct decoding path can be improved, and the probability of the decoder in decoding errors is reduced.
In one embodiment, after performing cyclic redundancy check on the decoding result set of each bit data corresponding to each decoding path, the method further includes: acquiring a preset log-likelihood ratio calculation function; and when the decoding result set of each bit data on the decoding path passes the cyclic redundancy check, calculating a log-likelihood ratio corresponding to the decoding path passing the cyclic redundancy check based on the first calculation function, and taking the calculated log-likelihood ratio as a target result.
The log-likelihood ratio calculation function comprises a first calculation function and a second calculation function, wherein the first calculation function is as follows:
the second calculation function is:
l is the number of decoding paths.
Specifically, after the decoder performs cyclic redundancy check on the decoding result set corresponding to each decoding path, the decoder determines whether the decoding result set passes the cyclic redundancy check. When the decoding result set passes the cyclic redundancy check, the decoder acquires a decoding path l corresponding to the decoding result set passing the cyclic redundancy check, calculates the log-likelihood ratio of the decoding path l based on a first calculation function, and takes the calculated log-likelihood ratio as a target result.
In the above embodiment, as the communication system tends to be complex, the polar code as the channel code inevitably needs to be concatenated with other technologies, and most of the information transfer in the concatenated system is in the form of log-likelihood ratio output. Therefore, the target result is output by comparing the log-likelihood form, so that the applicability of the decoding method of the adjustable polarization code can be improved, and the reliability of the cascade system is integrally improved.
In an embodiment, the method for decoding an adjustable serial cancellation list polar code further includes: and when the decoding result set of each bit data on all the decoding paths does not pass the cyclic redundancy check, calculating the log-likelihood ratio corresponding to the decoding paths based on the second calculation function, and taking the calculated log-likelihood ratio as a target result.
Since the bit sequence to be decoded directly affects the decoding result, it cannot be ignored in the second calculation function, so the second calculation function is redefined as:
wherein Pr (u)iY) is the fetching of the ith sequence bit data when the bit sequence to be decoded received by the decoder is yValue uiThe probability of (c). When decoding to the ith sequence bit data
The second calculation function may thus be
L is the number of decoding paths.
Further, when the decoding result set of each bit data on all the decoding paths does not pass the cyclic redundancy check, the decoder calculates a log-likelihood ratio corresponding to the decoding paths based on the second calculation function, and takes the calculated log-likelihood ratio as a target result.
In the above embodiment, the decoding result is obtained based on the redefined second calculation function, so that when the decoding method is cascaded with a technology adopting a log-likelihood ratio output form, conversion of the output result is not required, and thus the applicability of the adjustable polar code decoding method is improved.
It should be understood that, although the steps in the flowchart of fig. 2 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in fig. 2 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
In one embodiment, as shown in fig. 6, an adjustable serial cancellation list polar code decoding apparatus 600 is provided, comprising: an initial path number obtaining module 602, a path number adjusting module 604, and a decoding result obtaining module 606, where:
an initial path number obtaining module 602, configured to determine a candidate path to which current sequential bit data in a bit sequence to be decoded is applicable; and determining the number of the current paths according to the number of the candidate paths.
A path number adjusting module 604, configured to calculate decoding results and sequence decoding correctness of the current sequential bit data in different candidate paths, and screen, according to the sequence decoding correctness, target paths corresponding to the current sequential bit data in the current path number from the candidate paths; calculating the target probability corresponding to the current sequence bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path; and adjusting the number of the current paths according to the target probability and a preset threshold value to obtain the number of the target paths, and re-screening the target paths corresponding to the current sequence bit data in the number of the target paths from the candidate paths.
A decoding result obtaining module 606, configured to determine different candidate paths of the next sequential bit data based on each re-screened target path, use the next sequential bit data as current sequential bit data, use the number of target paths as the number of current paths, and return to the step of calculating decoding results and sequence decoding accuracy of the current sequential bit data in the different candidate paths until the last sequential bit data, so as to obtain multiple decoding paths from the first sequential bit data to the last sequential bit data; and calculating the sequence decoding accuracy of each decoding path, and taking the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result.
In one embodiment, as shown in fig. 7, the adjustable serial cancellation list polar code decoding apparatus 600 is further configured to set the decoding result of the current sequential bit data to 0 when the current sequential bit data is not an information bit.
In one embodiment, the path number adjusting module 604 further includes a likelihood metric module 6041 configured to calculate likelihood metric values of the correct paths when different candidate paths are decoded from the first sequential bit data to the current sequential bit data; converting the likelihood metric into a corresponding sequence decoding correct rate; and screening target paths corresponding to the number of current paths from the candidate paths, wherein the sequence decoding accuracy is the largest.
In one embodiment, the path number adjusting module 604 further includes a target probability obtaining module 6042, configured to obtain a sequence decoding accuracy of the target path; and adding the sequence decoding correct rates to obtain the target probability corresponding to the current sequence bit data.
In one embodiment, the path number adjustment module 604 is further configured to increase the current number of paths by a factor of two when the target probability is less than or equal to the threshold.
In an embodiment, the adjustable serial cancellation list polar code decoding apparatus 600 further includes a cyclic redundancy check module 608, configured to perform cyclic redundancy check on a decoding result set of each bit data corresponding to each decoding path; and when the decoding result set of each bit data on the decoding path passes the cyclic redundancy check, taking the decoding result of each bit data on the decoding path passing the cyclic redundancy check as a target result.
In one embodiment, the apparatus 600 further includes a log-likelihood ratio calculation module 610, configured to obtain a preset log-likelihood ratio calculation function; the log-likelihood ratio calculation function comprises a first calculation function and a second calculation function; and when the decoding result set of each bit data on the decoding path passes the cyclic redundancy check, calculating a log-likelihood ratio corresponding to the decoding path passing the cyclic redundancy check based on a first calculation function, and taking the calculated log-likelihood ratio as a target result.
In one embodiment, the log-likelihood ratio calculating module 610 is further configured to calculate a log-likelihood ratio corresponding to the decoding path based on the second calculation function when the decoding result set of each bit data on all the decoding paths fails the cyclic redundancy check, and take the calculated log-likelihood ratio as the target result.
For specific limitations of the adjustable serial cancellation list polar code decoding apparatus, reference may be made to the above limitations on the adjustable serial cancellation list polar code decoding method, and details are not repeated here. The modules in the adjustable serial cancellation list polar code decoding device can be wholly or partially realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
In one embodiment, a computer device is provided, which may be a terminal with a decoder, and its internal structure diagram may be as shown in fig. 8. The computer equipment comprises a processor, a memory, a network interface, a display screen and a decoding device which are connected through a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. When the decoding device is executed, an adjustable serial offset list polar code decoding method is realized.
Those skilled in the art will appreciate that the architecture shown in fig. 8 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database or other medium used in the embodiments provided herein can include non-volatile and/or volatile memory. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (11)
1. A method of adjustable serial cancellation list polar code decoding, the method comprising:
determining a candidate path applicable to current sequence bit data in a bit sequence to be decoded;
determining the number of current paths according to the length of the bit sequence to be decoded;
calculating decoding results and sequence decoding correct rates of the current sequence bit data under different candidate paths, and screening target paths corresponding to the current sequence bit data in the number of the current paths from the candidate paths according to the sequence decoding correct rates;
calculating the target probability corresponding to the current sequence bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path;
adjusting the number of the current paths according to the target probability and a preset threshold value to obtain the number of target paths, and re-screening the number of the target paths in the candidate paths, wherein the number of the target paths corresponds to the current sequence bit data;
determining different candidate paths of the next sequential bit data based on each re-screened target path, taking the next sequential bit data as current sequential bit data, taking the number of the target paths as the number of the current paths, and returning to the step of calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under the different candidate paths until the last sequential bit data, so as to obtain a plurality of decoding paths from the first sequential bit data to the last sequential bit data;
and calculating the sequence decoding accuracy of each decoding path, and taking the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result.
2. The method according to claim 1, wherein the bit sequence to be decoded comprises information bits and frozen bits; before the calculating the decoding results and the sequence decoding accuracy of the current sequential bit data under different candidate paths, the method further comprises:
and when the current sequence bit data is not the information bit, setting the decoding result of the current sequence bit data to be 0.
3. The method according to claim 1, wherein said calculating decoding results and sequence decoding correctness of the current sequential bit data under different candidate paths, and according to the sequence decoding correctness, screening target paths corresponding to the current sequential bit data among the candidate paths according to the number of the current paths comprises:
calculating the possibility metric value of the correct path when different candidate paths are decoded from the first sequence bit data to the current sequence bit data;
converting the likelihood metric value into a corresponding sequence decoding correct rate;
and screening target paths corresponding to the number of current paths from the candidate paths, wherein the sequence decoding accuracy is the largest.
4. The method of claim 1, wherein the calculating the target probability corresponding to the current sequential bit data according to the sequence decoding correctness rate corresponding to the decoding result under the target path comprises:
acquiring the sequence decoding accuracy of the target path;
and adding the sequence decoding correct rates to obtain the target probability corresponding to the current sequence bit data.
5. The method of claim 1, wherein the adjusting the current number of paths according to the target probability and a preset threshold comprises:
and when the target probability is less than or equal to a threshold value, increasing the current path number by two times.
6. The method according to claim 1, wherein the bit sequence to be decoded is obtained by encoding data to be encoded containing redundant symbols; the method further comprises the following steps:
respectively performing cyclic redundancy check on the decoding result set of each bit data corresponding to each decoding path;
and when the decoding result set of each bit data on the decoding path passes the cyclic redundancy check, taking the decoding result of each bit data on the decoding path passing the cyclic redundancy check as a target result.
7. The method according to claim 1, wherein the bit sequence to be decoded is obtained by encoding data to be encoded containing redundant symbols; the method further comprises the following steps:
respectively performing cyclic redundancy check on the decoding result set of each bit data corresponding to each decoding path;
acquiring a preset log-likelihood ratio calculation function; the log-likelihood ratio calculation function comprises a first calculation function and a second calculation function;
and when the decoding result set of each bit data on the decoding path passes through the cyclic redundancy check, calculating a log-likelihood ratio corresponding to the decoding path passing through the cyclic redundancy check based on the first calculation function, and taking the calculated log-likelihood ratio as a target result.
8. The method of claim 7, further comprising:
and when the decoding result set of each bit data on all the decoding paths does not pass the cyclic redundancy check, calculating the log-likelihood ratio corresponding to the decoding paths based on the second calculation function, and taking the calculated log-likelihood ratio as a target result.
9. An apparatus for decoding an adjustable serial cancellation list polar code, the apparatus comprising:
the initial path number acquisition module is used for determining a candidate path applicable to the current sequence bit data in the bit sequence to be decoded; determining the number of the current paths according to the number of the candidate paths;
the path number adjusting module is used for calculating decoding results and sequence decoding accuracy of the current sequence bit data under different candidate paths, and screening target paths corresponding to the current sequence bit data in the current path number from the candidate paths according to the sequence decoding accuracy; calculating the target probability corresponding to the current sequence bit data according to the sequence decoding accuracy corresponding to the decoding result under the target path; adjusting the number of the current paths according to the target probability and a preset threshold value to obtain the number of target paths, and re-screening the number of the target paths in the candidate paths, wherein the number of the target paths corresponds to the current sequence bit data;
a decoding result obtaining module, configured to determine that next sequential bit data is based on different candidate paths of each re-screened target path, use the next sequential bit data as current sequential bit data, use the number of target paths as the number of current paths, and return to the step of calculating decoding results and sequence decoding accuracy of the current sequential bit data in the different candidate paths until last sequential bit data, so as to obtain multiple decoding paths from first sequential bit data to last sequential bit data; and calculating the sequence decoding accuracy of each decoding path, and taking the decoding result of each bit data on the decoding path with the maximum sequence decoding accuracy as a target result.
10. The apparatus of claim 9, further comprising:
and the information bit determining module is used for setting the decoding result of the current sequence bit data to be 0 when the current sequence bit data is not the information bit.
11. The apparatus of claim 9, wherein the path adjustment module further comprises:
a target path acquisition module: the probability metric value used for calculating the correct path when different candidate paths are decoded from the first sequence bit data to the current sequence bit data; converting the likelihood metric into a corresponding sequence coding correct rate; and screening target paths corresponding to the number of current paths from the candidate paths, wherein the sequence decoding accuracy is the largest.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106888025A (en) * | 2017-01-19 | 2017-06-23 | 华中科技大学 | A kind of cascade Error-correcting Encoding and Decoding method and system based on polarization code |
| WO2018137567A1 (en) * | 2017-01-26 | 2018-08-02 | 华为技术有限公司 | Decoding method and apparatus for polar code |
| CN109921804A (en) * | 2019-03-22 | 2019-06-21 | 中国传媒大学 | A kind of adaptive fusion is serial to offset list polarization code coding method and system |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106888025A (en) * | 2017-01-19 | 2017-06-23 | 华中科技大学 | A kind of cascade Error-correcting Encoding and Decoding method and system based on polarization code |
| WO2018137567A1 (en) * | 2017-01-26 | 2018-08-02 | 华为技术有限公司 | Decoding method and apparatus for polar code |
| CN109921804A (en) * | 2019-03-22 | 2019-06-21 | 中国传媒大学 | A kind of adaptive fusion is serial to offset list polarization code coding method and system |
Non-Patent Citations (1)
| Title |
|---|
| 基于树图剪枝的极化码译码简化算法;冯博文;《系统工程与电子技术》;20170228;全文 * |
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