CN112700731A - Display panel and splicing panel - Google Patents
Display panel and splicing panel Download PDFInfo
- Publication number
- CN112700731A CN112700731A CN202011578532.5A CN202011578532A CN112700731A CN 112700731 A CN112700731 A CN 112700731A CN 202011578532 A CN202011578532 A CN 202011578532A CN 112700731 A CN112700731 A CN 112700731A
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- power supply
- edge
- line
- display panel
- bridge
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- 239000000758 substrate Substances 0.000 claims abstract description 43
- 239000004020 conductor Substances 0.000 claims description 12
- 239000010409 thin film Substances 0.000 claims description 8
- 239000003990 capacitor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Images
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
Abstract
A display panel and a splicing panel are provided, the display panel comprises a substrate, a first power supply unit and a second power supply unit. The first power supply unit is positioned on the substrate and comprises a plurality of first power supply lines and first bridging lines. The first bridging lines contact the first edge of the substrate, and the first power supply lines are electrically connected with each other through the first bridging lines. The second power supply unit is located on the substrate and comprises a plurality of second power supply lines and second bridging lines. The second bridging line contacts the first edge of the substrate, wherein the second power supply lines are electrically connected with each other through the second bridging line, and the second power supply unit and the first power supply unit have different potentials.
Description
Technical Field
The invention relates to a display panel and a splicing panel.
Background
Compared with a liquid crystal display, the light emitting diode display has the possibility of high border-free design, and can achieve the advantages of zero visual joints and difficult influence on the quality of a displayed picture by utilizing a modular splicing mode, so that the light emitting diode display is more and more emphasized in recent years.
The leds are driven by current, and if the display has different potentials, the current passing through the leds may be affected, which may cause uneven brightness or unlit of the display, and the larger the size of the display is, the more the display is affected. Therefore, a solution to the above-mentioned problems is needed.
Disclosure of Invention
The invention provides a display panel, which reduces the risk of short circuit.
The invention provides a spliced panel, which reduces the risk of short circuit and avoids the problem of voltage drop of a display panel due to overlarge size.
The invention provides a display panel, which comprises a substrate, a first power supply unit and a second power supply unit. The first power supply unit is positioned on the substrate and comprises a plurality of first power supply lines and first bridging lines. The first bridging lines contact the first edge of the substrate, and the first power supply lines are electrically connected with each other through the first bridging lines. The second power supply unit is located on the substrate and comprises a plurality of second power supply lines and second bridging lines. The second bridging line contacts the first edge of the substrate, wherein the second power supply lines are electrically connected with each other through the second bridging line, and the second power supply unit and the first power supply unit have different potentials.
The invention provides a spliced panel which comprises a plurality of display panels and conductive materials. The first edges of the substrates of two adjacent display panels are in contact with each other. The conductive material is located on each first edge and contacts the first bridging lines and the second bridging lines.
Based on the above, in the display panel and the tiled display panel according to the embodiment of the invention, when the display panel is tiled with other display panels, the risk of short circuit at the contact surface of the two display panels can be reduced. In the tiled display panel according to an embodiment of the present invention, when a local area of one of the display panels is lit, the current of the other display panel can support the lit local area, thereby avoiding the problem of an IR drop (IR drop) caused by an oversized display panel.
Drawings
Various aspects of the disclosure can be understood from the following detailed description when read in conjunction with the accompanying drawings. It is noted that the various features of the drawings are not to scale in accordance with standard practice in the industry. In fact, the dimensions of the features described may be arbitrarily increased or reduced for clarity of discussion.
Fig. 1A is a schematic top view of a display device according to an embodiment of the invention.
Fig. 1B is a schematic top view of a display device according to an embodiment of the invention.
Fig. 1C is an equivalent circuit diagram of the pixel structure of fig. 1B.
FIG. 2 is a schematic top view of a tiled panel according to an embodiment of the invention.
Fig. 3 is a schematic sectional view taken along the sectional line a-a' of fig. 2.
Fig. 4 is a schematic sectional view taken along the sectional line B-B' of fig. 2.
FIG. 5 is a schematic top view of a tiled panel according to an embodiment of the invention.
Fig. 6 is a schematic sectional view taken along the sectional line a-a' of fig. 5.
Fig. 7 is a schematic sectional view taken along the sectional line B-B' of fig. 5.
FIG. 8 is a schematic top view of a tiled panel according to an embodiment of the invention.
Fig. 9 is a schematic sectional view taken along the sectional line a-a' of fig. 8.
Fig. 10 is a schematic sectional view taken along the sectional line B-B' of fig. 8.
Fig. 11 is a schematic top view of a display panel according to another embodiment of the invention.
FIG. 12 is a schematic top view of a tiled panel according to an embodiment of the invention.
Fig. 13 is a schematic top view of a display panel according to another embodiment of the invention.
FIG. 14 is a schematic top view of a tiled panel according to another embodiment of the invention.
Fig. 15 is a schematic top view of a display panel according to another embodiment of the invention.
FIG. 16 is a schematic top view of a tiled panel according to an embodiment of the invention.
Description of reference numerals:
10: display panel
12: support plate
20,20a,20 b: splicing panel
30: display panel
40: splicing panel
50: display panel
60: splicing panel
70: display panel
80: splicing panel
100: substrate
100 a: first edge
100 b: second edge
100 c: third edge
100 d: fourth edge
102: first power supply unit
104: second power supply unit
106: first power supply line
106A: the first part
108: first bridge connector
110: second power supply line
110A: the second part
112: second bridge connection line
112A: first branch
112B: second branch
114: soft board
116: light emitting element
118: conductive material
118A: the first part
118B: the second part
120: third bridging line
122: fourth bridging line
124: fifth bridge connection line
126: sixth bridge connection line
128: the seventh bridge connection line
130: eighth bridge connection line
A-A': cutting line
AA: display area
B-B': cutting line
Cs: storage capacitor
D1: a first direction
D2: second direction
DE 1: a first drain electrode
DE 2: second drain electrode
GE 1: a first grid electrode
GE 2: second grid
L1: length of
NA: non-display area
PX: pixel structure
S1: distance between each other
SE 1: a first source electrode
SE 2: second source electrode
T1: a first thin film transistor
T2: second thin film transistor
Detailed Description
Fig. 1A is a schematic top view of a display panel 10 according to an embodiment of the invention, and referring to fig. 1A, the display panel 10 includes a substrate 100, a first power supply unit 102, and a second power supply unit 104. The first power supply unit 102 is disposed on the substrate 100 and includes a plurality of first power supply lines 106 and first bridge lines 108. The first bridging lines 108 contact the first edge 100a of the substrate 100, and the first power supply lines 106 are electrically connected to each other through the first bridging lines 108. The second power supply unit 104 is disposed on the substrate 100 and includes a plurality of second power supply lines 110 and second bridge lines 112, the second bridge lines 112 contact the first edge 100a of the substrate 100, wherein the second power supply lines 110 are electrically connected to each other through the second bridge lines 112, and the second power supply unit 104 and the first power supply unit 102 have different potentials.
Therefore, when the display panel 10 is spliced with other display panels (see fig. 2), the risk of short circuit at the contact surface of the two display panels 10 can be reduced. For example, when the first edge 100a of the display panel 10 is connected to the first edges of other display panels (see fig. 2), the short circuit does not occur at the contact surface of the first edges 100 a. For example, the first power supply line 106 and the second power supply line 110 can be in contact with the same electrical traces of the display panel (see fig. 2) to be spliced, thereby reducing the risk of short circuit.
For convenience of illustration, the first direction D1 and the second direction D2 are shown in fig. 1A and 1B, and the first direction D1 and the second direction D2 intersect. The first bridge threads 108 and the second bridge threads 112 are parallel to the first direction D1.
The display panel 10 has a plurality of pixel structures PX (see fig. 1B) arranged in an array on the substrate 100, for example, the pixel structures PX are arranged in an array along a first direction D1 and a second direction D2. For convenience of explanation, fig. 1B omits members showing portions. Referring to fig. 1A and fig. 1B, the display panel 10 has a display area AA and a non-display area NA, and the non-display area NA is located at one side of the display area AA. For example, the outline of the display area AA is rectangular, in other words, the display area AA has four sides perpendicular to each other, and the non-display area NA is located on one of the four sides of the display area AA. In the present embodiment, the non-display area NA is located on a side of the display area AA away from the first edge 100a of the substrate 100. The display panel 10 also has a flexible board 114 positioned in the non-display area NA. In the present embodiment, the Flexible board 114 is, for example, a Flexible Printed Circuit (Flexible Printed Circuit).
The flexible board 114 is located on a second edge 100b of the substrate 100, wherein the second edge 100b is opposite to the first edge 100 a. The flexible board 114 provides a common source of operating voltage (Vdd) and a common ground voltage (Vss). For example, the first power supply unit 102 receives the working voltage (Vdd) from the flexible printed circuit board 114, and the second power supply unit 104 receives the ground voltage (Vss) from the flexible printed circuit board 114.
Fig. 1C is an equivalent circuit diagram of the pixel structure PX of fig. 1B. Referring to fig. 1A, fig. 1B and fig. 1C, each pixel structure PX includes a light emitting element 116, a first thin film transistor T1 and a second thin film transistor T2. In the present embodiment, the light emitting element 116 is, for example, a light emitting diode. The light emitting device 116 is coupled to the second power supply line 110 for receiving a ground voltage (Vss), the first thin film transistor T1 has a first gate GE1, a first source SE1 and a first drain DE1, the first source SE1 is coupled to the first power supply line 106 for receiving a working voltage (Vdd), and the first drain DE1 is coupled to the light emitting device 116. The storage capacitor Cs is coupled between the first drain DE1 and the first gate GE 1.
The second thin film transistor T2 has a second gate electrode GE2, a second source electrode SE2 and a second drain electrode DE2, the second source electrode SE2 receives the data voltage (Vdata), the second drain electrode DE2 is coupled to the first gate electrode GE1, and the second gate electrode GE2 receives the scan voltage (Sn).
The first power supply lines 106 constitute a metal grid, and the second power supply lines 110 constitute a metal grid.
The first power supply line 106 has a first portion 106A closest to the flexible printed circuit board 114, and the line width of the first portion 106A is greater than the line widths of the remaining first power supply lines 106, so as to prevent the first portion 106A from damaging the flexible printed circuit board 114 due to excessive current when the first portion 106A collects the current to the flexible printed circuit board 114, thereby improving the reliability of the first power supply line 106.
The second power supply line 110 has a second portion 110A closest to the flexible board 114, and the line width of the second portion 110A is greater than the line widths of the remaining second power supply lines 110, so as to avoid damage caused by excessive current when the second portion 110A collects the current to the flexible board 114, and improve the reliability of the second power supply line 110.
The line width of the first bridging line 108 is greater than the line widths of the first power supply line 106 and the second power supply line 110, so that damage to the first bridging line 108 due to excessive current when the current is collected to the first bridging line 108 can be avoided, and the reliability of the first bridging line 108 is improved. The line width of the second bridge connection line 112 is greater than the line widths of the first power supply line 106 and the second power supply line 110, so that damage to the second bridge connection line 108 due to excessive current when the current is collected to the second bridge connection line 108 can be avoided, and the reliability of the second bridge connection line 108 can be improved.
The first bridge threads 108 are mirror-symmetrical about an axis perpendicular to the first edge 100a (i.e., the second direction D2), and the second bridge threads 112 are mirror-symmetrical about the axis along the direction (i.e., the second direction D2). The other display panels to be tiled (see fig. 2) are rotated 180 degrees with respect to the display panel 10 so that the first edges 100a of the respective substrates 100 of two adjacent display panels are in contact with each other. In this way, when the first edge 100a of the display panel 10 is spliced with another display panel (see fig. 2), the first bridge line 108 may contact the first bridge line 108 of the other display panel (see fig. 2) and avoid contacting the second bridge line 112 thereof, the second bridge line 112 may contact the second bridge line 112 of the other display panel (see fig. 2) and avoid contacting the first bridge line 108 thereof, that is, the first bridge line 108 of the display panel 10 may not contact the second bridge line 112 having a different potential, and the second bridge line 112 of the display panel 10 may not contact the first bridge line 108 having a different potential, thereby avoiding a short circuit.
Fig. 2 is a top view of a tiled panel 20 according to an embodiment of the invention, fig. 3 is a cross-sectional view taken along a line a-a 'of fig. 2, fig. 4 is a cross-sectional view taken along a line B-B' of fig. 2, and with reference to fig. 2, fig. 3 and fig. 4, the tiled panel 20 includes a plurality of display panels 10. In this embodiment, the splice panel 20 also includes a carrier plate 12. In some embodiments, the display panels 10 are combined together by a carrier 12. In some embodiments, the carrier 120 includes two parts respectively assembled to the two display panels 10, and then the two parts of the carrier 12 are bonded to each other. In some embodiments, the display panels 10 are commonly secured to a one-piece carrier 12. The first edges 100a of the substrates 100 of two adjacent display panels 10 contact each other. When one of the display panels 10 is lit, the current of the other display panel 10 can support the lit local area, thereby avoiding the problem of voltage drop (IR drop) caused by the display panel 10 being too large and making the brightness of the display panel uniform. In the present embodiment, as mentioned above, one half of the display panels 10 is rotated 180 degrees relative to the other half of the display panels 10, so that the first edges 100a of the substrates 100 of two adjacent display panels 10 contact each other to form the tiled panel 20.
Fig. 5 is a top view of a tiled panel 20a according to an embodiment of the invention, fig. 6 is a cross-sectional view taken along a line a-a 'of fig. 5, fig. 7 is a cross-sectional view taken along a line B-B' of fig. 5, and referring to fig. 5, fig. 6 and fig. 7 together, the main difference between the tiled panel 20a of fig. 5 and the tiled panel 20 of fig. 2 is that the tiled panel 20a further includes a conductive material 118, and the conductive material 118 is located on each of the first edges 100a and contacts the first bridge line 108 and the second bridge line 112. The conductive material 118 can provide good electrical conduction between the first bridge lines 108 and between the second bridge lines 112, and reduce the resistance of the first power supply line 106 and the second power supply line 110 of each display panel 10. In the present embodiment, the conductive material 118 has a first portion 118A and a second portion 118B, the first portion 118A is located on the top surface of the first bridge line 108, and the second portion 118B is located on the top surface of the second bridge line 112. The first portion 118A and the second portion 118B are spaced apart from each other. For example, the first portion 118A and the second portion 118B are separated along the first direction D1.
Fig. 8 is a top view of a tiled panel 20B according to an embodiment of the invention, fig. 9 is a cross-sectional view taken along a line a-a 'of fig. 8, fig. 10 is a cross-sectional view taken along a line B-B' of fig. 8, and referring to fig. 8, 9 and 10 together, the main difference between the tiled panel 20B of fig. 8 and the tiled panel 20a of fig. 5 is that the first and second bridge lines 108 and 112 of each display panel 10 extend to the side of the first edge 100a of the substrate 100, and the conductive material 118 is located between the sides of the first edges 100 a. The conductive material 118 can provide good electrical conduction between the first bridge lines 108 and between the second bridge lines 112, and reduce the resistance of the first power supply line 106 and the second power supply line 110 of each display panel 10. In the present embodiment, the conductive material 118 has a first portion 118A and a second portion 118B, the first portion 118A is located on a side of the first bridge line 108, and the second portion 118B is located on a side of the second bridge line 112. The first portion 118A and the second portion 118B are spaced apart from each other. For example, the first portion 118A and the second portion 118B are separated along the first direction D1.
Fig. 11 is a schematic top view of a display panel 30 according to another embodiment of the invention, and the main difference between the display panel 30 of fig. 11 and the display panel 10 of fig. 1 is that the first power supply unit 102 further includes a third bridge line 120, the second power supply unit 104 further includes a fourth bridge line 122, and the third bridge line 120 and the fourth bridge line 122 contact the second edge 100b of the substrate 100. In this way, in addition to the first edge 100a of the display panel 30 can be spliced with other display panels (see fig. 12), the second edge 100b of the display panel 30 can also be spliced with other display panels (see fig. 12) to make the splicing flexible. For example, the third bridge line 120 of the display panel 30 may contact the first bridge lines 108 of other display panels (see fig. 12), and the fourth bridge line 122 may contact the second bridge lines 112 of other display panels (not shown), so as to reduce the risk of short circuit.
The third bridge line 120 is mirror-symmetrical about an axis in a direction perpendicular to the second edge 100b (i.e., the second direction D2), and the fourth bridge line 122 is mirror-symmetrical about an axis in the direction (i.e., the second direction D2). The first edges of the other display panels to be spliced (see fig. 12) and the second edge 100b of the display panel 30 are contacted with each other, so that when the second edge 100b of the display panel 30 is spliced with the other display panels (see fig. 12), the third bridge lines 120 can contact the first bridge lines 108 and avoid contacting the second bridge lines 112, and the fourth bridge lines 122 can contact the second bridge lines 112 and avoid contacting the first bridge lines 108, thereby avoiding short circuit.
In the present embodiment, the second bridge line 112 has a first branch 112A and a second branch 112B physically separated along a direction perpendicular to the first edge 100a (i.e., the second direction D2), and a distance S1 between the first branch 112A and the second branch 112B is greater than a length L1 of the flexible board 114 along the direction extending along the first edge 100 a. In other words, the spacing S1 of the first branch 112A and the second branch 112B along the first direction D1 is greater than the length L1 of the soft board 114 along the first direction D1. That is, the first branch 112A and the second branch 112B have a clearance therebetween, so that the flexible boards of other display panels (see fig. 12) to be tiled do not contact and damage the first branch 112A and the second branch 112B.
Fig. 12 is a schematic top view of a tiled display panel 40 according to an embodiment of the invention, referring to fig. 12, the tiled display panel 40 includes a plurality of display panels 30, and a first edge 100a and a second edge 100b of a substrate 100 of two adjacent display panels 30 are in contact with each other. When one of the display panels 30 is lit, the current of the other display panel 30 can support the lit local area, thereby avoiding the problem of voltage drop (IR drop) due to the display panel 30 being oversized. In the present embodiment, the flexible board 114 is recessed to the back surface of the substrate 100, so that the first edge 100a and the second edge 100b of the display panel 30 can contact each other.
Fig. 13 is a schematic top view of a display panel 50 according to another embodiment of the present invention, and the main difference between the display panel 50 of fig. 13 and the display panel 10 of fig. 1 is that the first power supply unit 102 further includes a fifth bridge line 124, the second power supply unit 104 further includes a sixth bridge line 126, the fifth bridge line 124 and the sixth bridge line 126 contact the third edge 100c of the substrate 100, and the third edge 100c is connected to one end of the first edge 100 a. In this way, in addition to the first edge 100a of the display panel 50 can be spliced with other display panels (see fig. 14), the third edge 100c of the display panel 50 can also be spliced with other display panels (see fig. 14) to make the splicing flexible. For example, the fifth bridge line 124 of the display panel 50 may be in contact with the first power supply line of another display panel (see fig. 14), and the sixth bridge line 126 may be in contact with the second power supply line of another display panel (not shown), so as to reduce the risk of short circuit.
The fifth bridge line 124 is axially mirror-symmetrical along a direction perpendicular to the third edge 100c (i.e., the first direction D1), and the sixth bridge line 126 is axially mirror-symmetrical along the direction (i.e., the first direction D1). The display panel 50 has a fourth edge 100d opposite to the third edge 100c, and the fourth edges of other display panels to be spliced (see fig. 14) are in contact with the third edge 100c of the display panel 50, so that when the third edge 100c of the display panel 50 is spliced with other display panels (see fig. 14), the fifth bridge lines 124 can contact the first power supply lines 106 and avoid contacting the second power supply lines 110, and the sixth bridge lines 126 can contact the second power supply lines 110 and avoid contacting the first power supply lines 106, thereby avoiding short circuit.
In the present embodiment, a portion of the first power supply line 106 and a portion of the second power supply line 110 of the display panel 50 extend to contact the fourth edge 100 d. For example, the first power supply line 106 corresponding to the fifth bridge line 124 extends to contact the fourth edge 100d, and the second power supply line 110 corresponding to the sixth bridge line 126 extends to contact the fourth edge 100d, so as to reduce the area of the display panel 50 on which other bridge lines are disposed on a single side (e.g., the fourth edge 100d) and reduce the alignment precision during the splicing process.
Fig. 14 is a schematic top view of a tiled display panel 60 according to another embodiment of the invention, the tiled display panel 60 includes a plurality of display panels 50, a fourth edge 100d is connected to the other end of the first edge 100a, and the third edge 100c and the fourth edge 100d of each substrate 100 of two adjacent display panels 50 are in contact with each other. When one of the display panels 50 is lit, the current of the other display panel 50 can support the lit local area, thereby avoiding the problem of voltage drop (IR drop) of the display panel 50 due to an over-size, and making the brightness of the display panel uniform.
Fig. 15 is a schematic top view of a display panel 70 according to another embodiment of the present invention, and the main difference between the display panel 70 of fig. 15 and the display panel 50 of fig. 13 is that the first power supply unit 102 further includes a seventh bridge line 128, the second power supply unit 104 further includes an eighth bridge line 130, and the seventh bridge line 128 and the eighth bridge line 130 contact the fourth edge 100d of the substrate 100. In this way, in addition to the first edge 100a and the third edge 100c of the display panel 70 being able to be spliced with other display panels (see fig. 16), the fourth edge 100d of the display panel 70 is also able to be spliced with other display panels (see fig. 16) to make the splicing flexible. For example, the seventh bridge line 128 of the display panel 70 may contact the fifth bridge line 124 of another display panel (see fig. 16), and the eighth bridge line 130 may contact the sixth bridge line of another display panel (see fig. 16), so as to reduce the risk of short circuit.
The seventh bridge line 128 is axially mirror-symmetrical along a direction perpendicular to the fourth edge 100D (e.g., the first direction D1), and the eighth bridge line 130 is axially mirror-symmetrical along this direction (e.g., the first direction D1). In this way, when the fourth edge 100d of the display panel 70 is spliced with other display panels (see fig. 16), the seventh bridge line 128 may contact the fifth bridge line 124 and avoid contacting the sixth bridge line 126, and the eighth bridge line 130 may contact the sixth bridge line 126 and avoid contacting the fifth bridge line 124, thereby avoiding a short circuit.
Fig. 16 is a schematic top view of a tiled panel 80 according to an embodiment of the invention, referring to fig. 16, the tiled panel 80 includes a plurality of display panels 70, and the third edge 100c and the fourth edge 100d of each substrate 100 of two adjacent display panels 70 are in contact with each other. When one of the display panels 70 is lit, the current of the other display panel 70 can support the lit local area, thereby avoiding the problem of voltage drop (IR drop) due to the display panel 70 having an excessively large size and making the brightness of the display panel uniform.
In summary, in the display panel and the tiled display panel according to the embodiment of the invention, when the display panel is tiled with other display panels, the risk of short circuit at the contact surface of the two display panels can be reduced. In the tiled display panel according to an embodiment of the present invention, when a local area of one of the display panels is lit, the current of the other display panel can support the lit local area, thereby avoiding the problem of an IR drop (IR drop) caused by an oversized display panel.
Claims (14)
1. A display panel, comprising:
a substrate;
a first power supply unit disposed on the substrate and including:
a plurality of first power supply lines; and
a first bridging line contacting a first edge of the substrate, the first power supply lines being electrically connected to each other through the first bridging line; and
a second power supply unit disposed on the substrate and including:
a plurality of second power supply lines; and
and a second bridging line contacting the first edge of the substrate, wherein the second power supply lines are electrically connected with each other through the second bridging line, and the second power supply unit and the first power supply unit have different potentials.
2. The display panel according to claim 1, wherein the first bridge line is mirror-symmetrical about an axis perpendicular to the first edge, and the second bridge line is mirror-symmetrical about the axis.
3. The display panel of claim 1, further comprising:
a flexible board located on a second edge of the substrate, wherein the second edge is opposite to the first edge.
4. The display panel of claim 3, wherein the first power supply unit further comprises a third bridge line, the second power supply unit further comprises a fourth bridge line, and the third bridge line and the fourth bridge line contact the second edge of the substrate.
5. The display panel of claim 4, wherein the third bridge line is mirror symmetric along a direction perpendicular to the second edge, and the fourth bridge line is mirror symmetric along the direction.
6. The display panel of claim 1, wherein the first power supply unit further comprises a fifth bridge line, the second power supply unit further comprises a sixth bridge line, the fifth bridge line and the sixth bridge line contact a third edge of the substrate, and the third edge is connected to one end of the first edge.
7. The display panel according to claim 6, wherein the fifth bridge line is mirror symmetric along a direction perpendicular to the third edge, and the sixth bridge line is mirror symmetric along the direction.
8. The display panel of claim 2, wherein the first power supply unit further comprises a seventh bridge connector, the second power supply unit further comprises an eighth bridge connector, the seventh bridge connector and the eighth bridge connector contact a fourth edge of the substrate, and the fourth edge is connected to one end of the first edge.
9. The display panel according to claim 8, wherein the seventh bridge line is mirror symmetric along a direction perpendicular to the fourth edge, and the eighth bridge line is mirror symmetric along the direction.
10. The display panel of claim 3, wherein the second bridge line has a first branch and a second branch physically separated along a direction perpendicular to the first edge, and a distance between the first branch and the second branch is greater than a length of the flexible printed circuit along the direction in which the first edge extends.
11. The display panel of claim 1, wherein the first bridge line has a width greater than the width of the first power supply line and the width of the second power supply line.
12. The display panel of claim 1, further comprising:
a plurality of pixel structures arranged in an array on the substrate, wherein each pixel structure comprises:
a light emitting device coupled to the second power supply line;
a first thin film transistor having a first gate, a first source and a first drain, the first source being coupled to the first power supply line, and the first drain being coupled to the light emitting device; and
a second thin film transistor having a second gate, a second source and a second drain, wherein the second source receives a data voltage, the second drain is coupled to the first gate, and the second gate receives a scan voltage.
13. A tiled panel, comprising:
a plurality of display panels as claimed in any one of claims 1 to 12, wherein the first edges of the substrates of two adjacent display panels are in contact with each other; and
and a conductive material on each first edge and contacting the first bridging line and the second bridging line.
14. The tiled display panel of claim 13 wherein the first and second bridge lines of each display panel extend to sides of the first edge of the substrate and the conductive material is between the sides of each first edge.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
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| KR102592955B1 (en) * | 2016-06-17 | 2023-10-24 | 삼성디스플레이 주식회사 | Display panel, and electronic apparatus including the same |
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| Publication number | Publication date |
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| TWI772888B (en) | 2022-08-01 |
| TW202211513A (en) | 2022-03-16 |
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Application publication date: 20210423 |