CN112698179A - Precise measurement method for floating direct current small signal voltage - Google Patents

Precise measurement method for floating direct current small signal voltage Download PDF

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Publication number
CN112698179A
CN112698179A CN202110026574.6A CN202110026574A CN112698179A CN 112698179 A CN112698179 A CN 112698179A CN 202110026574 A CN202110026574 A CN 202110026574A CN 112698179 A CN112698179 A CN 112698179A
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field effect
tested
effect transistor
measure
relays
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CN202110026574.6A
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魏津
张经祥
徐润生
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Sundec Semiconductor Technology Shanghai Co Ltd
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Sundec Semiconductor Technology Shanghai Co Ltd
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Priority to CN202110026574.6A priority Critical patent/CN112698179A/en
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Priority to TW110129685A priority patent/TWI800891B/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0084Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only

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  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

The invention relates to the technical field of semiconductor testing, in particular to a precise measurement method for floating direct current small signal voltage. A precise measurement method for floating DC small signal voltage comprises a test carrier plate, and is characterized in that: the field effect transistor to be tested is arranged on the test carrier plate, two ends of a drain electrode and a source electrode of the field effect transistor to be tested are connected with an anode and cathode switching network, the anode and cathode switching network consists of 4 relays, the 4 relays are divided into two groups, and each group consists of two relays. Compared with the prior art, on the automatic test machine test carrier board, connect 4 relays, form positive negative exchange network, introduce 4 way relay drive control signals from the automatic test machine, carry out the switching of two sets of states to through simple, quick operation, can reject the systematic error of differential voltmeter, greatly reduced the influence of systematic error in the small-signal measurement, improved the expansion ability of automatic test machine.

Description

Precise measurement method for floating direct current small signal voltage
Technical Field
The invention relates to the technical field of semiconductor testing, in particular to a precise measurement method for floating direct current small signal voltage.
Background
The output efficiency is highest when the audio power amplifier is operating in class D mode. In order to obtain the optimal output efficiency, the chip manufacturing process and the packaging process are required to ensure that the smaller the on-resistance of the field effect transistor of the output stage, the better. Typically, the on-resistance is between 20m Ω (milliohms) and 50m Ω (milliohms). The measurement of such a small resistor is a great challenge, and another limitation is that the on-resistance can only be measured under the condition of power-on operation, that is, the voltages at two ends of the tested field-effect transistor are floating during measurement, so that the measurement is always a difficulty in the test of the field-effect transistor output stage power amplifier.
In addition, in order to ensure high fidelity sound quality, it is generally required that the difference in on-resistance of a pair of fets at the OUT + terminal be less than +/-0.5m Ω (milliohms). The automatic tester is required to have the capability of testing precise floating direct-current small-signal parameters, and great challenges are provided for the automatic tester.
At present, the common practice in the field of semiconductor testing is: firstly, a condition of converting a tiny resistor into voltage is created to avoid the defect of large measurement error of the tiny resistor. Specifically, when a PWM (pulse width modulation) controller is configured to have a duty ratio of 100%, the fet G1 to be tested is set to be in a conducting state, a constant current, for example, 100mA, is supplied from a programmable power supply (power supply 2) and is injected into the drain electrode of G1, a voltage drop is generated across the drain electrode and the source electrode, measurement is performed by using a floating differential voltmeter, and finally, the current is divided, so that the on-resistance R of the fet can be calculateddsON=Vmeasure/IforceWherein R isdsONIs an effect tube on-resistance, VmeasureFor measuring the reading of the voltage difference across the field effect transistor, IforceAnd (3) the current which is filled in the current source mode for the external program control power supply to work.
However, the following disadvantages exist with the usual practice: 1. first, the nominal measurement accuracy of the differential voltmeter of the automatic tester is usually +/-1mV, and the system error of the differential voltmeter accounts for 50% of the measurement reading for the measured signal as low as 2Mvd, and even if the measured signal is 5mV, the system error accounts for 20% as high. In this case, the usual solution is to increase the current sinking to increase the voltage drop across the on-resistance to reduce the fraction of voltmeter system error in the measurement readings. However, the method can increase the constant power consumption of the tested field effect transistor, and when the test time is not controlled well, the tested chip can be burnt out with a certain probability; 2. the second approach, which is usually to increase the number of measurements and average the results of tens of measurements in order to reduce the effect of errors, increases the testing time and increases the testing cost.
Disclosure of Invention
The invention provides a precise measurement method for floating direct current small signal voltage, which overcomes the defects of the prior art, and is characterized in that 4 relays are connected on a test carrier plate of an automatic tester to form a positive and negative switching network, 4 paths of relay driving control signals are introduced from the automatic tester to switch two groups of states, and the system error of a differential voltmeter can be eliminated through simple and rapid operation, so that the influence of the system error in small signal measurement is greatly reduced, and the expansion capability of the automatic tester is improved.
In order to achieve the above object, a precise measurement method for floating dc small signal voltage is designed, which includes a test carrier plate, and is characterized in that: the method comprises the following steps that a tested field effect tube is arranged on a test carrier plate, two ends of a drain electrode and a source electrode of the tested field effect tube are connected with an anode-cathode switching network, the anode-cathode switching network consists of 4 relays, the 4 relays are divided into two groups, and each group consists of two relays;
the specific measurement method is as follows:
s1: arranging a tested field effect transistor on the test carrier plate;
s2: the drain electrode and the source electrode of the field effect tube to be tested are connected with the anode and the cathode of the differential voltmeter through the anode and cathode switching network;
s3: when the positive and negative switching network is in state 1, a first set of measurement data is available: vreading1= Vmeasure+VSE
S4: when in useWhen the positive and negative electrode switching network is in state 2, a second set of measurement data can be obtained: vreading2= (-Vmeasure)+VSE
S5: subtracting the first set of measurement data and the second set of measurement data by 2 to obtain: (V)reading1- Vreading2)/2=[ (Vmeasure+VSE)-(-Vmeasure)+VSE)]/2=2 Vmeasure/2= VmeasureAnd obtaining the real voltage value of the field effect transistor (G1) to be tested.
When the positive and negative exchange network is in the state 1, the drain electrode of the tested field effect transistor is connected with the positive electrode of the differential voltmeter; and the source electrode of the field effect transistor to be detected is connected with the negative electrode of the differential voltmeter.
When the positive and negative exchange network is in the state 2, the drain electrode of the tested field effect transistor is connected with the negative electrode of the differential voltmeter; and the source electrode of the field effect transistor to be tested is connected with the anode of the differential voltmeter.
The V ismeasureIs the true voltage value, V, on the on-resistanceSEIs the differential voltmeter system error.
Compared with the prior art, the invention provides the precise measurement method for the floating direct current small signal voltage, 4 relays are connected on a test carrier plate of the automatic tester to form a positive and negative switching network, 4 paths of relay drive control signals are introduced from the automatic tester to switch two groups of states, and the system error of the differential voltmeter can be eliminated through simple and rapid operation, so that the influence of the system error in small signal measurement is greatly reduced, and the expansion capability of the automatic tester is improved.
Drawings
Fig. 1 is a schematic view illustrating a conventional fet connected to a test carrier board.
Fig. 2 is a schematic diagram illustrating a test state of a conventional fet under test on a test carrier board.
Fig. 3 is a schematic view of the connection structure of the present invention.
Fig. 4 is a schematic connection diagram of the positive-negative switching network in state 1.
Fig. 5 is a schematic connection diagram of the positive-negative switching network in state 2.
Fig. 6 to 8 are schematic connection diagrams of the embodiment.
Detailed Description
The invention is further illustrated below with reference to the accompanying drawings.
As shown in fig. 1, when the audio power amplifier operates in the class D mode, the output efficiency is the highest. In order to obtain the optimal output efficiency, the chip manufacturing process and the packaging process are required to ensure that the smaller the on-resistance of the field effect transistor of the output stage, the better. Typically, the on-resistance is between 20m Ω (milliohms) and 50m Ω (milliohms). The measurement of such a small resistor is a great challenge, and another limitation is that the on-resistance can only be measured under the condition of power-on operation, that is, the voltages at two ends of the tested field-effect transistor are floating during measurement, so that the measurement is always a difficulty in the test of the field-effect transistor output stage power amplifier.
In addition, in order to ensure high fidelity sound quality, it is generally required that the difference in on-resistance of a pair of fets at the OUT + terminal be less than +/-0.5m Ω (milliohms). The automatic tester is required to have the capability of testing precise floating direct-current small-signal parameters, and great challenges are provided for the automatic tester.
As shown in fig. 2, the current common practice in the semiconductor testing field is: firstly, a condition of converting a tiny resistor into voltage is created to avoid the defect of large measurement error of the tiny resistor. Specifically, when a PWM (pulse width modulation) controller is configured to have a duty ratio of 100%, the fet G1 to be tested is set to be in a conducting state, a constant current, for example, 100mA, is supplied from a programmable power supply (power supply 2) and is injected into the drain electrode of G1, a voltage drop is generated across the drain electrode and the source electrode, measurement is performed by using a floating differential voltmeter, and finally, the current is divided, so that the on-resistance R of the fet can be calculateddsON=Vmeasure/IforceWherein R isdsONIs an effect tube on-resistance, VmeasureFor measuring the reading of the voltage difference across the field effect transistor, IforceCurrent injected for external program-controlled power supply working in current source mode。
However, the following disadvantages exist with the usual practice: 1. first, the nominal measurement accuracy of the differential voltmeter of the automatic tester is usually +/-1mV, and the system error of the differential voltmeter accounts for 50% of the measurement reading for the measured signal as low as 2Mvd, and even if the measured signal is 5mV, the system error accounts for 20% as high. In this case, the usual solution is to increase the current sinking to increase the voltage drop across the on-resistance to reduce the fraction of voltmeter system error in the measurement readings. However, the method can increase the constant power consumption of the tested field effect transistor, and when the test time is not controlled well, the tested chip can be burnt out with a certain probability; 2. the second approach, which is usually to increase the number of measurements and average the results of tens of measurements in order to reduce the effect of errors, increases the testing time and increases the testing cost.
As shown in fig. 3, a field effect transistor G1 to be tested is arranged on the test carrier plate, and two ends of a drain electrode Vin + and a source electrode Vin-of the field effect transistor G1 are connected with an anode-cathode switching network, the anode-cathode switching network is composed of 4 relays, and the 4 relays are divided into two groups, each group is composed of two relays;
the specific measurement method is as follows:
s1: arranging a tested field effect transistor G1 on the test carrier plate;
s2: a drain electrode Vin + and a source electrode Vin-of the field effect transistor G1 to be tested are connected with a positive electrode M + and a negative electrode M-of the differential voltmeter through a positive-negative switching network;
s3: when the positive and negative switching network is in state 1, a first set of measurement data is available: vreading1= Vmeasure+VSE
S4: when the positive and negative switching network is in state 2, a second set of measurement data is available: vreading2= (-Vmeasure)+VSE
S5: subtracting the first set of measurement data and the second set of measurement data by 2 to obtain: (V)reading1- Vreading2)/2=[ (Vmeasure+VSE)-(-Vmeasure)+VSE)]/2=2 Vmeasure/2= VmeasureAnd obtaining the real voltage value of the field effect transistor (G1) to be tested.
As shown in fig. 4, when the positive-negative switching network is in state 1, the drain electrode Vin + of the field-effect transistor G1 to be tested is connected to the positive electrode M + of the differential voltmeter; the source Vin-of the field effect transistor G1 to be tested is connected with the cathode M-of the differential voltmeter.
As shown in fig. 5, when the positive-negative switching network is in state 2, the drain electrode Vin + of the field-effect transistor G1 to be tested is connected to the negative electrode M-of the differential voltmeter; the source Vin-of the field effect transistor G1 to be tested is connected with the anode M + of the differential voltmeter.
VmeasureIs the true voltage value, V, on the on-resistanceSEIs the differential voltmeter system error.
The embodiment of the invention comprises the following steps: vcomThe voltage on the load is common-mode voltage for the measured voltage, and is removed by the floating differential voltmeter without influencing the measurement. The measured on-resistance is 40m omega, and the measured differential voltage is Vreal=RdsON* Iforce=0.04 × 0.1=0.004 (V), as shown in fig. 6.
The test method of the invention is utilized: 1. system error V of floating differential voltmeterSE= 0.5mV (standard from-1.0 mV to +1.0mV after calibration is acceptable), and random error VSEAfter inhibition by the averaging algorithm +/-0.1 mV. When the positive and negative switching network is in state 1, as shown in fig. 7, the voltmeter reading is Vreading1=Vreal+VSE+VRE=0.004+0.0005 ± 0.0001=0.0045 ± 0.0001 (V); 2. when the positive and negative switching networks are in state 2, as shown in FIG. 8, Vreading2=(-Vreal)+VSE+VRE=0.004+0.0005 ± 0.0001= -0.0035 ± 0.0001 (V); 3. subtracting the two readings and averaging to obtain: vmeasure=(Vreading1- Vreading2)/2=0.004±0.0001(V)。
Through simple and twice state measurement and simple and quick operation, the system error of the differential voltmeter can be eliminated, the real voltage value of the tested field effect transistor G1 on the on-resistance is obtained, the influence of the system error in small-signal measurement is greatly reduced, the accuracy of the test is improved, and the expansion capability of the automatic test machine is improved.

Claims (4)

1. A precise measurement method for floating DC small signal voltage comprises a test carrier plate, and is characterized in that: a tested field effect tube (G1) is arranged on the test carrier plate, two ends of a drain electrode (Vin +) and a source electrode (Vin-) of the tested field effect tube (G1) are connected with a positive and negative exchange network, the positive and negative exchange network consists of 4 relays, the 4 relays are divided into two groups, and each group consists of two relays;
the specific measurement method is as follows:
s1: arranging a field effect transistor (G1) to be tested on the test carrier plate;
s2: the drain electrode (Vin +) and the source electrode (Vin-) of the tested field effect transistor (G1) are connected with the anode (M +) and the cathode (M-) of the differential voltmeter through the anode-cathode exchange network;
s3: when the positive and negative switching network is in state 1, a first set of measurement data is available: vreading1= Vmeasure+VSE
S4: when the positive and negative switching network is in state 2, a second set of measurement data is available: vreading2= (-Vmeasure)+VSE
S5: subtracting the first set of measurement data and the second set of measurement data by 2 to obtain: (V)reading1- Vreading2)/2=[ (Vmeasure+VSE)-(-Vmeasure)+VSE)]/2=2 Vmeasure/2= VmeasureAnd obtaining the real voltage value of the field effect transistor (G1) to be tested.
2. The method of claim 1, wherein the method comprises the following steps: when the positive and negative switching network is in the state 1, the drain electrode (Vin +) of the tested field effect transistor (G1) is connected with the positive electrode (M +) of the differential voltmeter; the source (Vin-) of the field effect transistor (G1) to be tested is connected with the negative pole (M-) of the differential voltmeter.
3. The method of claim 1, wherein the method comprises the following steps: when the positive and negative exchange network is in the state 2, the drain electrode (Vin +) of the tested field effect transistor (G1) is connected with the negative electrode (M-) of the differential voltmeter; the source (Vin-) of the tested field effect transistor (G1) is connected with the anode (M +) of the differential voltmeter.
4. The method of claim 1, wherein the method comprises the following steps: the V ismeasureIs the true voltage value, V, on the on-resistanceSEIs the differential voltmeter system error.
CN202110026574.6A 2021-01-08 2021-01-08 Precise measurement method for floating direct current small signal voltage Pending CN112698179A (en)

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CN202110026574.6A CN112698179A (en) 2021-01-08 2021-01-08 Precise measurement method for floating direct current small signal voltage
TW110129685A TWI800891B (en) 2021-01-08 2021-08-11 Precision measurement method for floating dc small signal voltage

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101706534A (en) * 2009-11-30 2010-05-12 江南机器(集团)有限公司 Low resistance admeasuring apparatus
CN101865971A (en) * 2009-04-14 2010-10-20 中芯国际集成电路制造(北京)有限公司 Method and structure for testing semiconductor field effect transistor
WO2014082438A1 (en) * 2012-11-28 2014-06-05 杭州广立微电子有限公司 Addressable test circuit for testing transistor key parameters, and test method thereof
CN104375074A (en) * 2014-11-27 2015-02-25 山东贞明半导体技术有限公司 Test circuit for field-effect transistor
CN105548654A (en) * 2015-12-02 2016-05-04 中国电子科技集团公司第四十一研究所 Circuit and method for weak current detection
CN107345996A (en) * 2017-07-11 2017-11-14 北京华峰测控技术有限公司 FET test circuit and method of testing
CN209513980U (en) * 2018-12-04 2019-10-18 江门市蓬江区金赢科技有限公司 A kind of circuit detecting field-effect tube on state resistance

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101865971A (en) * 2009-04-14 2010-10-20 中芯国际集成电路制造(北京)有限公司 Method and structure for testing semiconductor field effect transistor
CN101706534A (en) * 2009-11-30 2010-05-12 江南机器(集团)有限公司 Low resistance admeasuring apparatus
WO2014082438A1 (en) * 2012-11-28 2014-06-05 杭州广立微电子有限公司 Addressable test circuit for testing transistor key parameters, and test method thereof
CN104375074A (en) * 2014-11-27 2015-02-25 山东贞明半导体技术有限公司 Test circuit for field-effect transistor
CN105548654A (en) * 2015-12-02 2016-05-04 中国电子科技集团公司第四十一研究所 Circuit and method for weak current detection
CN107345996A (en) * 2017-07-11 2017-11-14 北京华峰测控技术有限公司 FET test circuit and method of testing
CN209513980U (en) * 2018-12-04 2019-10-18 江门市蓬江区金赢科技有限公司 A kind of circuit detecting field-effect tube on state resistance

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Application publication date: 20210423