CN112688645B - GaN power amplifier protection circuit - Google Patents
GaN power amplifier protection circuit Download PDFInfo
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- CN112688645B CN112688645B CN201910989155.5A CN201910989155A CN112688645B CN 112688645 B CN112688645 B CN 112688645B CN 201910989155 A CN201910989155 A CN 201910989155A CN 112688645 B CN112688645 B CN 112688645B
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- 230000005669 field effect Effects 0.000 claims abstract description 76
- 238000001514 detection method Methods 0.000 claims abstract description 31
- 229910002601 GaN Inorganic materials 0.000 description 133
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 133
- 238000010586 diagram Methods 0.000 description 12
- 239000004065 semiconductor Substances 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000010295 mobile communication Methods 0.000 description 3
- 230000005856 abnormality Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- FGRBYDKOBBBPOI-UHFFFAOYSA-N 10,10-dioxo-2-[4-(N-phenylanilino)phenyl]thioxanthen-9-one Chemical compound O=C1c2ccccc2S(=O)(=O)c2ccc(cc12)-c1ccc(cc1)N(c1ccccc1)c1ccccc1 FGRBYDKOBBBPOI-UHFFFAOYSA-N 0.000 description 1
- 230000032683 aging Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The application provides a GaN power amplifier protection circuit, which comprises a power supply control circuit, a detection control circuit and a voltage supply circuit. The power supply control circuit comprises a field effect tube and a control module, wherein the control module is connected with the field effect tube to control the on or off of the field effect tube, the drain electrode of the field effect tube is directly or indirectly connected to the power supply voltage input end, and the source electrode of the field effect tube is directly or indirectly connected to the drain electrode of the GaN power amplifier; the detection control circuit comprises a first diode, wherein the cathode of the first diode is connected to the drain electrode of the GaN power amplifier, and the anode of the first diode is directly or indirectly connected to the control module; the voltage supply circuit is connected to one end of the detection control circuit and is used for outputting a first voltage. The GaN power amplifier protection circuit can completely eliminate the problem of GaN hardware burnout when the grid voltage is not loaded correctly.
Description
Technical Field
The application relates to the technical field of circuits, in particular to a GaN power amplifier protection circuit.
Background
The Power Amplifier (PA) is one of the most important sub-modules in the base transceiver station (Base Transceiver Station, BTS) in mobile communication applications. With the large-scale application of fourth-generation (4G) mobile communication and the commercial use of future fifth-generation (5G) mobile communication, more and more high frequency bands (such as 2.7ghz,3.5ghz,4.9ghz, etc.) are being used or will be used, however, at these high frequency bands, the conventional lateral diffusion metal oxide semiconductor (Laterally Diffused Metal Oxide Semiconductor, LDMOS) has many disadvantages such as low efficiency, low power density, etc., and the newly matured GaN (Gallium Nitride) will have more extensive application and competitiveness in the field of power amplifiers.
Unlike the technical characteristics of LDMOS, gaN power amplifiers have strict timing requirements for gate-source voltage (Vgs) and drain-source voltage (Vds) during power up and power down; when the GaN power amplifier is electrified, the grid voltage (negative voltage) of the GaN power amplifier is supplied by the programmable output voltage of the bias circuit, the adjustment of the grid voltage from-10V to 0V can be realized through the programming of software, and after the grid voltage is set as required, the drain voltage (positive voltage, typically 48V (volt)) is opened; when power is lost, the drain voltage needs to be turned off first, and then the gate voltage needs to be turned off. However, when the GaN power amplifier fails to work normally, it will burn out immediately, and the present application finds that the GaN power amplifier will cause the gate voltage to be not loaded correctly in the following situations, so that it fails to work normally: 1) The error of the hardware time sequence control circuit causes that the drain voltage is added to the GaN power amplifier before the grid voltage or the device on the bias circuit can not output voltage, and the GaN power amplifier can be directly burnt; 2) Software control timing errors, which cause programmable output voltage errors, can generate power-on timing errors similar to those in 1), and can cause the GaN power amplifier to burn out; 3) Hardware connection errors, such as poor soldering and product aging, cause poor power supply or disconnection of the gate, cause power-up of the gate, and may produce power-up timing errors like those in 1), causing the GaN power amplifier to burn out.
Disclosure of Invention
In view of the above technical problems in the prior art, an object of the present application is to provide a GaN power amplifier protection circuit that is easy to implement, has low reaction delay, and does not require software control.
According to an aspect of the present application, there is provided a GaN power amplifier protection circuit, wherein the GaN power amplifier protection circuit includes a power supply control circuit, a detection control circuit, and a voltage supply circuit; the power supply control circuit comprises a field effect tube and a control module, wherein the control module is connected with the field effect tube to control the on or off of the field effect tube, the drain electrode of the field effect tube is directly or indirectly connected to the power supply voltage input end, and the source stage of the field effect tube is directly or indirectly connected to the drain electrode of the GaN power amplifier; the detection control circuit comprises a first diode, wherein the cathode of the first diode is connected to the drain electrode of the GaN power amplifier, and the anode of the first diode is directly or indirectly connected to the control module; the voltage supply circuit is connected to one end of the detection control circuit and is used for outputting a first voltage.
In some embodiments, the power supply control circuit further comprises a second diode, the source of the field effect transistor is connected to the anode of the second diode, and the cathode of the second diode is connected to the drain of the GaN power amplifier.
In some embodiments, the control module is a hot plug controller, the Gate of the field effect transistor is directly or indirectly connected to the Gate pin of the hot plug controller, the drain of the field effect transistor is connected to the Sense pin of the hot plug controller, the source of the field effect transistor is connected to the Out pin of the hot plug controller, and the anode of the first diode is directly or indirectly connected to the En pin of the hot plug controller.
In some embodiments, the detection control circuit further comprises a comparator, one input of the comparator is connected to a reference voltage input, the other input of the comparator is indirectly connected to the output of the voltage supply circuit and the anode of the first diode, and the output of the comparator is connected to the control module.
Compared with the prior art, the application has the following advantages: the GaN power amplifier protection circuit utilizes the inherent characteristic that the drain impedance of the GaN power amplifier is zero ohm under the condition that the grid voltage is not loaded correctly, can control the drain voltage of the GaN power amplifier by detecting the drain impedance of the GaN power amplifier, protects the GaN power amplifier by cutting off the drain voltage when the grid voltage is not loaded correctly, and realizes the direct protection of the GaN power amplifier, so that the GaN power amplifier is safe no matter any abnormality occurs in the working process, and can completely eliminate the problem of burning GaN hardware when the grid voltage is not loaded correctly (such as the problem of burning GaN hardware even if the time sequence of Vgs and Vds is wrong); the GaN power amplifier protection circuit is easy to realize, has low reaction delay and does not need software control; the GaN power amplifier can be conveniently applied to various GaN power amplifying circuits, and is suitable for multichannel application, such as multipath design very suitable for 5G Massive MIMO (multiple-input multiple-output) technology.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the detailed description of non-limiting embodiments, made with reference to the following drawings, in which:
FIG. 1 shows a schematic diagram of an exemplary GaN power amplifier protection circuit of the present application;
FIG. 2 is a schematic diagram showing the GaN power amplifier protection circuit of FIG. 1 when the gate voltage of the GaN power amplifier is not properly loaded;
FIG. 3 is a schematic diagram showing the GaN power amplifier protection circuit of FIG. 1 when the gate voltage of the GaN power amplifier is properly loaded;
FIG. 4 shows a schematic diagram of a GaN power amplifier protection circuit of another example of the present application;
FIG. 5 shows a schematic diagram of a GaN power amplifier protection circuit of another example of the present application;
fig. 6 shows a schematic diagram of an exemplary system architecture based on the GaN power amplifier protection circuit of fig. 1.
The same or similar reference numbers in the drawings refer to the same or similar parts.
Detailed Description
The present application is described in further detail below with reference to the accompanying drawings.
The application provides a GaN power amplifier protection circuit, wherein the GaN power amplifier protection circuit comprises a power supply control circuit, a detection control circuit and a voltage supply circuit; the power supply control circuit comprises a field effect tube and a control module, wherein the control module is connected with the field effect tube to control the on (turn on) or the off (cut off) of the field effect tube, the drain electrode of the field effect tube is directly or indirectly connected to the power supply voltage input end, and the source stage of the field effect tube is directly or indirectly connected to the drain electrode of the GaN power amplifier; the detection control circuit comprises a first diode, wherein the cathode of the first diode is connected to the drain electrode of the GaN power amplifier, and the anode of the first diode is directly or indirectly connected to the control module; the voltage supply circuit is connected to one end of the detection control circuit and is used for outputting a first voltage.
The voltage input by the power supply voltage input end is positive voltage (such as 48V) and is used for supplying drain voltage to the GaN power amplifier, and optionally, the power supply voltage input end is PSU (Power Supply Unit, power supply module). It should be noted that, as will be understood by those skilled in the art, any power supply circuit or module capable of outputting a positive voltage according to the design requirements may be used as the power supply voltage input terminal described in the present application.
The control module is configured to control on or off of the field effect transistor, where the field effect transistor may be any type of field effect transistor, such as an N-type MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, metal-Oxide semiconductor field effect transistor) and a P-type MOSFET. For different types of field effect transistors, different control modules can be designed to control the on or off of the field effect transistor, for example, when the field effect transistor adopts an N-type MOSFET, a hot plug controller can be used as the control module to control the on or off of the N-type MOSFET, and when the field effect transistor adopts a P-type MOSFET, a control switch can be designed to be used as the control module to control the on or off of the N-type MOSFET. Any circuit or module that can be used to control the on or off of the field effect transistor to control the drain voltage of the GaN power amplifier should be included within the scope of the control module described herein.
In some embodiments, the drain of the field effect transistor is directly connected to the supply voltage input; in some embodiments, other circuit elements, such as resistors, capacitors, etc., are further included between the drain of the fet and the supply voltage input to improve circuit stability or perform other circuit functions. In some embodiments, the source of the field effect transistor is directly connected to the drain of the GaN power amplifier; in some embodiments, other circuit elements, such as resistors, capacitors, diodes, etc., are also included between the source of the field effect transistor and the drain of the GaN power amplifier to improve circuit stability or perform other circuit functions. It should be noted that, in practical applications, a specific connection structure between the drain electrode of the fet and the supply voltage input terminal, and between the source electrode of the fet and the drain electrode of the GaN power amplifier may be designed based on practical requirements, and similarly, other circuit elements or structures may be included between the drain electrode and the source electrode of the fet, which is not limited herein.
In some embodiments, the anode of the first diode is directly connected to the control module. In some embodiments, the anode of the first diode is connected to the control module through one or more circuit elements (e.g., resistors, comparators, etc.). The first diode is turned on in the forward direction and turned off in the reverse direction, so that voltage loaded on the drain electrode of the GaN power amplifier can be prevented from being reversely fed into the detection control circuit.
The output end of the voltage providing circuit (i.e. the end outputting the first voltage) is connected to the input end of the detection control circuit, and the voltage providing circuit may be any circuit capable of providing the first voltage, for example, the voltage providing circuit is used for converting the second voltage into the first voltage, and for example, the voltage providing circuit is used for directly providing the first voltage, which is not limited in the specific structure of the voltage providing circuit.
Wherein the GaN power amplifier protection circuit controls a drain voltage of the GaN power amplifier by detecting a drain impedance of the GaN power amplifier; when the grid voltage of the GaN power amplifier is not loaded correctly, the drain electrode impedance of the GaN power amplifier is zero, the first diode is conducted, the control module controls the field effect transistor to be cut off, and the drain electrode voltage of the GaN power amplifier is zero; when the grid voltage of the GaN power amplifier is correctly loaded, the drain electrode impedance of the GaN power amplifier is higher, the first diode is cut off, the control module controls the field effect transistor to be conducted, and the GaN power amplifier is correctly loaded with the drain electrode voltage. Specifically, when the gate voltage of the GaN power amplifier is not loaded correctly, it is detected that the drain impedance of the GaN power amplifier is zero, the first diode is turned on, and the voltage at the connection point of the detection control circuit and the control module is lower than the threshold level corresponding to the control module, so that the field effect transistor is turned off, and the drain voltage of the GaN power amplifier is zero; when the grid voltage of the GaN power amplifier is correctly loaded, the drain electrode impedance of the GaN power amplifier is detected to be higher, so that the first diode is cut off, and the voltage at the connection point of the detection control circuit and the control module is higher than the threshold level corresponding to the control module, so that the field effect transistor can be driven to be conducted, and the GaN power amplifier is correctly loaded with the drain electrode voltage, namely, the GaN power amplifier can be provided with the drain electrode voltage (such as 48V voltage) meeting the design. Thus, the drain voltage of the GaN power amplifier can be made zero when the gate voltage of the GaN power amplifier is not properly loaded, and the drain voltage of the GaN power amplifier can be properly loaded when the gate voltage of the GaN power amplifier is properly loaded.
In some embodiments, the power supply control circuit further comprises a second diode, the source of the field effect transistor is connected to the anode of the second diode, and the cathode of the second diode is connected to the drain of the GaN power amplifier. When the grid voltage of the GaN power amplifier is not loaded correctly, the second diode is also in a cut-off state because the field effect transistor is cut off; when the grid voltage of the GaN power amplifier is correctly loaded, the field effect transistor and the second diode are both conducted, the second diode can be used for enhancing circuit stability, and at the moment, the designed drain voltage (such as 48V voltage) can be provided for the GaN power amplifier. Optionally, other circuit elements such as resistors, capacitors, etc. are further included between the second diode and the source stage of the fet, so as to improve circuit stability or implement other circuit functions, and may be designed based on actual requirements.
In some embodiments, the control module is a hot plug controller, the Gate of the field effect transistor is directly or indirectly connected to the Gate pin of the hot plug controller, the drain of the field effect transistor is connected to the Sense pin of the hot plug controller, the source of the field effect transistor is connected to the Out pin of the hot plug controller, and the anode of the first diode is directly or indirectly connected to the En pin of the hot plug controller. The hot plug controller enables the field effect transistor, which in these embodiments is preferably an N-type MOSFET, to maintain a steady voltage differential. The Sense pin is a current limited sampling input end, the Out pin is an output voltage feedback end, the Gate pin is a Gate driver output end, and the En pin is an enable control input end. Optionally, a driving resistor is further included between the Gate of the field effect transistor and the Gate pin of the hot plug controller.
When the input voltage of the En pin is lower than a threshold level, the field effect transistor is cut off; when the input voltage of the En pin is higher than the threshold level, the field effect transistor is conducted. Specifically, when the input voltage of the En pin is higher than the threshold level, the hot plug controller is in a working state (i.e. in an On Work state), the Gate pin is set to be in an effective state, and the field effect transistor is turned On under the drive of the Gate pin; when the input voltage of the En pin is lower than the threshold level, the hot plug controller is closed (namely in an OFF state), and the output voltage of the Gate pin is low, so that the field effect transistor is turned OFF.
In some embodiments, the anode of the first diode is indirectly connected to the control module, the detection control circuit further comprises a comparator, one input terminal of the comparator is connected to a reference voltage input terminal, the other input terminal of the comparator is indirectly connected to the output terminal of the voltage supply circuit and the anode of the first diode, and the output terminal of the comparator is connected to the control module. When the input voltage of the other input end of the comparator is larger than the reference voltage, the output voltage of the output end of the comparator can enable the control module to control the field effect transistor to be conducted; when the input voltage of the other input end of the comparator is lower than the reference voltage, the output voltage of the output end of the comparator can enable the control module to control the field effect transistor to be cut off.
Optionally, the detection control circuit includes a first resistor, a second resistor and a third resistor, the first resistor is connected to the output end of the voltage supply circuit, the second resistor is connected to the positive electrode of the first diode, the first resistor and the second resistor are connected in series to divide voltage, the divided voltage output end is connected to one end of the third resistor, and the other end of the third resistor is connected to the other input end of the comparator.
Optionally, the detection control circuit includes a fourth resistor, one end of which is connected to the other input end of the comparator, and the other end of which is connected to the output end of the voltage supply circuit and the anode of the first diode, respectively.
In some embodiments, the positive electrode of the first diode is directly connected to the control module, and the detection control circuit further includes a fifth resistor, one end of which is connected to the output end of the voltage supply circuit, and one end of which is connected to the positive electrode of the first diode and the control module, respectively.
In some embodiments, the second diode 103 is configured to convert the input second voltage to the first voltage. Optionally, the second voltage is a negative voltage from a negative voltage input terminal, or the second voltage is a positive voltage from the power supply voltage input terminal.
Fig. 1 shows a schematic diagram of a GaN power amplifier protection circuit of one example of the present application. The GaN power amplifier protection circuit comprises a power supply control circuit, a detection control circuit and a voltage supply circuit. The power supply control circuit comprises a hot plug controller 101, a field effect tube 102 and a second diode 103, wherein the grid electrode of the field effect tube 102 is connected to the Gate pin of the hot plug controller 101, the drain electrode of the field effect tube 102 is connected to the Sense pin of the hot plug controller 101 and the power supply voltage input end, and the source stage of the field effect tube 102 is connected to the heat sourceAn Out pin of the plug controller 101 and an anode of the second diode 103, and a cathode of the second diode 103 is connected to a drain electrode of the GaN power amplifier; in this example, the hot plug controller 101 is a positive high voltage power limiting hot plug controller (e.g., TPS 2491), the field effect transistor is an N-type MOSFET (e.g., IPB039N10N 3G), the second diode is an MMBD914, and the power supply voltage input terminal inputs 48V from the PSU. Wherein the voltage supply circuit comprises an operational amplifier (Operational Amplifier, OP) 106, a resistor R 1 And resistance R 2 Wherein R is 1 Is connected to a negative voltage input terminal for inputting a-6V voltage from DC-DC, R 1 And R is 2 In series, R 2 Is connected to the "-" input of the operational amplifier 106 and the other end is connected to the output of the operational amplifier 106, the "+" input of the operational amplifier 106 is grounded, and the voltage supply circuit is used for converting the-6V voltage into a first voltage (i.e., V 1 ) The method comprises the steps of carrying out a first treatment on the surface of the In this example, R 1 Take the value 20k ohm, R 2 The voltage at the "-" input of op amp 106 is 0V, which takes a value of 11 kohm; wherein the detection control circuit comprises a comparator 104, a first diode 105, and a resistor R 3 (corresponding to the first resistor) and resistor R 4 (corresponding to the second resistor) and resistor R 5 (corresponding to the third resistance), R 3 And R is R 4 In series, R 3 Is connected to the output end of the operational amplifier, R 4 Is connected to the anode of a first diode 105, the cathode of which is connected to the drain of the GaN power amplifier, R 5 Is connected to V 2 The point and the other end are connected to the "+" input of the comparator 104, the "-" input of the comparator 104 is connected to the reference voltage input, and the output of the comparator 104 is connected to the En pin of the hot plug controller 101; wherein, when the voltage at the "+" input terminal of the comparator 104 is greater than the reference voltage V REF When the voltage at the output end of the comparator 104 is higher than the threshold level of the En pin, the hot plug controller 101 is turned on (i.e. in an operating state) and drives the FET 102 to conduct, and when the voltage at the "-" input end of the comparator 104 is smaller than the reference voltage V REF At the time, the voltage at the output terminal of the comparator 104 is lowAt the threshold level of the En pin, the hot plug controller 101 is turned off, so that the fet 102 is turned off; in this example, R 3 Take the value of 20k ohm, R 4 Take the value of 10k ohm, R 5 The value is 10 ohms, the reference voltage is 2.7V, and the threshold level of the En pin is 3.3V. In this example, the output voltage of the operational amplifier 106 is denoted as V 1 ，R 3 And R is 4 The voltage at the node of (2) is denoted as V 2 The voltage output to the drain of the GaN power amplifier is denoted as V 3 。
Fig. 2 is a schematic diagram showing a state of the GaN power amplifier protection circuit of fig. 1 when the gate voltage of the GaN power amplifier is not properly loaded. When the gate voltage of the GaN power amplifier is not loaded correctly, the drain impedance of the GaN power amplifier is 0 ohm, namely V based on the inherent characteristic of the GaN power amplifier 3 When=0, the first diode 105 is turned on, V 1 ＝6Vⅹ(R 2 /R 1 ) =3.3v; since the forward voltage drop of the first diode 105 is 0.7v, v 2 ＝0.7V+(3.3V-0.7V)ⅹR 4 /(R 4 +R 3 )＝1.53V<V REF The voltage at the output end of the comparator 104 is negative, the hot plug controller 101 is turned off, and the field effect transistor 102 and the second diode 103 are both turned off, so that the 48V voltage cannot be applied to the drain electrode of the GaN power amplifier, thereby avoiding the GaN power amplifier from being burned.
Fig. 3 is a schematic diagram showing a state of the GaN power amplifier protection circuit of fig. 1 when the gate voltage of the GaN power amplifier is properly loaded. When the grid voltage of the GaN power amplifier is correctly loaded, the drain electrode impedance of the GaN power amplifier is higher, V 2 ≈3.3V>V REF At this time, the voltage at the output end of the comparator 104 is positive and greater than the threshold level of the En pin of the hot plug controller 101, so that the hot plug controller 101 works normally and the output voltage of the Gate pin is high, thereby driving the fet 102 to conduct, and simultaneously the fet 102 is also conducted, so that the 48V voltage is applied to the drain electrode of the GaN power amplifier, due to V 3 ＝48V>3.3V, the first diode 105 is turned off. It should be noted that, since 48V voltage will pass through the fet 102, the Gate pin of the hot plug controller 101The gate output voltage should remain greater than 48v+vgs, where Vgs is normally 0.7.
Fig. 4 shows a schematic diagram of a GaN power amplifier protection circuit of another example of the application. The GaN power amplifier protection circuit comprises a power supply control circuit, a detection control circuit and a voltage supply circuit. The power supply control circuit includes a hot plug controller 201, a field effect transistor 202, and a second diode 203, and the structure of the power supply control circuit in this example is the same as or similar to that of the power supply control circuit in the example shown in fig. 1, and will not be described herein. Wherein the voltage supply circuit comprises an operational amplifier 206, a resistor R 6 And resistance R 7 The output voltage of the voltage supply circuit is V 4 The structure of the voltage supply circuit of this example is the same as or similar to that of the voltage supply circuit of the example shown in fig. 1, and will not be described here again. Wherein the detection control circuit comprises a first diode 204 and a resistor R 8 The positive electrode of the first diode 204 is connected to the En pin of the hot plug controller 201, the negative electrode is connected to the drain electrode of the GaN power amplifier, R 8 One end of the first diode 204 is connected to the output of the operational amplifier 205, and the other end is connected to the positive electrode of the first diode and the En pin of the hot plug controller 201. In this example, the output voltage of the operational amplifier 205 is denoted as V 4 ，R 8 The voltage at the node between the positive electrode of the first diode 204 (i.e., the input voltage of the En pin) is denoted as V 5 The voltage output to the drain of the GaN power amplifier is denoted as V 6 . Wherein when the gate voltage of the GaN power amplifier is not loaded correctly, V 6 =0, the first diode 204 is turned on, V 5 ＝0.7V<The threshold level, the hot plug controller 201 is closed, the field effect transistor 202 and the second diode 203 are cut off, and 48V voltage cannot be applied to the drain electrode of the GaN power amplifier; when the gate voltage of the GaN power amplifier is correctly loaded, V 5 >Threshold level, hot plug controller 201 is operated, field effect transistor 202 and second diode 203 are turned on, 48V voltage is applied to drain of GaN power amplifier, V 6 =48v, the first diode 204 is turned off.
FIG. 5 shows another example of the present applicationA schematic diagram of a GaN power amplifier protection circuit. The GaN power amplifier protection circuit comprises a power supply control circuit, a detection control circuit and a voltage supply circuit. The power supply control circuit includes a hot plug controller 301, a field effect transistor 302, and a second diode 303, and the structure of the power supply control circuit in this example is the same as or similar to that of the power supply control circuit in the example shown in fig. 1, and will not be described herein. Wherein the voltage supply circuit comprises a resistor R 10 And R is 11 ，R 10 And R is 11 In series, one end of R10 is connected to the power supply voltage input end (i.e. the input end of the power supply control circuit), R11 is grounded, and the voltage supply circuit is used for converting 48V voltage into V 7 . Wherein the detection control circuit comprises a comparator 304, a first diode 305 and a resistor R 9 Resistance R 9 One end of the voltage supply circuit is connected to the "+" input end of the comparator 304, and the other end is connected to the positive electrode of the first diode 305 and the output end (i.e., R 10 And R is 11 The junction of (2), the "" input of the comparator 304 is connected to the reference voltage input, V REF For reference voltage, the output of the comparator 304 is connected to the En pin of the hot plug controller 301. In this example, R 10 And R is 11 The voltage at the junction of (2) is denoted as V 7 The positive voltage of the first diode 305 is denoted as V 8 The voltage output to the drain of the GaN power amplifier is denoted as V 9 . Wherein when the gate voltage of the GaN power amplifier is not loaded correctly, V 9 =0, the first diode 305 is turned on, V 8 =0.7v, the "+" input voltage of comparator 304 is less than V REF The voltage at the output end of the comparator 304 is negative (less than the threshold level of the En pin), the hot plug controller 301 is turned off, the field effect transistor 302 and the second diode 303 are turned off, and the 48V voltage cannot be applied to the drain electrode of the GaN power amplifier; when the gate voltage of the GaN power amplifier is properly loaded, the "+" input voltage of comparator 304 is greater than V REF The voltage at the output end of the comparator 304 is higher than the threshold level of the En pin, the hot plug controller 301 works, the field effect transistor 302 and the second diode 303 are conducted, 48V voltage is applied to the drain electrode of the GaN power amplifier, and V 9 =48v, the first diode 305 is turned off.
Fig. 6 shows a schematic diagram of an exemplary system architecture based on the GaN power amplifier protection circuit of fig. 1. The system of this example includes a GaN power amplifier module (GaN PA Block) 300 and a GaN power amplifier protection circuit 400, where the GaN power amplifier protection circuit 400 is the GaN power amplifier protection circuit shown in fig. 1, and will not be described herein. The GaN power amplifier module 300 includes a power amplifier Bias Circuit (PA Bias Circuit), a power amplifier Bias control Circuit (PA Bias Control Circuit), and a power amplifier Circuit (i.e., a Circuit other than the power amplifier Bias Circuit and the power amplifier Bias control Circuit in the GaN power amplifier module 300); the power amplifier circuit comprises a Pre-Driver (Pre-Driver), a Driver (Driver), an Isolator (Isolator), a Coupler (Coupler), a final stage amplifier (final stage) and a Circulator (Circulator); the power amplifier bias circuit is used for providing a grid voltage for the GaN power amplifier (the grid voltage of the GaN power amplifier is negative), and negative voltages generated by a digital-to-analog converter (Digital to Analog Converter, DAC) and an OP in the LMP92066 can drive a higher grid current Igs for the GaN power amplifier when a larger RF signal works; the power amplifier bias control circuit is used for controlling voltage on/off based on the PA_TX_EN signal, so as to control the working state of the GaN power amplifier. In this example, the output of GaN power amplifier protection circuit 400 is connected to the drain of the final amplifier in GaN power amplifier module 300 (i.e., the drain of the GaN power amplifier) to load the GaN power amplifier with the drain voltage, and at the same time, since the drain voltage of the driver is also 48V, the output of GaN power amplifier protection circuit 400 is also connected to the drain of the driver to load the driver with the drain voltage.
It should be noted that, specific values of the elements such as the resistor, the reference voltage, the threshold level, etc. involved in the GaN power amplifier protection circuit may be adjusted or set based on actual design requirements, and the specific values involved in the examples are only examples and are not limiting of the application.
According to the scheme of the application, the GaN power amplifier protection circuit utilizes the inherent characteristic that the drain impedance of the GaN power amplifier is zero ohm under the condition that the gate voltage is not loaded correctly, can control the drain voltage of the GaN power amplifier by detecting the drain impedance of the GaN power amplifier, and protects the GaN power amplifier by cutting off the drain voltage when the gate voltage is not loaded correctly, so that the GaN power amplifier is safe no matter any abnormality occurs in the working process, and the problem of burning GaN hardware when the gate voltage is not loaded correctly (such as the problem of burning GaN hardware even if the time sequence of Vgs and Vds is wrong) can be completely eliminated; the GaN power amplifier protection circuit is easy to realize, has low reaction delay and does not need software control; the GaN power amplifier can be conveniently applied to various GaN power amplifying circuits, and is suitable for multichannel application, such as multichannel design very suitable for 5G Massive MIMO technology.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned. Furthermore, it is evident that the word "comprising" does not exclude other elements or steps, and that the singular does not exclude a plurality. A plurality of units or means recited in the system claims can also be implemented by means of software or hardware by means of one unit or means. The terms first, second, etc. are used to denote a name, but not any particular order.
Claims (11)
1. A GaN power amplifier protection circuit, wherein the GaN power amplifier protection circuit comprises a power supply control circuit, a detection control circuit, and a voltage supply circuit;
the power supply control circuit comprises a field effect tube and a control module, wherein the control module is connected with the field effect tube to control the on or off of the field effect tube, the drain electrode of the field effect tube is directly or indirectly connected to the power supply voltage input end, and the source electrode of the field effect tube is directly or indirectly connected to the drain electrode of the GaN power amplifier;
the detection control circuit comprises a first diode, wherein the cathode of the first diode is connected to the drain electrode of the GaN power amplifier, and the anode of the first diode is directly or indirectly connected to the control module;
the voltage supply circuit is connected to one end of the detection control circuit and is used for outputting a first voltage;
wherein the GaN power amplifier protection circuit controls a drain voltage of the GaN power amplifier by detecting a drain impedance of the GaN power amplifier; when the grid voltage of the GaN power amplifier is not loaded correctly, the drain electrode impedance of the GaN power amplifier is zero, the first diode is conducted, the control module controls the field effect transistor to be cut off, and the drain electrode voltage of the GaN power amplifier is zero; when the grid voltage of the GaN power amplifier is correctly loaded, the drain electrode impedance of the GaN power amplifier is higher, the first diode is cut off, the control module controls the field effect transistor to be conducted, and the GaN power amplifier is correctly loaded with the drain electrode voltage.
2. The GaN power amplifier protection circuit of claim 1, wherein the power supply control circuit further comprises a second diode, a source of the field effect transistor connected to an anode of the second diode, a cathode of the second diode connected to a drain of the GaN power amplifier.
3. The GaN power amplifier protection circuit of claim 1, wherein the control module is a hot plug controller, the Gate of the field effect transistor is directly or indirectly connected to the Gate pin of the hot plug controller, the drain of the field effect transistor is connected to the Sense pin of the hot plug controller, the source of the field effect transistor is connected to the Out pin of the hot plug controller, and the anode of the first diode is directly or indirectly connected to the En pin of the hot plug controller.
4. The GaN power amplifier protection circuit of claim 3 wherein the fet is turned off when the input voltage of the En pin is below a threshold level; when the input voltage of the En pin is higher than the threshold level, the field effect transistor is conducted.
5. The GaN power amplifier protection circuit of any of claims 1 to 4, wherein the anode of the first diode is indirectly connected to the control module, the detection control circuit further comprising a comparator having one input connected to a reference voltage input and the other input indirectly connected to the output of the voltage supply circuit and the anode of the first diode, the output of the comparator being connected to the control module.
6. The GaN power amplifier protection circuit of claim 5, wherein the output voltage of the output of the comparator enables the control module to control the field effect transistor to turn on when the input voltage of the other input of the comparator is greater than a reference voltage; when the input voltage of the other input end of the comparator is lower than the reference voltage, the output voltage of the output end of the comparator can enable the control module to control the field effect transistor to be cut off.
7. The GaN power amplifier protection circuit of claim 5, wherein the detection control circuit comprises a first resistor, a second resistor, and a third resistor, the first resistor is connected to the output terminal of the voltage supply circuit, the second resistor is connected to the positive electrode of the first diode, the first resistor and the second resistor are serially divided and the divided output terminal is connected to one end of the third resistor, and the other end of the third resistor is connected to the other input terminal of the comparator.
8. The GaN power amplifier protection circuit of claim 5, wherein the detection control circuit comprises a fourth resistor having one end connected to the other input of the comparator and the other end connected to the output of the voltage supply circuit and the anode of the first diode, respectively.
9. The GaN power amplifier protection circuit of claim 1, wherein the anode of the first diode is directly connected to the control module, the detection control circuit further comprising a fifth resistor having one end connected to the output of the voltage supply circuit and the other end connected to the anode of the first diode and the control module, respectively.
10. The GaN power amplifier protection circuit of claim 1, wherein the voltage supply circuit is to convert an input second voltage to the first voltage.
11. The GaN power amplifier protection circuit of claim 10 wherein the second voltage is a negative voltage from a negative voltage input or a positive voltage from the supply voltage input.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN205304744U (en) * | 2015-12-30 | 2016-06-08 | 三维通信股份有限公司 | GaN power tube digit grid bias circuit |
| CN108574462A (en) * | 2018-01-31 | 2018-09-25 | 中兴通讯股份有限公司 | Protect circuit, circuit protection method |
| CN109768789A (en) * | 2018-12-28 | 2019-05-17 | 京信通信系统（中国）有限公司 | GaN HEMT Drain control circuit and equipment |
| CN109842384A (en) * | 2017-11-27 | 2019-06-04 | 上海诺基亚贝尔股份有限公司 | Protective device for power amplifier |
| CN209330080U (en) * | 2018-12-28 | 2019-08-30 | 京信通信系统（中国）有限公司 | GaN HEMT protects circuit and equipment |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107306119B (en) * | 2016-04-19 | 2020-10-23 | 上海诺基亚贝尔股份有限公司 | Circuitry and method for gallium nitride (GaN) devices |
-
2019
- 2019-10-17 CN CN201910989155.5A patent/CN112688645B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN205304744U (en) * | 2015-12-30 | 2016-06-08 | 三维通信股份有限公司 | GaN power tube digit grid bias circuit |
| CN109842384A (en) * | 2017-11-27 | 2019-06-04 | 上海诺基亚贝尔股份有限公司 | Protective device for power amplifier |
| CN108574462A (en) * | 2018-01-31 | 2018-09-25 | 中兴通讯股份有限公司 | Protect circuit, circuit protection method |
| CN109768789A (en) * | 2018-12-28 | 2019-05-17 | 京信通信系统（中国）有限公司 | GaN HEMT Drain control circuit and equipment |
| CN209330080U (en) * | 2018-12-28 | 2019-08-30 | 京信通信系统（中国）有限公司 | GaN HEMT protects circuit and equipment |
Non-Patent Citations (1)
| Title |
|---|
| 功率放大器控保电路的研究与设计;王小娟;《电子质量》;第40-43页 * |
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