CN112649725B - MCU chip failure detection alarm circuit - Google Patents
MCU chip failure detection alarm circuit Download PDFInfo
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- CN112649725B CN112649725B CN202011020551.6A CN202011020551A CN112649725B CN 112649725 B CN112649725 B CN 112649725B CN 202011020551 A CN202011020551 A CN 202011020551A CN 112649725 B CN112649725 B CN 112649725B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31704—Design for test; Design verification
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31712—Input or output aspects
- G01R31/31713—Input or output interfaces for test, e.g. test pins, buffers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
- G01R31/318307—Generation of test inputs, e.g. test vectors, patterns or sequences computer-aided, e.g. automatic test program generator [ATPG], program translations, test program debugging
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Abstract
The invention discloses an MCU chip failure detection alarm circuit, which comprises a main board, wherein a main MCU chip group, a standby MCU chip group and a detection alarm unit are arranged on the main board, and the detection alarm unit is respectively connected with the main MCU chip group and the standby MCU chip group; the detection alarm unit comprises a watchdog module, an alarm module, a wireless communication module and a data backup management unit; the working circuit is arranged on the outer side of the main board and is connected with the main MCU chip set on the main board; the main MCU chipset comprises a main control chip U1; in the invention, the watchdog chip is used for monitoring the main MCU chip group, when the watchdog chip cannot receive the signal sent by the main control chip, the main control chip is reset, if the reset is unsuccessful, the main control chip is judged to be in a failure state, the alarm circuit alarms, the detection chip is used for starting the standby MCU chip group pipe working circuit, the data backup management unit is started for data backup, and failure information is transmitted to the main control end through the wireless communication module, so that the maintenance efficiency is improved.
Description
Technical Field
The invention relates to the field of MCU chip failure detection, in particular to an MCU chip failure detection alarm circuit.
Background
The micro control unit (Microcontroller Unit; MCU), also called as single chip microcomputer (Single Chip Microcomputer) or single chip microcomputer, properly reduces the frequency and specification of the CPU (Central Process Unit; CPU), and makes the peripheral failures such as memory (memory), counter (Timer), USB, A/D conversion, UART, PLC, DMA and the like, even the LCD driving circuit are integrated on a single chip to form a chip-level computer for different application occasions to control different combinations. Such as mobile phones, PC periphery, remote controllers, automobile electronics, industrial stepping motors, control of robot arms and the like, the body shadow of the MCU can be seen; the MCU chip is the core of the control system, long-term effective operation of the MCU chip is required to be ensured in order to ensure normal operation of a system circuit, and when the MCU chip fails, feedback is required to be quickly obtained, so the inventor provides an MCU chip failure detection alarm circuit by integrating various factors.
Disclosure of Invention
The invention aims to provide an MCU chip failure detection alarm circuit for solving the problems in the background technology.
In order to achieve the above purpose, the present invention provides the following technical solutions:
the MCU chip failure detection alarm circuit comprises a main board, wherein a main MCU chip group, a standby MCU chip group and a detection alarm unit are arranged on the main board, and the detection alarm unit is respectively connected with the main MCU chip group and the standby MCU chip group; the main MCU chip group consists of a plurality of chips with different functions, and the chip group comprises a main control chip U1; the standby MCU chip set consists of a plurality of chips with different functions, and the chip set comprises a standby main control chip U5; the detection alarm unit comprises a watchdog module, an alarm module, a wireless communication module and a data backup management unit, wherein the alarm module is connected with the main MCU chipset, the watchdog module is respectively connected with the main MCU chipset, the standby MCU chipset and the data backup management unit, and the wireless communication module is connected with the standby MCU chipset; the watchdog module comprises a watchdog chip U2 and a detection chip U3; the working circuit is arranged on the outer side of the main board and is connected with the main MCU chip set on the main board; when the system works, a watchdog module is added, a main MCU chip set is monitored by using the watchdog chip, when the watchdog chip cannot receive signals sent by the main MCU chip set, the main MCU chip set is reset, if the reset is unsuccessful, the main MCU chip set is judged to be in a failure state, an alarm circuit alarms, at the moment, a standby MCU chip set is started by a detection chip in the watchdog module, a working circuit is taken over by the watchdog module, a data backup management unit is started to carry out data backup, and failure information and data are transmitted to a main control end by a wireless communication module;
the system also comprises a local data backup unit, a local data backup unit and a local data backup unit, wherein the local data backup unit is used for backing up the data of the localization MCU chip set;
the cloud data backup unit is used for backing up the cloud data backup of the MCU chip set;
the system comprises a MCU chip group, a data backup management unit and a data backup management unit, wherein the data backup management unit comprises an MCU chip group failure detection module and is used for failure detection of the MCU chip group; the MCU chipset failure risk prediction module is used for evaluating and predicting the failure risk of the MCU chipset according to the failure detection result of the MCU chipset failure detection module; the data backup management module is used for selecting a local data backup unit and/or a cloud data backup unit according to failure risk assessment and prediction results of the MCU chipset;
the cloud data backup unit comprises a cloud data backup module and a communication module, and the cloud data backup module is connected with a cloud server through the communication module in a network mode.
As a further aspect of the invention: the watchdog module is connected with the main control chip U1 through a watchdog chip U2 and is connected with the standby main control chip U5 through a detection chip U3;
the WDO pin of the watchdog chip U2 is connected with the NMI pin of the main control chip U1; the RESET pin of the watchdog chip U2 is connected with the NRSR pin of the main control chip U1; WDI pin of the watchdog chip U2 is connected with PA5 pin of the main control chip U1; the PFO pin of the watchdog chip U2 is connected with the INT pin of the main control chip U1; the PA9 pin of the main control chip U1 is connected with the P3.1/TXD pin of the detection chip U3; the PA10 pin of the main control chip U1 is connected with the P3.2/RXD pin of the detection chip U3; the P2.4 pin of the detection chip U3 is connected with the PA0 pin of the U5, wherein the models of the main control chip U1 and the standby main control chip U5 are STM32F103ZET6, the model of the watchdog chip U2 is MAX705, and the model of the detection chip U3 is AT89C51; the built-in timer of the watchdog chip U2 is 1.6 seconds, when the duration of the high or low level of the WDI pin exceeds 1.6 seconds, the watchdog timer overflows, so that the WDO pin outputs a low level, the watchdog timer is known to be RESET, when the WDI pin is blocked up or has a rising edge or a falling edge on the WDI, the watchdog timer is RESET, the RESET is an efficient RESET output end, and a RESET signal output by the RESET output end is used for starting or restarting the main MCU chip set, the main MCU chip set enters or returns to a predicted circulation program and is sequentially executed, and once the MCU is in an unknown state, the system is RESET.
As still further aspects of the invention: the alarm module is connected with the main control chip U1 through an alarm circuit, the alarm circuit comprises a resistor R3, a triode Q1 and an LED lamp D1, and one end of the resistor R3 is connected with a PA6 pin of the U1; the other end of the resistor R3 is connected with the base electrode of the triode Q1; the emitter of the triode Q1 is grounded; the collector electrode of the triode Q1 is connected with the negative electrode of the LED lamp D1; the anode of the LED lamp D1 is connected with a power supply; when the system judges that the main MCU chipset fails, the PA6 pin of the U1 generates a high level, so that the alarm circuit is conducted, and the LED lamp is turned on.
As still further aspects of the invention: the data backup management unit is connected with the watchdog module through a data backup circuit, the data backup circuit comprises a memory chip U4, a resistor R1 and a resistor R2, and one end of the resistor R1 is connected with a P2.1 pin of U3 and an SDA pin of U4; the other end of the resistor R1 is connected with one end of the resistor R2 and the VCC pin of the U4 is connected with a power supply in parallel; the other end of the resistor R2 is connected with the P2.0 pin of the U3 and the SCL pin of the U4; the VSS pin of U4 is connected with the A0 pin of U4, the A1 pin of U4, the A2 pin of U4 and the WP pin of U4 and is grounded; the SDA pin of U4 is connected with the P2.1 pin of U3; the SCL pin of U4 is connected with the P2.0 pin of U3, wherein the model of U4 is AT24C02; the AT24C02 chip is a ROM, is a read-only memory, can continuously store data when power is lost, can be erased and rewritten under the action of higher than common voltage, the SDA pin is a serial data input/output port, is a pin with a bidirectional open drain structure, the SCL is a serial shift clock control end, and the AT24C02 chip has two-wire serial failure, a bidirectional data transmission protocol, an 8-byte page write mode, high reliability and long data retention time.
As still further aspects of the invention: the wireless communication module comprises a WIFI chip U6, wherein the RXD pin of the chip U6 is connected with the PA9 pin of the U5; the TXD pin of the chip U6 is connected with the PA10 pin of the U5; VCC pin power supply of the chip U6; GND pin of the chip U6 is grounded, wherein the model of U6 is SKW93A; when the failure of the main MCU chipset is judged, the standby MCU chipset is started to take over the circuit, and meanwhile, failure information and data of the main MCU chipset are transmitted to the main control end through the wireless communication module.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention provides a MCU chip failure detection alarm circuit, the structural setting is ingenious and the arrangement is reasonable, in the invention, the watchdog chip is used for monitoring the main control chip, when the watchdog chip can not receive the signal sent by the main control chip, the main control chip is reset, if the reset is unsuccessful, the main control chip is judged to be in a failure state, the alarm circuit alarms, at the moment, the standby MCU chip group is started through the detection chip in the watchdog module, the working circuit is taken over through the watchdog module, the data backup management unit is started for data backup, and failure information and data are transmitted to the main control terminal through the wireless communication module;
2. the invention further designs a watchdog module, which comprises a watchdog chip U2 and a detection chip U3, wherein the watchdog chip is used for monitoring a main control chip, when the watchdog chip cannot receive signals sent by a main MCU chip group, the main control chip is reset, if the reset is unsuccessful, the main control chip is judged to be in a failure state, a standby MCU chip group is awakened, a working circuit is taken over by the watchdog module, and the normal operation of the circuit is continuously supported;
3. the invention further designs a data backup management unit, which is used for storing data, and when the main MCU chip set is in a failure state, the data backup is carried out, so that the data is prevented from being lost, and the data safety is ensured;
4. the invention further designs a wireless communication module, wherein the wireless communication module is used for carrying out information transmission with the main control end, when the main MCU chip set is in a failure state, failure information and data are transmitted to the main control end through the wireless communication module, and abnormality is reported in time, so that the maintenance efficiency is improved.
Drawings
FIG. 1 is a block diagram of a MCU chip failure detection alarm circuit;
FIG. 2 is a system block diagram of a data backup management system in an MCU chip failure detection alarm circuit;
FIG. 3 is a block diagram of a data backup management unit in an MCU chip failure detection alarm circuit;
FIG. 4 is a block diagram of a cloud end data backup unit in an MCU chip failure detection alarm circuit;
fig. 5 is a circuit diagram of an MCU chip failure detection alarm circuit.
In the figure: 100. a main board; 200. an alarm module; 300. a data backup management unit; 400. a wireless communication module; 500. a master MCU chipset; 600. a watchdog module; 700. standby MCU chip sets; 800. and an operating circuit.
Detailed Description
The technical scheme of the patent is further described in detail below with reference to the specific embodiments.
Referring to fig. 1-5, an MCU chip failure detection alarm circuit includes a main board 100, a main MCU chipset 500, a standby MCU chipset 700, and a detection alarm unit mounted on the main board 100, where the detection alarm unit is connected to the main MCU chipset 500 and the standby MCU chipset 700 respectively; the main MCU chip set 500 consists of a plurality of chips with different functions, and the chip set comprises a main control chip U1; the standby MCU chipset 700 is composed of a plurality of chips with different functions, and the standby main control chip U5 is included in the chipset; the detection alarm unit comprises a watchdog module 600, an alarm module 200, a wireless communication module 400 and a data backup management unit 300, wherein the alarm module 200 is connected with the main MCU chipset 500, the watchdog module 600 is respectively connected with the main MCU chipset 500, the standby MCU chipset 700 and the data backup management unit 300, and the wireless communication module 400 is connected with the standby MCU chipset 700; the watchdog module 600 comprises a watchdog chip U2 and a detection chip U3; a working circuit 800 is arranged on the outer side of the main board 100, and the working circuit 800 is connected with the main MCU chip set 500 on the main board 100; the watchdog module 600 is added to monitor the main MCU chip set 500 by using the watchdog chip, when the watchdog chip cannot receive signals sent by the main MCU chip set 500, the main MCU is reset, if the reset is unsuccessful, the main MCU chip set 500 is judged to be in a failure state, the alarm circuit alarms, at the moment, the standby MCU chip set 700 is started by the detection chip in the watchdog module 600, the working circuit 800 is taken over by the watchdog module 600, the data backup management unit 300 is started to perform data backup, and failure information and data are transmitted to the main control end by the wireless communication module 400;
the system further comprises a local data backup unit 301, configured to localize data backup of the MCU chipset;
the cloud data backup unit 302 is used for backing up the cloud data backup of the MCU chipset;
the system further comprises a data backup management unit 300, wherein the data backup management unit 300 comprises an MCU chipset failure detection module 3001 for failure detection of the MCU chipset; the MCU chipset failure risk prediction module 3002 is configured to evaluate and predict a failure risk of the MCU chipset according to a failure detection result of the MCU chipset failure detection module; the data backup management module 3003 is configured to select the local data backup unit 301 and/or the cloud data backup unit 302 according to failure risk assessment and prediction results of the MCU chipset;
the cloud data backup unit 302 includes a cloud data backup module 3021 and a communication module 3022, where the cloud data backup module 3021 is connected to a cloud server through the communication module 3022.
The watchdog module 600 is connected with the main control chip U1 through a watchdog chip U2, and is connected with the standby main control chip U5 through a detection chip U3, and WDO pins of the watchdog chip U2 are connected with NMI pins of the main control chip U1; the RESET pin of the watchdog chip U2 is connected with the NRSR pin of the main control chip U1; WDI pin of the watchdog chip U2 is connected with PA5 pin of the main control chip U1; the PFO pin of the watchdog chip U2 is connected with the INT pin of the main control chip U1; the PA9 pin of the main control chip U1 is connected with the P3.1/TXD pin of the detection chip U3; the PA10 pin of the main control chip U1 is connected with the P3.2/RXD pin of the detection chip U3; the P2.4 pin of the detection chip U3 is connected with the PA0 pin of the U5, wherein the models of the main control chip U1 and the standby main control chip U5 are STM32F103ZET6, the model of the watchdog chip U2 is MAX705, and the model of the detection chip U3 is AT89C51; the built-in timer of the watchdog chip U2 is 1.6 seconds, when the duration of the high or low level of the WDI pin exceeds 1.6 seconds, the watchdog timer overflows to enable the WDO pin to output a low level, the watchdog timer is known to be RESET, when the WDI pin is blocked up or has a rising edge or a falling edge on the WDI, the watchdog timer is RESET, the RESET is an efficient RESET output end, and a RESET signal output by the RESET output end is used for starting or restarting the main MCU chip set 500, so that the main MCU chip set 500 enters or returns to a predicted circulation program and is sequentially executed, and once the MCU is in an unknown state, the system is RESET;
the alarm module 200 is connected with the main control chip U1 through an alarm circuit, the alarm circuit comprises a resistor R3, a triode Q1 and an LED lamp D1, and one end of the resistor R3 is connected with a PA6 pin of the U1; the other end of the resistor R3 is connected with the base electrode of the triode Q1; the emitter of the triode Q1 is grounded; the collector electrode of the triode Q1 is connected with the negative electrode of the LED lamp D1; the anode of the LED lamp D1 is connected with a power supply; when the system judges that the main MCU chip set 500 fails, the PA6 pin of the U1 generates a high level, so that an alarm circuit is conducted, and an LED lamp is turned on;
the data backup management unit 300 is connected with a detection chip U3 in the watchdog module 600 through a data backup circuit, the data backup circuit includes a storage chip U4, a resistor R1 and a resistor R2, and one end of the resistor R1 is connected with a P2.1 pin of the U3 and an SDA pin of the U4; the other end of the resistor R1 is connected with one end of the resistor R2 and the VCC pin of the U4 is connected with a power supply in parallel; the other end of the resistor R2 is connected with the P2.0 pin of the U3 and the SCL pin of the U4; the VSS pin of U4 is connected with the A0 pin of U4, the A1 pin of U4, the A2 pin of U4 and the WP pin of U4 and is grounded; the SDA pin of U4 is connected with the P2.1 pin of U3; the SCL pin of U4 is connected with the P2.0 pin of U3, wherein the model of U4 is AT24C02; the AT24C02 chip is a ROM, is a read-only memory, can continuously store data when power is lost, can be erased and rewritten under the action of higher than common voltage, the SDA pin is a serial data input/output port, is a pin with a bidirectional open drain structure, the SCL is a serial shift clock control end, and the AT24C02 chip has two-wire serial failure, a bidirectional data transmission protocol, an 8-byte page write mode, high reliability and long data retention time;
the wireless communication module 400 comprises a WIFI chip U6, wherein the RXD pin of the chip U6 is connected with the PA9 pin of the U5; the TXD pin of the chip U6 is connected with the PA10 pin of the U5; VCC pin power supply of the chip U6; GND pin of the chip U6 is grounded, wherein the model of U6 is SKW93A; when the main MCU chipset 500 is determined to be failed, the standby MCU chipset 700 is started to take over the circuit, and at the same time, failure information and data of the main MCU chipset 500 are transmitted to the main control terminal through the wireless communication module 400.
The working principle of the invention is as follows: the watchdog module is added, the main control chip is monitored by using the watchdog chip, when the watchdog chip cannot receive signals sent by the main control chip, the main control chip is reset, if the reset is unsuccessful, the main control chip is judged to be in a failure state, the alarm circuit alarms, at the moment, the standby MCU chip group is started through the detection chip in the watchdog module, the working circuit is taken over through the watchdog module, the data backup management unit is started to carry out data backup, data loss is prevented, the data safety is ensured, the wireless communication module is used for carrying out information transmission with the main control end, when the main MCU chip group is in the failure state, the failure information and the data are transmitted to the main control end through the wireless communication module, the abnormality is reported in time, and the maintenance efficiency is improved.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art in a specific case.
While the preferred embodiments of the present patent have been described in detail, the present patent is not limited to the above embodiments, and various changes may be made without departing from the spirit of the present patent within the knowledge of one of ordinary skill in the art.
Claims (5)
1. The MCU chip failure detection alarm circuit comprises a main board (100), and is characterized in that a main MCU chip set (500), a standby MCU chip set (700) and a detection alarm unit are installed on the main board (100), and the detection alarm unit is respectively connected with the main MCU chip set (500) and the standby MCU chip set (700); the main MCU chip set (500) consists of a plurality of chips with different functions, and the chip set comprises a main control chip U1; the standby MCU chip set (700) consists of a plurality of chips with different functions, and the chip set comprises a standby main control chip U5;
the detection alarm unit comprises a watchdog module (600), an alarm module (200), a wireless communication module (400) and a data backup management unit (300), wherein the alarm module (200) is connected with a main MCU chip set (500), the watchdog module (600) is respectively connected with the main MCU chip set (500), a standby MCU chip set (700) and the data backup management unit (300), and the wireless communication module (400) is connected with the standby MCU chip set (700);
the watchdog module (600) comprises a watchdog chip U2 and a detection chip U3; the watchdog module (600) is connected with the main control chip U1 through a watchdog chip U2 and is connected with the standby main control chip U5 through a detection chip U3;
the WDO pin of the watchdog chip U2 is connected with the NMI pin of the main control chip U1; the RESET pin of the watchdog chip U2 is connected with the NRSR pin of the main control chip U1; WDI pin of the watchdog chip U2 is connected with PA5 pin of the main control chip U1; the PFO pin of the watchdog chip U2 is connected with the INT pin of the main control chip U1; the PA9 pin of the main control chip U1 is connected with the P3.1/TXD pin of the detection chip U3; the PA10 pin of the main control chip U1 is connected with the P3.2/RXD pin of the detection chip U3; the P2.4 pin of the detection chip U3 is connected with the PA0 pin of the U5, wherein the models of the main control chip U1 and the standby main control chip U5 are STM32F103ZET6, the model of the watchdog chip U2 is MAX705, and the model of the detection chip U3 is AT89C51;
the watchdog chip U2 monitors the main control chip U1, when the watchdog chip U2 cannot receive signals sent by the main control chip U1, the main control chip U1 is reset, if the reset is unsuccessful, the main control chip U1 is judged to be in a failure state, an alarm circuit alarms, at the moment, a standby MCU chip set (700) is started through a detection chip U3 in a watchdog module (600), and a working circuit is taken over through the watchdog module (600).
2. The MCU chip failure detection alarm circuit according to claim 1, wherein the alarm module (200) is connected with the main control chip U1 through an alarm circuit, the alarm circuit comprises a resistor R3, a triode Q1 and an LED lamp D1, and one end of the resistor R3 is connected with a PA6 pin of the U1; the other end of the resistor R3 is connected with the base electrode of the triode Q1; the emitter of the triode Q1 is grounded; the collector electrode of the triode Q1 is connected with the negative electrode of the LED lamp D1; the anode of the LED lamp D1 is connected with a power supply.
3. The MCU chip failure detection alarm circuit of claim 1, wherein the data backup management unit (300) is connected to the watchdog module (600) through a data backup circuit, the data backup circuit includes a memory chip U4, a resistor R1 and a resistor R2, and one end of the resistor R1 is connected to a P2.1 pin of U3 and an SDA pin of U4; the other end of the resistor R1 is connected with one end of the resistor R2 and the VCC pin of the U4 is connected with a power supply in parallel; the other end of the resistor R2 is connected with the P2.0 pin of the U3 and the SCL pin of the U4; the VSS pin of U4 is connected with the A0 pin of U4, the A1 pin of U4, the A2 pin of U4 and the WP pin of U4 and is grounded; the SDA pin of U4 is connected with the P2.1 pin of U3; the SCL pin of U4 is connected with the P2.0 pin of U3, wherein the model of U4 is AT24C02.
4. The MCU chip failure detection alarm circuit of claim 1, wherein the wireless communication module (400) comprises a WIFI chip U6, the RXD pin of the chip U6 being connected to the PA9 pin of the U5; the TXD pin of the chip U6 is connected with the PA10 pin of the U5; VCC pin power supply of the chip U6; the GND pin of the chip U6 is grounded, wherein the model of U6 is SKW93A.
5. The MCU chip failure detection alarm circuit of claim 1, wherein a working circuit (800) is further provided on the outside of the motherboard (100), and the working circuit (800) is connected to a main MCU chip set (500) on the motherboard (100).
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