CN112649661A - Current detection circuit based on Hall sensor - Google Patents
Current detection circuit based on Hall sensor Download PDFInfo
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- CN112649661A CN112649661A CN202011631365.6A CN202011631365A CN112649661A CN 112649661 A CN112649661 A CN 112649661A CN 202011631365 A CN202011631365 A CN 202011631365A CN 112649661 A CN112649661 A CN 112649661A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
- G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
- G01R15/20—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices
- G01R15/202—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices using Hall-effect devices
Abstract
The invention discloses a current detection circuit based on a Hall sensor, which relates to the technical field of current detection and comprises a current sensor sign removing circuit, an upper limit voltage generating circuit, a return difference analog-to-digital conversion circuit and a relay control circuit, wherein the input end of the current sensor sign removing circuit is connected with a current transformer, and the output end of the current sensor sign removing circuit is connected with the return difference analog-to-digital conversion circuit and is used for collecting current of the current transformer and outputting a negative value of an absolute value of potential; the input end of the upper limit voltage generating circuit is connected with the input voltage, and the output end of the upper limit voltage generating circuit is connected with the return difference analog-to-digital conversion circuit and used for generating an upper limit voltage; the output end of the return difference analog-to-digital conversion circuit is connected with the relay control circuit and used for generating lower limit voltage, comparing the potential absolute value with the lower limit voltage and the upper limit voltage respectively and outputting digital quantity for controlling the opening and closing of the relay; the relay control circuit is used for outputting an alarm signal to the outside. The detection circuit can adapt to the characteristic that the characteristic of the detected current is variable, and sends out an alarm signal when the power module is over-current, so that the damage to a device is avoided.
Description
Technical Field
The invention relates to the technical field of current detection, in particular to a current detection circuit based on a Hall sensor.
Background
The IGBT power module is a power module formed of insulated gate bipolar transistors, and is widely used in the field of medium voltage driving because of its characteristics such as simple driving and high switching frequency. The turn-on loss of the IGBT is very small when the IGBT works normally, but when the application module is subjected to overcurrent, the transistor of the IGBT leaves a safe working area, larger instantaneous power can be generated, and the IGBT needs to be turned off in time. However, the IGBT is often subject to a change in electrical characteristics and is prone to overcurrent in the application environment such as a converter. In order to avoid the damage of the device caused by the short circuit, overcurrent and other extreme conditions, on one hand, overcurrent protection needs to be added, and on the other hand, current information needs to be fed back to a control end, namely, a current detection circuit is added.
There are many implementation schemes for current detection, and appropriate selection is required according to application environment and requirements. The current of an IGBT circuit used for medium-voltage driving is hundreds of amperes, and the current detection circuit needs to be isolated on the basis of safety consideration, and meanwhile, the current detection circuit also needs to consider that the current characteristics of a current transformer are changed all the time, and the final output result needs to be stable.
The method is characterized in that a small resistor string is selected to be arranged in a tested loop, and loop current is calculated by measuring voltages at two ends of a resistor; alternatively, a transformer can be used to obtain a voltage with the same waveform, and the current parameter in the main circuit can be calculated by measuring the voltage. For the IGBT power module in the converter measured in the embodiment, the two methods have the defects that the resistance selection is very small when the current is large, the selection is not easy, the heating and precision problems exist, and the magnetic saturation and waveform distortion need to be considered when the IGBT power module is designed, so that the IGBT power module is not very concise.
Disclosure of Invention
The invention provides a current detection circuit based on a Hall sensor aiming at the problems and the technical requirements, and designs the current detection circuit on the basis of collecting current by using the Hall sensor, which can adapt to the characteristic of variable sampled current characteristics, and can timely send out a reliable alarm signal when an IGBT power module is in overcurrent, thereby avoiding damaging devices. The technical scheme of the invention is as follows:
the current detection circuit based on the Hall sensor comprises a current sensor sign removing circuit, an upper limit voltage generating circuit, a return difference analog-to-digital conversion circuit and a relay control circuit, wherein the input end of the current sensor sign removing circuit is used as the input end of the current detection circuit and is connected with a current transformer of an IGBT (insulated gate bipolar transistor) power module, the output end of the current sensor sign removing circuit is connected with the first input end of the return difference analog-to-digital conversion circuit, the current sensor sign removing circuit is used for collecting the measured current of the current transformer and outputting a negative value of an absolute value of potential, and the potential; the input end of the upper limit voltage generating circuit is connected with the input voltage, the output end of the upper limit voltage generating circuit is connected with the second input end of the return difference analog-to-digital conversion circuit, the upper limit voltage generating circuit is used for generating upper limit voltage, and the upper limit voltage is positive voltage; the output end of the return difference analog-to-digital conversion circuit is connected with the input end of the relay control circuit, the return difference analog-to-digital conversion circuit is used for generating lower limit voltage, comparing the potential absolute value with the lower limit voltage and the upper limit voltage respectively, judging the voltage range of the potential absolute value and outputting digital quantity for controlling the opening and closing of a relay in the relay control circuit; the output end of the relay control circuit is used as the output end of the current detection circuit to be connected with external equipment and used for outputting alarm signals to the outside.
The further technical scheme is that the current sensor sign removing circuit comprises a current sensor, three operational amplifiers, a first NOT gate, a first switch and a second switch, wherein the input end of the current sensor is used as the input end of the current sensor sign removing circuit to be connected with a current transformer, the current to be detected is input, the output end of the current sensor is connected with the inverting input end of a first operational amplifier through a third resistor, the output end of the current sensor outputs a potential in direct proportion to the current to be detected, the inverting input end of the first operational amplifier is also connected with the output end of the first operational amplifier through a fourth resistor, the non-inverting input end of the first operational amplifier is connected with the common end of a first resistor and a second resistor which are connected in series, the other end of the first resistor is connected with the positive pole of a power supply, the other end of the second resistor is connected with the negative pole of the power supply, the output end of the first operational amplifier is connected with the inverting input end of the second operational amplifier through a fifth resistor, the in-phase input end of the second operational amplifier is grounded through a seventh resistor, the output end of the first operational amplifier is further connected with the in-phase input end of the third operational amplifier through an eighth resistor, the in-phase input end of the third operational amplifier is further connected with the output end of the third operational amplifier through a ninth resistor, the anti-phase input end of the third operational amplifier is grounded through a tenth resistor, the output end of the first operational amplifier is further connected with the first selection end of the second switch, the output end of the second operational amplifier is connected with the first selection end of the first switch, the output end of the third operational amplifier is connected with the second selection end of the first switch, the output end of the third operational amplifier is further connected with the second selection end of the second switch through a first NOT gate, and the common end of the first switch and the common end of the second switch are used as the output end of the current sensor sign removing circuit and connected with the first input end of the return difference analog-to-.
The further technical scheme is that the first resistor and the second resistor have voltage values close to but not zero, the resistance value of the third resistor is equal to the resistance value of the fourth resistor, the amplification factor of the first operational amplifier is-1, and the first operational amplifier outputs negative potential; the second operational amplifier and the third operational amplifier are in reverse phase, the resistance value of the fifth resistor is equal to that of the sixth resistor, the resistance value of the eighth resistor is equal to that of the ninth resistor, the second operational amplifier outputs potential, and the third operational amplifier outputs negative potential; when the potential is larger than zero, the first switch outputs negative potential, the second switch is switched off, when the potential is smaller than zero, the second switch outputs potential, the first switch is switched off, and the output end of the current sensor sign removing circuit outputs a negative value of the absolute value of the potential.
According to a further technical scheme, the upper limit voltage generating circuit comprises a voltage regulator tube, a twenty-third resistor and a twenty-fourth resistor, wherein a first end of the twenty-third resistor is used as an input end of the upper limit voltage generating circuit to be connected with input voltage, a second end of the twenty-third resistor is respectively connected with a cathode of the voltage regulator tube and a first end of the twenty-fourth resistor, an anode of the voltage regulator tube and a second end of the twenty-fourth resistor are both grounded, and a common end of the twenty-third resistor and the twenty-fourth resistor is used as an output end of the upper limit voltage generating circuit to be connected with a second input end of the return difference analog-to-digital conversion circuit and output the upper limit voltage.
The further technical scheme is that the return difference analog-to-digital conversion circuit comprises a fourth operational amplifier, two voltage comparators and three NAND gates, wherein the inverting input end of the fourth operational amplifier is used as the second input end of the return difference analog-to-digital conversion circuit and is connected with the upper limit voltage through a twelfth resistor, the non-inverting input end of the fourth operational amplifier is grounded through an eleventh resistor, the non-inverting input end of the fourth operational amplifier is also connected with the output end of the fourth operational amplifier through a thirteenth resistor, the output end of the fourth operational amplifier is connected with the non-inverting input end of the first voltage comparator, the output end of the fourth operational amplifier is also connected with the non-inverting input end of the second voltage comparator through a fourteenth resistor, the non-inverting input end of the second voltage comparator is also grounded through a fifteenth resistor, the inverting input end of the first voltage comparator is connected with the inverting input end of the second voltage comparator, and the connected end is used as the first input end of the return difference analog-to-digital, the output end of the first voltage comparator is connected with the first input end of the first NAND gate through a seventeenth resistor, the output end of the second voltage comparator is connected with the second input end of the first NAND gate and the second input end of the second NAND gate through an eighteenth resistor, the output ends of the first NAND gate and the second NAND gate are connected with the two input ends of the third NAND gate respectively, the output end of the third NAND gate is used as the output end of the return difference analog-to-digital conversion circuit to be connected with the input end of the relay control circuit, and the digital quantity for controlling the opening and closing of the relay is output, and the first input end of the second NAND gate is connected with the digital.
The further technical scheme is that the resistance value of the eleventh resistor is equal to the resistance value of the thirteenth resistor, the amplification multiple of the fourth operational amplifier is-1, the fourth operational amplifier outputs negative upper limit voltage, and the voltage value of the lower limit voltage is 0.93 times of the upper limit voltage; the first voltage comparator is used for comparing the potential absolute value with the upper limit voltage, and the second voltage comparator is used for comparing the potential absolute value with the lower limit voltage; when the converter is in overcurrent and the absolute value of the potential is greater than the upper limit voltage, the first voltage comparator and the second voltage comparator both output high levels, and the third NAND gate outputs high levels; when the converter is close to overcurrent and the absolute value of the potential is greater than the lower limit voltage and less than or equal to the upper limit voltage, a buffer area is formed between the upper limit voltage and the lower limit voltage, the first voltage comparator outputs low level, the second voltage comparator outputs high level, and the third NAND gate keeps the last output state; when the current of the converter is normal and the absolute value of the potential is less than or equal to the lower limit voltage, the first voltage comparator and the second voltage comparator both output low levels, and the third NAND gate outputs low levels.
The relay control circuit comprises three NOT gates, a capacitor, a plurality of resistors, a diode, a trigger, an AND gate, an MOS (metal oxide semiconductor) tube and a relay, and other devices except the relay form a driving circuit; the first end of a nineteenth resistor is used as the input end of a relay control circuit to be connected with a digital quantity, the second end of the nineteenth resistor is connected with the reset end of a trigger after passing through a second NOT gate, a capacitor, the first end of a twentieth resistor, a diode anode and a third NOT gate in sequence, the second end of the twentieth resistor and a diode cathode are both connected with the positive electrode of a power supply, the second end of the nineteenth resistor is also connected with the input end of the trigger, the reverse output end and the digital quantity of the trigger are respectively connected with two input ends of an AND gate, the output end of the AND gate is grounded after passing through a twenty-first resistor and a twenty-second resistor which are connected in series, the output end of the AND gate is also connected with the clock end of the trigger through a fourth NOT gate, the grid of an MOS tube is connected with the common end of the twenty-first, the switch of the relay is used as the output end of the relay control circuit to be connected with external equipment;
when the converter is in overcurrent and the absolute value of the potential is greater than the upper limit voltage, the digital quantity is changed from a low level to a high level, the reset end of the trigger resets due to the fact that the capacitor is charged and discharged with a short high level, and the high level holding time of the reset end is determined according to the capacitance value; the reverse output end of the reset trigger outputs high level, if the digital quantity is still high level, the AND gate outputs high level, the MOS tube is conducted, the relay coil is electrified, and the switch is closed to output an alarm signal; and otherwise, when the digital quantity is changed from high level to low level, the AND gate outputs low level, the MOS tube is disconnected, and the relay switch is disconnected.
The further technical scheme is that the current sensor is realized based on a Hall sensor of CSLA2DG type, and the precision is +/-0.02%/DEG C.
The beneficial technical effects of the invention are as follows:
the method for measuring the current of the power supply uses the Hall sensor as a current collection mode, realizes non-contact measurement of the current, does not bring safety problems compared with a measuring method that a sensitive element is connected in series in a loop, and does not introduce the problem of power consumption when the measured current is large. The response time of the Hall device is in the level of mu s, the precision is higher than that of a mutual inductor with the same function, and the problem of magnetic saturation is avoided when the current transformer is measured; the non-inverting input end of the first operational amplifier is close to but not zero, so that the situation that when the measured current is zero, unstable voltage output by the first operational amplifier is transferred step by step to influence the precision of a later-stage circuit can be avoided; in the return difference analog-to-digital conversion circuit, a buffer area is formed in a current judging part through a logic circuit consisting of two voltage comparators and three NAND gates, namely a return difference module, so that frequent alarming caused by current fluctuation of a current detection circuit due to a current transformer is avoided, only when the detected current rises and exceeds the upper limit voltage, the relay outputs an alarm signal, and when the detected current is reduced to the lower limit voltage, the alarming is relieved, so that the accuracy of the current detection circuit and the stability of the whole circuit module are improved.
Drawings
Fig. 1 is a flow chart of a current detection circuit provided in the present application.
Fig. 2 is a circuit diagram of a current sensor de-sign circuit provided herein.
Fig. 3 is a circuit diagram of an upper limit voltage generating circuit provided in the present application.
Fig. 4 is a circuit diagram of a return difference analog-to-digital conversion circuit provided in the present application.
Fig. 5 is a circuit diagram of a relay control circuit provided in the present application.
Fig. 6 is a logic flow diagram of analog-to-digital conversion of the return difference analog-to-digital conversion circuit provided in the present application.
Fig. 7 is a return difference judgment logic diagram of the return difference analog-to-digital conversion circuit provided by the present application.
Detailed Description
The following further describes the embodiments of the present invention with reference to the drawings.
Referring to fig. 1-5, the current detection circuit based on the hall sensor includes a current sensor sign removing circuit, an upper limit voltage generating circuit, a return difference analog-to-digital conversion circuit, and a relay control circuit.
The input end of the current sensor sign removing circuit is used as the input end of the current detection circuit and is connected with the current transformer of the IGBT power module, the output end of the current sensor sign removing circuit is connected with the first input end of the return difference analog-to-digital conversion circuit, the current sensor sign removing circuit is used for collecting the current to be detected of the current transformer and outputting a negative value- | VH |, wherein the potential is in direct proportion to the current to be detected, and the potential is directly proportional to the current to.
Specifically, as shown in fig. 2, the current sensor U0 sign removal circuit includes a current sensor U0, three operational amplifiers, a first not gate Q1, a first switch K0, and a second switch K1, where the current sensor U0 is implemented based on a hall sensor of a CSLA2DG model, the accuracy is ± 0.02%/° c, and non-contact measurement of current is implemented. The response time of the Hall device is in the level of mu s, the precision is higher than that of a mutual inductor with the same function, and the problem of magnetic saturation is avoided when the current transformer is measured. The input end of a current sensor U0 is used as the input end of a current sensor sign removing circuit to be connected with a current transformer, a tested current (not shown in the figure) is input, the output end of a current sensor U0 is connected with the inverting input end of a first operational amplifier U1 through a third resistor R3, the output end of the current sensor U0 outputs a potential VH in proportion to the tested current, the inverting input end of the first operational amplifier U1 is further connected with the output end of a first operational amplifier U1 through a fourth resistor R4, the non-inverting input end of the first operational amplifier U1 is connected with the common end of a first resistor R1 and a second resistor R2 which are connected in series, the other end of the first resistor R1 is connected with a positive power supply + V, the other end of the second resistor R2 is connected with a negative power supply-V, the output end of the first operational amplifier U1 is connected with the inverting input end of a second operational amplifier U2 through a fifth resistor R5, the inverting input end of the second operational amplifier U2 is further, the non-inverting input terminal of the second operational amplifier U2 is grounded through a seventh resistor R7, the non-inverting input terminal of the first operational amplifier U1 is further connected to the non-inverting input terminal of the third operational amplifier U3 through an eighth resistor R8, the non-inverting input terminal of the third operational amplifier U3 is further connected to the output terminal of the third operational amplifier U3 through a ninth resistor R9, the inverting input terminal of the third operational amplifier U3 is grounded through a tenth resistor R10, the output terminal of the first operational amplifier U1 is further connected to the first selection terminal Y of the second switch K1, the output terminal of the second operational amplifier U2 is connected to the first selection terminal Y of the first switch K0, the output terminal of the third operational amplifier U3 is connected to the second selection terminal E of the first switch K0, the output terminal of the third operational amplifier U3 is further connected to the second selection terminal E of the second switch K1 through a first non-gate Q1, and the common terminal Z of the first switch K0 and the common terminal Z1 are used as the analog-to-digital conversion circuit.
For the operational amplifier, there are problems that the power supply voltage is unstable or the temperature affects the quiescent operating point, which can cause the output voltage of the operational amplifier to fluctuate. Therefore, when the measured current is zero, the unstable voltage output by the operational amplifier at the beginning can be transferred step by step, and the precision of the rear-stage circuit is influenced. The first resistor R1 and the second resistor R2 have voltage values close to but not zero, so that the situation can be avoided, the actual voltage division is about 0.03V, the influence on the sensor output of-5V to +5V is in a thousandth level, and the states of the switches K0 and K1 of the Hall sensor module can be fixed when the tested circuit is not electrified. The resistance of the third resistor R3 is equal to the resistance of the fourth resistor R4, the amplification factor of the first operational amplifier U1 is-1, and the first operational amplifier U1 outputs a negative potential-VH. The second operational amplifier U2 and the third operational amplifier U3 are inverse operational amplifiers, the resistance of the fifth resistor R5 is equal to the resistance of the sixth resistor R6, the resistance of the eighth resistor R8 is equal to the resistance of the ninth resistor R9, the second operational amplifier U2 outputs a potential VH, and the third operational amplifier U3 outputs a negative potential-VH. When the potential is greater than zero, namely VH >0, the voltage at the first selection end Y of the first switch K0 is greater than zero, the common end Z outputs the voltage at the second selection end E, namely the first switch K0 outputs negative potential-VH, and the second switch K1 is turned off; when the potential is less than zero, namely VH <0, the second switch K1 outputs the potential VH, and the first switch K0 is turned off, and as described above, the output end of the sign removing circuit of the current sensor U0 outputs the negative value of the absolute value of the potential, namely- | VH |.
The input end of the upper limit voltage V1 generating circuit is connected with the input voltage VCC, the output end is connected with the second input end of the return difference analog-to-digital conversion circuit, the upper limit voltage V1 generating circuit is used for generating the upper limit voltage V1, and the upper limit voltage V1 is a positive voltage.
Specifically, as shown in fig. 3, the upper limit voltage generating circuit includes a regulator CR1, a twenty-third resistor R23, and a twenty-fourth resistor R24, a first end of the twenty-third resistor R23 is used as an input end of the upper limit voltage V1 generating circuit and is connected to the input voltage VCC, a second end of the twenty-third resistor R23 is connected to a cathode of the regulator CR1 and a first end of the twenty-fourth resistor R24, an anode of the regulator CR1 and a second end of the twenty-fourth resistor R24 are both grounded, and a common end of the twenty-third resistor R23 and the twenty-fourth resistor R24 is used as an output end of the upper limit voltage generating circuit and is connected to a second input end of the return voltage analog-to-digital converting circuit and outputs the upper limit voltage V1.
An optional input voltage VCC is 24V, R23 is 99.4K Ω, R24 is 5.76K Ω, and CR1 is a 5V regulator tube, and the upper limit voltage V1 is about 1.2V.
The output end of the return difference analog-to-digital conversion circuit is connected with the input end of the relay control circuit, and the return difference analog-to-digital conversion circuit is used for generating a lower limit voltage V2, comparing the potential absolute value | VH | with a lower limit voltage V2 and an upper limit voltage V1 respectively, judging the voltage range of the potential absolute value | VH | and outputting a digital quantity for controlling the opening and closing of a relay K3 in the relay control circuit.
Specifically, as shown in fig. 4, the return difference analog-to-digital conversion circuit includes a fourth operational amplifier U4, two voltage comparators and three nand gates, an inverting input terminal of the fourth operational amplifier U4 is connected to the upper-limit voltage V1 through a twelfth resistor R12 as a second input terminal of the return difference analog-to-digital conversion circuit, a non-inverting input terminal of the fourth operational amplifier U4 is grounded through an eleventh resistor R11, a non-inverting input terminal of the fourth operational amplifier U4 is further connected to an output terminal of the fourth operational amplifier U4 through a thirteenth resistor R13, an output terminal of the fourth operational amplifier U4 is connected to a non-inverting input terminal of the first voltage comparator U5, an output terminal of the fourth operational amplifier U4 is further connected to a non-inverting input terminal of the second voltage comparator U6 through a fourteenth resistor R14, a non-inverting input terminal of the second voltage comparator U6 is further grounded through a fifteenth resistor R15, an inverting input terminal of the first voltage comparator U5 is connected to an inverting input terminal of the second voltage comparator U6, and a sixteenth analog-inverting input terminal of the first analog-to the first absolute-to the For the negative value- | VH |, the output end of the first voltage comparator U5 is connected to the first input end of the first nand gate Q2 through a seventeenth resistor R17, the output end of the second voltage comparator U6 is connected to the second input end of the first nand gate Q2 and the second input end of the second nand gate Q3 through an eighteenth resistor R18, the output ends of the first nand gate Q2 and the second nand gate Q3 are connected to the two input ends of the third nand gate Q4, the output end of the third nand gate Q4 is used as the output end of the return difference analog-to-digital conversion circuit and is connected to the input end of the relay control circuit, and outputs a digital quantity Vout for controlling the opening and closing of the relay K3, and the first input end of the second nand gate Q3 is connected to the digital quantity Vout.
The resistance of the eleventh resistor R11 is equal to the resistance of the thirteenth resistor R13, the amplification factor of the fourth operational amplifier U4 is-1, and the fourth operational amplifier U4 outputs a negative upper limit voltage of-V1. The negative upper limit voltage-V1 is divided by a fourteenth resistor R14 and a fifteenth resistor R15 to obtain a negative lower limit voltage-V2, and the voltage value of the lower limit voltage V2 is 0.93 times the value of the upper limit voltage V1. The first voltage comparator U5 is used to compare the potential absolute value | VH | with the upper limit voltage V1, and the second voltage comparator U6 is used to compare the potential absolute value | VH | with the lower limit voltage V2. As shown in fig. 6, when the converter is in overcurrent and the absolute value of the potential is greater than the upper limit voltage V1, that is, | VH | > V1, both the first voltage comparator U5 and the second voltage comparator U6 output high level, then the third nand gate Q4 outputs high level, that is, Vout is high level; when the converter is close to overcurrent and the absolute value of the potential is greater than the lower limit voltage V2 and less than or equal to the upper limit voltage V1, that is, V1 ≧ VH | > V2, a buffer a is formed between the upper limit voltage V1 and the lower limit voltage V2, as shown in fig. 7, the first voltage comparator U5 outputs a low level, the second voltage comparator U6 outputs a high level, and the third nand gate Q4 maintains the output state at the previous moment; when the current of the converter is normal, and the absolute value of the potential is less than or equal to the lower limit voltage V2, namely | VH | ≦ V2, the first voltage comparator U5 and the second voltage comparator U6 both output low levels, then the third NAND gate Q4 outputs low levels, namely Vout is low level, so that the return analog-to-digital conversion circuit converts the analog quantity output by the current sensor into a digital quantity for controlling the opening and closing of the relay.
The output end of the relay control circuit is used as the output end of the current detection circuit to be connected with external equipment and used for outputting alarm signals to the outside.
Specifically, as shown in fig. 5, the relay control circuit includes three not gates, a capacitor C1, a plurality of resistors, a diode D1, a flip-flop U7, an and gate Q8, a MOS transistor Q9, and a relay K3, and the driving circuit is composed of other devices except for the relay K3. The trigger U7 is realized based on a model HEF401 BT, a first end of a nineteenth resistor R19 is used as an input end of a relay control circuit and is connected with a digital Vout, a second end of the nineteenth resistor R19 is connected with a reset end CD of the trigger U7 after sequentially passing through a second NOT gate Q5, a capacitor C1, a first end of a twentieth resistor R20, an anode of a diode D1 and a third NOT gate Q7, a second end of the twentieth resistor R20 and a cathode of a diode D1 are both connected with a positive power supply + V, a second end of the nineteenth resistor R19 is also connected with an input end D of the trigger U7, a reverse output end 1Q of the trigger U7 and the digital Vout are respectively connected with two input ends of an AND gate Q8, an output end of the AND gate Q8 is grounded through sequentially passing through a twenty-first resistor R21 and a twenty-second resistor R22 which are connected in series, an output end of the AND gate Q8 is also connected with a clock end of the trigger U7 through a fourth NOT gate Q6, and a MOS tube CP 9 of the, The drain electrode is connected with the negative electrode of the coil of the relay K3, the source electrode is grounded, the positive electrode of the coil of the relay K3 is connected with the input voltage VCC, the switch of the relay K3 is used as the output end of the relay control circuit to be connected with external equipment, and optionally, the external equipment can be an LED lamp or other alarm equipment.
The second not gate Q5, the capacitor C1, the twentieth resistor R20, the diode D1 and the third not gate Q7 commonly control the reset terminal CD, and the capacitor C1 can be regarded as off at ordinary times, so that the reset terminal CD is lowLevel, when the converter is over-current and the absolute value of the potential is greater than the upper limit voltage V1, i.e. | VH tint>V1, the digital signal Vout changes from low to high, and the reset terminal CD of the flip-flop U7 has a high level temporarily due to the charging and discharging of the capacitor C1 to cause the flip-flop U7 to reset, wherein the high level holding time of the reset terminal CD is determined by the capacitance C1. Inverted output of reset flip-flop U7
Outputting a high level, if the digital quantity Vout is still at the high level, outputting the high level by an AND gate Q8, switching on a MOS tube Q9, electrifying a coil of a relay K3, and switching on a switch to output an alarm signal; on the contrary, when the digital Vout changes from high level to low level, the and gate Q8 outputs low level, the MOS transistor Q9 is turned off, and the relay K3 is turned off. The MOS tube is controlled after the alarm signal when overcurrent is delayed, if the measured current only has a peak exceeding the alarm value, the measured current returns to the normal value before the charging and discharging of the capacitor C1 are completed, the alarm can not be triggered, and the transient current peak of the measured current is filtered by a partial circuit connected to the reset end, so that the false alarm is prevented.
The current detection circuit disclosed by the application collects current information of a converter of the IGBT module, timely sends out an alarm signal when the current of the converter exceeds a safety range, stops the operation of the current mode and prevents the IGBT module from being damaged. In fact, the current detection circuit has reference significance for the design of the current detection circuit for other application occasions such as power supply charging and motor control, and the circuit is high in practicability and expansibility. Buffer a has avoided current detection circuit to report to the police frequently because of the current fluctuation of converter, and the relay just can output alarm signal when being surveyed the electric current and rising when exceeding upper limit voltage, reports to the police just can be relieved when being surveyed the electric current and reduce in lower limit voltage, has improved current detection circuit's accuracy and whole circuit module's stability.
It should be noted that each device used in the present application is an existing device, and a circuit structure inside the existing device is not described in detail here.
What has been described above is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiment. It is to be understood that other modifications and variations directly derivable or suggested by those skilled in the art without departing from the spirit and concept of the present invention are to be considered as included within the scope of the present invention.
Claims (8)
1. The current detection circuit based on the Hall sensor is characterized by comprising a current sensor sign removing circuit, an upper limit voltage generating circuit, a return difference analog-to-digital conversion circuit and a relay control circuit, wherein the input end of the current sensor sign removing circuit is used as the input end of the current detection circuit and is connected with a current transformer of an IGBT power module, the output end of the current sensor sign removing circuit is connected with the first input end of the return difference analog-to-digital conversion circuit, the current sensor sign removing circuit is used for collecting the measured current of the current transformer and outputting the negative value of the absolute value of the potential, and the potential is in direct proportion to the measured current; the input end of the upper limit voltage generating circuit is connected with an input voltage, the output end of the upper limit voltage generating circuit is connected with the second input end of the return difference analog-to-digital conversion circuit, the upper limit voltage generating circuit is used for generating an upper limit voltage, and the upper limit voltage is a positive voltage; the output end of the return difference analog-to-digital conversion circuit is connected with the input end of the relay control circuit, the return difference analog-to-digital conversion circuit is used for generating lower limit voltage, comparing the potential absolute value with the lower limit voltage and the upper limit voltage respectively, judging the voltage range of the potential absolute value and outputting digital quantity for controlling the opening and closing of a relay in the relay control circuit; the output end of the relay control circuit is used as the output end of the current detection circuit to be connected with external equipment and used for outputting alarm signals to the outside.
2. The Hall sensor based current detection circuit according to claim 1, wherein the current sensor sign removing circuit comprises a current sensor, three operational amplifiers, a first NOT gate, a first switch and a second switch, an input terminal of the current sensor is connected to the current transformer as an input terminal of the current sensor sign removing circuit, a current to be measured is input, an output terminal of the current sensor is connected to an inverting input terminal of a first operational amplifier through a third resistor, and the output terminal outputs a potential proportional to the current to be measured, the inverting input terminal of the first operational amplifier is further connected to an output terminal of the first operational amplifier through a fourth resistor, a non-inverting input terminal of the first operational amplifier is connected to a common terminal of a first resistor and a second resistor connected in series, the other terminal of the first resistor is connected to a positive electrode of a power supply, and the other terminal of the second resistor is connected to a negative electrode of the power supply, the output end of the first operational amplifier is connected with the inverting input end of the second operational amplifier through a fifth resistor, the inverting input end of the second operational amplifier is further connected with the output end of the second operational amplifier through a sixth resistor, the non-inverting input end of the second operational amplifier is grounded through a seventh resistor, the output end of the first operational amplifier is further connected with the non-inverting input end of the third operational amplifier through an eighth resistor, the non-inverting input end of the third operational amplifier is further connected with the output end of the third operational amplifier through a ninth resistor, the inverting input end of the third operational amplifier is grounded through a tenth resistor, the output end of the first operational amplifier is further connected with the first selection end of the second switch, the output end of the second operational amplifier is connected with the first selection end of the first switch, the output end of the third operational amplifier is connected with the second selection end of the first switch through the first NOT gate, and the common end of the first switch and the common end of the second switch are used as the output end of the current sensor sign removing circuit and are connected with the first input end of the return difference analog-to-digital conversion circuit.
3. The Hall sensor based current detection circuit according to claim 2, wherein the first resistor and the second resistor have voltage values close to but not zero, the third resistor has a resistance equal to the fourth resistor, the amplification factor of the first operational amplifier is-1, and the first operational amplifier outputs a negative potential; the second operational amplifier and the third operational amplifier are in reverse phase, the resistance value of the fifth resistor is equal to that of the sixth resistor, the resistance value of the eighth resistor is equal to that of the ninth resistor, the second operational amplifier outputs potential, and the third operational amplifier outputs negative potential; when the electric potential is larger than zero, the first switch outputs negative electric potential, the second switch is turned off, when the electric potential is smaller than zero, the second switch outputs electric potential, the first switch is turned off, and then the output end of the current sensor sign removing circuit outputs a negative value of the absolute value of the electric potential.
4. The Hall sensor-based current detection circuit according to claim 1, wherein the upper limit voltage generation circuit includes a voltage regulator tube, a twenty-third resistor and a twenty-fourth resistor, a first end of the twenty-third resistor is used as an input end of the upper limit voltage generation circuit to be connected to the input voltage, a second end of the twenty-third resistor is connected to a cathode of the voltage regulator tube and a first end of the twenty-fourth resistor, respectively, an anode of the voltage regulator tube and a second end of the twenty-fourth resistor are both grounded, and a common end of the twenty-third resistor and the twenty-fourth resistor is used as an output end of the upper limit voltage generation circuit to be connected to a second input end of the return difference analog-to-digital conversion circuit and output the upper limit voltage.
5. The Hall sensor-based current detection circuit according to claim 1, wherein the flyback analog-to-digital conversion circuit comprises a fourth operational amplifier, two voltage comparators and three NAND gates, an inverting input terminal of the fourth operational amplifier serves as a second input terminal of the flyback analog-to-digital conversion circuit and is connected to the upper limit voltage through a twelfth resistor, a non-inverting input terminal of the fourth operational amplifier is connected to ground through an eleventh resistor, a non-inverting input terminal of the fourth operational amplifier is further connected to an output terminal of the fourth operational amplifier through a thirteenth resistor, an output terminal of the fourth operational amplifier is connected to a non-inverting input terminal of the first voltage comparator, an output terminal of the fourth operational amplifier is further connected to a non-inverting input terminal of the second voltage comparator through a fourteenth resistor, a non-inverting input terminal of the second voltage comparator is further connected to ground through a fifteenth resistor, and an inverting input terminal of the first voltage comparator is connected to an inverting input terminal of the second voltage comparator, and the connected end is used as the first input end of the return difference analog-to-digital conversion circuit and is connected with the negative value of the absolute value of the potential through a sixteenth resistor, the output end of the first voltage comparator is connected with the first input end of the first NAND gate through a seventeenth resistor, the output end of the second voltage comparator is respectively connected with the second input end of the first NAND gate and the second input end of the second NAND gate through an eighteenth resistor, the output ends of the first NAND gate and the second NAND gate are respectively connected with two input ends of a third NAND gate, the output end of the third NAND gate is used as the output end of the return difference analog-to-digital conversion circuit and is connected with the input end of the relay control circuit, the digital quantity for controlling the opening and closing of the relay is output, and the first input end of the second NAND gate.
6. The Hall sensor based current detection circuit according to claim 5, wherein if the resistance of the eleventh resistor is equal to the resistance of the thirteenth resistor, the amplification factor of the fourth operational amplifier is-1, the fourth operational amplifier outputs a negative upper limit voltage, and the voltage value of the lower limit voltage is 0.93 times the upper limit voltage; the first voltage comparator is used for comparing the potential absolute value with the upper limit voltage, and the second voltage comparator is used for comparing the potential absolute value with the lower limit voltage; when the converter is in overcurrent and the absolute value of the potential is greater than the upper limit voltage, the first voltage comparator and the second voltage comparator both output high levels, and the third NAND gate outputs high levels; when the converter is close to overcurrent and the absolute value of the potential is greater than the lower limit voltage and less than or equal to the upper limit voltage, a buffer area is formed between the upper limit voltage and the lower limit voltage, the first voltage comparator outputs a low level, the second voltage comparator outputs a high level, and the third NAND gate keeps the output state at the last moment; when the current of the converter is normal and the absolute value of the potential is less than or equal to the lower limit voltage, the first voltage comparator and the second voltage comparator both output low levels, and then the third NAND gate outputs low levels.
7. The Hall sensor based current detection circuit according to claim 1, wherein the relay control circuit comprises three NOT gates, a capacitor, a plurality of resistors, a diode, a trigger, an AND gate, an MOS transistor and a relay, and other devices except the relay form a driving circuit; the first end of a nineteenth resistor is used as the input end of the relay control circuit to be connected with the digital quantity, the second end of the nineteenth resistor is connected with the reset end of the trigger after sequentially passing through a second NOT gate, a capacitor, the first end of a twentieth resistor, a diode anode and a third NOT gate, the second end of the twentieth resistor and the diode cathode are both connected with the positive electrode of a power supply, the second end of the nineteenth resistor is further connected with the input end of the trigger, the reverse output end of the trigger and the digital quantity are respectively connected with the two input ends of the AND gate, the output end of the AND gate is grounded sequentially passing through a twenty-first resistor and a twenty-second resistor which are connected in series, the output end of the AND gate is further connected with the clock end of the trigger through a fourth NOT gate, the gate of the MOS transistor is connected with the common end of the twenty-first resistor and the, The source electrode is grounded, the anode of the relay coil is connected with the input voltage, and the switch of the relay is used as the output end of the relay control circuit and is connected with external equipment;
when the converter is in overcurrent and the absolute value of the potential is greater than the upper limit voltage, the digital quantity is changed from a low level to a high level, the reset end of the trigger is reset due to the fact that the capacitor is charged and discharged with a short high level, and the high level holding time of the reset end is determined according to the capacitance value; the reset reverse output end of the trigger outputs high level, if the digital quantity is still high level, the AND gate outputs high level, the MOS tube is conducted, the relay coil is electrified, and the switch is closed to output an alarm signal; and otherwise, when the digital quantity is changed from high level to low level, the AND gate outputs low level, the MOS tube is disconnected, and the relay switch is disconnected.
8. The hall sensor based current sense circuit of claim 2 wherein the current sensor is implemented based on a hall sensor model CSLA2DG with an accuracy of ± 0.02%/deg.c.
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