CN112649661B - Current detection circuit based on Hall sensor - Google Patents
Current detection circuit based on Hall sensor Download PDFInfo
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- CN112649661B CN112649661B CN202011631365.6A CN202011631365A CN112649661B CN 112649661 B CN112649661 B CN 112649661B CN 202011631365 A CN202011631365 A CN 202011631365A CN 112649661 B CN112649661 B CN 112649661B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
- G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
- G01R15/20—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices
- G01R15/202—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices using Hall-effect devices
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Abstract
The application discloses a current detection circuit based on a Hall sensor, which relates to the technical field of current detection and comprises a current sensor symbol removing circuit, an upper limit voltage generating circuit, a return difference analog-to-digital conversion circuit and a relay control circuit, wherein the input end of the current sensor symbol removing circuit is connected with a converter, the output end of the current sensor symbol removing circuit is connected with the return difference analog-to-digital conversion circuit, and the current sensor symbol removing circuit is used for collecting the current of the converter and outputting the negative value of the absolute value of potential; the input end of the upper limit voltage generating circuit is connected with the input voltage, and the output end of the upper limit voltage generating circuit is connected with the return difference analog-to-digital conversion circuit and is used for generating upper limit voltage; the output end of the return difference analog-to-digital conversion circuit is connected with the relay control circuit and is used for generating a lower limit voltage, comparing the absolute value of the potential with the lower limit voltage and an upper limit voltage respectively and outputting digital quantity for controlling the relay to be opened and closed; the relay control circuit is used for outputting an alarm signal to the outside. The detection circuit can adapt to the characteristic of variable current characteristics to be detected, and can send out an alarm signal when the power module is in overcurrent, so that the device is prevented from being damaged.
Description
Technical Field
The application relates to the technical field of current detection, in particular to a current detection circuit based on a Hall sensor.
Background
The IGBT power module is a power module composed of insulated gate bipolar transistors, and is widely used in medium voltage driving fields because of its characteristics such as simple driving and high switching frequency. The turn-on loss of the IGBT is very small when the IGBT normally works, but when the application module is over-current, the transistor of the IGBT leaves a safe working area, so that larger instant power can be generated, and the IGBT needs to be turned off in time. And the application environment of the IGBT, such as a converter and the like, is easy to overcurrent due to frequent change of electric quantity characteristics. In order to avoid the damage to the device caused by the extreme conditions such as short circuit, overcurrent and the like, on one hand, overcurrent protection needs to be added, and on the other hand, current information needs to be fed back to a control end, namely a current detection circuit is added.
There are various implementations of current detection, which require appropriate choices to be made according to the application environment and requirements. The IGBT circuit current for medium-voltage driving has hundreds of amperes, the current detection circuit needs to be isolated based on safety, meanwhile, the current detection circuit also needs to consider that the current characteristics of the converter are always changed, and the final output result is stable.
The method is more commonly used, a small resistor string is selected in a tested loop, and loop current is calculated by measuring voltages at two ends of the resistor; or a transformer can be used to obtain a voltage with the same waveform, and the current parameter in the main circuit can be calculated by measuring the voltage. Both methods have disadvantages for the IGBT power modules in the current transformer measured in this example, the former has very small resistance selection at high current, is not easy to select, and has problems of heat generation and precision, and the latter has no conciseness when designing, considering the conditions of magnetic saturation and waveform distortion.
Disclosure of Invention
The inventor provides a current detection circuit based on a Hall sensor aiming at the problems and the technical requirements, and designs a current detection circuit based on the current collected by the Hall sensor, which can adapt to the characteristic of changeable sampled current characteristics, can timely send out a reliable alarm signal when an IGBT power module overflows, and avoids damaging devices. The technical scheme of the application is as follows:
the current detection circuit based on the Hall sensor comprises a current sensor symbol removing circuit, an upper limit voltage generating circuit, a return difference analog-to-digital conversion circuit and a relay control circuit, wherein the input end of the current sensor symbol removing circuit is used as the input end of the current detection circuit to be connected with a converter of an IGBT power module, the output end of the current sensor symbol removing circuit is connected with the first input end of the return difference analog-to-digital conversion circuit, and the current sensor symbol removing circuit is used for collecting the tested current of the converter and outputting the negative value of the absolute value of the potential, wherein the potential is in direct proportion to the tested current; the input end of the upper limit voltage generating circuit is connected with the input voltage, the output end of the upper limit voltage generating circuit is connected with the second input end of the return difference analog-to-digital conversion circuit, and the upper limit voltage generating circuit is used for generating an upper limit voltage which is a positive voltage; the output end of the return-difference analog-to-digital conversion circuit is connected with the input end of the relay control circuit, and the return-difference analog-to-digital conversion circuit is used for generating lower limit voltage, comparing the potential absolute value with the lower limit voltage and the upper limit voltage respectively, judging the voltage range of the potential absolute value and outputting digital quantity for controlling the relay in the relay control circuit to be opened and closed; the output end of the relay control circuit is used as the output end of the current detection circuit to be connected with external equipment and used for outputting alarm signals to the outside.
The current sensor symbol removing circuit comprises a current sensor, three operational amplifiers, a first NOT gate, a first switch and a second switch, wherein the input end of the current sensor is used as the input end of the current sensor symbol removing circuit to be connected with a converter, the current to be detected is input, the output end of the current sensor is connected with the inverting input end of the first operational amplifier through a third resistor, the output end of the current sensor outputs a potential in proportion to the current to be detected, the inverting input end of the first operational amplifier is also connected with the output end of the first operational amplifier through a fourth resistor, the non-inverting input end of the first operational amplifier is connected with the common end of a first resistor and a second resistor in series, the other end of the first resistor is connected with the positive electrode of a power supply, the other end of the second resistor is connected with the inverting input end of the second operational amplifier through a fifth resistor, the inverting input end of the second operational amplifier is also connected with the output end of the second operational amplifier through a seventh resistor, the output end of the first operational amplifier is also connected with the inverting input end of the third resistor, the inverting input end of the first operational amplifier is also connected with the common end of the third resistor, the inverting input end of the first operational amplifier is also connected with the first switch through the third resistor, the inverting input end of the first operational amplifier is also connected with the common end of the third resistor, the inverting input end of the first operational amplifier is also connected with the second operational amplifier is connected with the inverting input end of the second operational amplifier.
The further technical scheme is that the first resistor and the second resistor take voltage values which are close to but not zero, the resistance value of the third resistor is equal to the resistance value of the fourth resistor, the amplification factor of the first operational amplifier is-1, and the first operational amplifier outputs negative potential; the second operational amplifier and the third operational amplifier are inverting operational amplifiers, the resistance value of the fifth resistor is equal to that of the sixth resistor, the resistance value of the eighth resistor is equal to that of the ninth resistor, the second operational amplifier outputs potential, and the third operational amplifier outputs negative potential; when the potential is greater than zero, the first switch outputs a negative potential, while the second switch is turned off, and when the potential is less than zero, the second switch outputs a potential, while the first switch is turned off, the output end of the current sensor unsigned circuit outputs a negative value of the absolute value of the potential.
The upper limit voltage generation circuit comprises a voltage stabilizing tube, a twenty-third resistor and a twenty-fourth resistor, wherein the first end of the twenty-third resistor is used as an input end of the upper limit voltage generation circuit to be connected with an input voltage, the second end of the twenty-third resistor is respectively connected with a cathode of the voltage stabilizing tube and the first end of the twenty-fourth resistor, the anode of the voltage stabilizing tube and the second end of the twenty-fourth resistor are grounded, and the common end of the twenty-third resistor and the twenty-fourth resistor is used as an output end of the upper limit voltage generation circuit to be connected with the second input end of the return difference analog-digital conversion circuit and output the upper limit voltage.
The further technical scheme is that the return-difference analog-to-digital conversion circuit comprises a fourth operational amplifier, two voltage comparators and three NAND gates, wherein an inverting input end of the fourth operational amplifier is connected with an upper limit voltage through a twelfth resistor, an non-inverting input end of the fourth operational amplifier is grounded through an eleventh resistor, the non-inverting input end of the fourth operational amplifier is connected with an output end of the fourth operational amplifier through a thirteenth resistor, an output end of the fourth operational amplifier is connected with the non-inverting input end of a first voltage comparator through a fourteenth resistor, the non-inverting input end of the second voltage comparator is grounded through a fifteenth resistor, the inverting input end of the first voltage comparator is connected with the inverting input end of the second voltage comparator, the connecting end is used as a negative value of a potential absolute value of the return-difference analog-to-digital conversion circuit, the output end of the first voltage comparator is connected with a first input end of the first NAND gate through a seventeenth resistor, the output end of the second voltage comparator is connected with the non-inverting input end of the second voltage comparator through a eighteenth resistor, the non-inverting input end of the second voltage comparator is connected with the second NAND gate, and the output end of the second NAND gate is connected with the second NAND gate respectively, and the output end of the NAND gate is connected with the second NAND gate respectively.
The further technical scheme is that the resistance value of the eleventh resistor is equal to that of the thirteenth resistor, the amplification factor of the fourth operational amplifier is-1, the fourth operational amplifier outputs a negative upper limit voltage, and the voltage value of the lower limit voltage is 0.93 times of the upper limit voltage value; the first voltage comparator is used for comparing the potential absolute value with the upper limit voltage, and the second voltage comparator is used for comparing the potential absolute value with the lower limit voltage; when the current transformer is overcurrent and the potential absolute value is larger than the upper limit voltage, the first voltage comparator and the second voltage comparator both output high level, and the third NAND gate outputs high level; when the current transformer is close to overcurrent, and the absolute value of the potential is larger than the lower limit voltage and smaller than or equal to the upper limit voltage, a buffer area is formed between the upper limit voltage and the lower limit voltage, the first voltage comparator outputs a low level, the second voltage comparator outputs a high level, and the third NAND gate keeps the output state at the last moment; when the current of the converter is normal and the absolute value of the potential is smaller than or equal to the lower limit voltage, the first voltage comparator and the second voltage comparator both output low level, and the third NAND gate outputs low level.
The relay control circuit comprises three NOT gates, a capacitor, a plurality of resistors, a diode, a trigger, an AND gate, an MOS tube and a relay, wherein other devices except the relay form a driving circuit; the first end of the nineteenth resistor is used as the input end of the relay control circuit to be connected with the digital quantity, the second end of the nineteenth resistor sequentially passes through the second NOT gate, the capacitor, the first end of the twentieth resistor, the anode of the diode and the rear end of the third NOT gate to be connected with the reset end of the trigger, the second end of the twentieth resistor and the cathode of the diode are both connected with the positive electrode of the power supply, the second end of the nineteenth resistor is also connected with the input end of the trigger, the reverse output end of the trigger and the digital quantity are respectively connected with the two input ends of the AND gate, the output end of the AND gate is grounded sequentially through the twenty first resistor and the twenty second resistor which are connected in series, the output end of the AND gate is also connected with the clock end of the trigger through the fourth NOT gate, the grid electrode of the MOS tube is connected with the public end of the twenty first resistor and the twenty second resistor, the drain electrode of the MOS tube is connected with the negative electrode of the relay coil and the source electrode of the MOS tube is grounded, the positive electrode of the relay coil is connected with the input voltage, and the switch of the relay is used as the output end of the relay control circuit to be connected with external equipment;
when the current transformer overflows and the potential absolute value is larger than the upper limit voltage, the digital quantity is changed from low level to high level, and the reset end of the trigger is reset due to short high level caused by charging and discharging of the capacitor, wherein the high level holding time of the reset end is determined according to the capacitor value; the reverse output end of the trigger after reset outputs high level, if the digital quantity is still high level, the AND gate outputs high level, the MOS tube is conducted, the relay coil is electrified, and the switch is closed to output an alarm signal; and otherwise, when the digital quantity is changed from high level to low level, the AND gate outputs low level, the MOS tube is disconnected, and the relay switch is disconnected.
The further technical scheme is that the current sensor is realized based on a Hall sensor of the model CSLA2DG, and the precision is +/-0.02%/DEG C.
The beneficial technical effects of the application are as follows:
the application uses the Hall sensor as a current collection mode to realize non-contact measurement of the current, and compared with a measurement method using a sensing element connected in series in a loop, the application has no safety problem and no power consumption problem when the measured current is larger. The response time of the Hall device is in the mu s level, the precision is higher than that of a mutual inductor with the same function, and the problem of magnetic saturation is avoided when the converter is tested; the non-zero voltage value of the non-zero input end of the first operational amplifier can avoid that the unstable voltage output by the first operational amplifier is transmitted step by step when the measured current is zero, and the accuracy of a later-stage circuit is affected; in the return difference analog-digital conversion circuit, a buffer area, namely a return difference module, is formed in a current judging part through a logic circuit formed by two voltage comparators and three NAND gates, so that frequent alarming of a current detection circuit due to current fluctuation of a converter is avoided, an alarming signal is output by a relay only when the detected current rises above an upper limit voltage, alarming is released only when the detected current falls below a lower limit voltage, and accuracy of the current detection circuit and stability of the whole circuit module are improved.
Drawings
Fig. 1 is a flowchart of a current detection circuit provided by the present application.
Fig. 2 is a circuit diagram of a current sensor de-sign circuit provided by the application.
Fig. 3 is a circuit diagram of an upper limit voltage generation circuit provided by the present application.
Fig. 4 is a circuit diagram of a return difference analog-to-digital conversion circuit provided by the application.
Fig. 5 is a circuit diagram of a relay control circuit provided by the present application.
Fig. 6 is a logic flow diagram of analog-to-digital conversion of the return-difference analog-to-digital conversion circuit provided by the application.
Fig. 7 is a logic diagram of return difference judgment of the return difference analog-to-digital conversion circuit provided by the application.
Detailed Description
The following describes the embodiments of the present application further with reference to the drawings.
Referring to fig. 1 to 5, the hall sensor-based current detection circuit includes a current sensor unsigned circuit, an upper limit voltage generation circuit, a return difference analog-to-digital conversion circuit, and a relay control circuit.
The input end of the current sensor de-sign circuit is used as the input end of the current detection circuit to be connected with the converter of the IGBT power module, the output end of the current sensor de-sign circuit is connected with the first input end of the return difference analog-to-digital conversion circuit, and the current sensor de-sign circuit is used for collecting the tested current of the converter and outputting a negative value of the absolute value of the potential, namely VH, wherein the potential is in direct proportion to the tested current.
Specifically, as shown in fig. 2, the current sensor U0 de-sign circuit includes a current sensor U0, three operational amplifiers, a first not gate Q1, a first switch K0 and a second switch K1, wherein the current sensor U0 is implemented based on a hall sensor of the CSLA2DG model, the accuracy is ±0.02%/°c, and the non-contact measurement of current is implemented. The response time of the Hall device is in the mu s level, the precision is higher than that of a mutual inductor with the same function, and the problem of magnetic saturation is avoided when the converter is tested. The input end of the current sensor U0 is used as the input end of the current sensor symbol removing circuit to be connected with a converter, the detected current (not shown in the figure) is input, the output end of the current sensor U0 is connected with the inverting input end of the first operational amplifier U1 through a third resistor R3, the output end of the second operational amplifier U2 outputs a potential VH which is in direct proportion to the detected current, the inverting input end of the first operational amplifier U1 is also connected with the output end of the first operational amplifier U1 through a fourth resistor R4, the non-inverting input end of the first operational amplifier U1 is connected with the common end of a second resistor R2 in series, the other end of the first resistor R1 is connected with a positive electrode +V of a power supply, the other end of the second resistor R2 is connected with the inverting input end of the second operational amplifier U2 through a fifth resistor R5, the inverting input end of the second operational amplifier U2 is also connected with the output end of the second operational amplifier U2 through a sixth resistor R6, the non-inverting input end of the second operational amplifier U2 is also connected with the output end of the first operational amplifier U1 through a seventh resistor R7, the non-inverting input end of the second operational amplifier U1 is also connected with the third resistor R3 through the third resistor R3, the non-inverting input end of the second operational amplifier U2 is also connected with the inverting input end of the second operational amplifier U2 is also selected to be connected with the third resistor R3, the non-inverting input end of the first operational amplifier U2 is also selected to be connected with the output end of the first operational amplifier U2 through the third resistor R3 is 3, the non-inverting input end is also selected to be connected with the output end of the output end V3 is 3B 3, the common terminal Z of the first switch K0 and the common terminal Z of the second switch K1 are used as the output ends of the current sensor de-sign circuit to be connected with the first input end of the return difference analog-digital conversion circuit.
For the operational amplifier, there are problems that the power supply voltage is unstable or the temperature affects the static working point, and these can cause the voltage of the output end of the operational amplifier to drift up and down. Therefore, when the measured current is zero, the unstable voltage output by the initial operational amplifier can be transmitted step by step, and the precision of the subsequent-stage circuit is affected. The first resistor R1 and the second resistor R2 take voltage values which are close to but not zero, so that the situation can be avoided, the actual partial pressure is about 0.03V, the influence on the output of the sensor of-5V to +5V is in the micrometer level, and the states of the switches K0 and K1 of the Hall sensor module can be fixed when the tested circuit is not electrified. And if the resistance value of the third resistor R3 is equal to that of the fourth resistor R4, the amplification factor of the first operational amplifier U1 is-1, and the first operational amplifier U1 outputs negative potential-VH. The second operational amplifier U2 and the third operational amplifier U3 are inverting operational amplifiers, the resistance of the fifth resistor R5 is equal to the resistance of the sixth resistor R6, the resistance of the eighth resistor R8 is equal to the resistance of the ninth resistor R9, the second operational amplifier U2 outputs a potential VH, and the third operational amplifier U3 outputs a negative potential-VH. When the potential is greater than zero, i.e., VH >0, the voltage at the first selection terminal Y of the first switch K0 is greater than zero, the common terminal Z outputs the voltage at the second selection terminal E, i.e., the first switch K0 outputs the negative potential-VH, while the second switch K1 is turned off; when the potential is less than zero, i.e., VH <0, the second switch K1 outputs the potential VH, while the first switch K0 is turned off, and in summary, the output terminal of the current sensor U0 de-sign circuit outputs a negative value of the absolute value of the potential, i.e., -VH.
The input end of the upper limit voltage V1 generating circuit is connected with the input voltage VCC, the output end of the upper limit voltage V1 generating circuit is connected with the second input end of the return difference analog-digital conversion circuit, and the upper limit voltage V1 generating circuit is used for generating the upper limit voltage V1, and the upper limit voltage V1 is a positive voltage.
Specifically, as shown in fig. 3, the upper limit voltage generating circuit includes a voltage stabilizing tube CR1, a twenty-third resistor R23, and a twenty-fourth resistor R24, wherein a first end of the twenty-third resistor R23 is connected to the input voltage VCC as an input end of the upper limit voltage V1 generating circuit, a second end of the twenty-third resistor R23 is connected to a cathode of the voltage stabilizing tube CR1, a first end of the twenty-fourth resistor R24, an anode of the voltage stabilizing tube CR1 and a second end of the twenty-fourth resistor R24 are grounded, and a common end of the twenty-third resistor R23 and the twenty-fourth resistor R24 is connected to a second input end of the return difference analog-to-digital conversion circuit as an output end of the upper limit voltage generating circuit, and outputs the upper limit voltage V1.
The optional input voltage VCC is 24V, r23=99.4kΩ, r24=5.7kΩ, and CR1 is a 5V regulator, and the upper limit voltage V1 is about 1.2V.
The output end of the return difference analog-to-digital conversion circuit is connected with the input end of the relay control circuit, the return difference analog-to-digital conversion circuit is used for generating a lower limit voltage V2, comparing the potential absolute value |VH| with the lower limit voltage V2 and the upper limit voltage V1 respectively, judging the voltage range of the potential absolute value |VH|, and outputting the digital quantity for controlling the opening and closing of the relay K3 in the relay control circuit.
Specifically, as shown in fig. 4, the return-difference analog-to-digital conversion circuit includes a fourth operational amplifier U4, two voltage comparators and three nand gates, the inverting input terminal of the fourth operational amplifier U4 is connected to the upper limit voltage V1 through a twelfth resistor R12, the non-inverting input terminal of the fourth operational amplifier U4 is grounded through an eleventh resistor R11, the non-inverting input terminal of the fourth operational amplifier U4 is connected to the output terminal of the fourth operational amplifier U4 through a thirteenth resistor R13, the output terminal of the fourth operational amplifier U4 is connected to the non-inverting input terminal of the first voltage comparator U5, the output terminal of the fourth operational amplifier U4 is connected to the non-inverting input terminal of the second voltage comparator U6 through a fourteenth resistor R14, the non-inverting input terminal of the second voltage comparator U6 is grounded through a fifteenth resistor R15, the non-inverting input terminal of the first voltage comparator U5 is connected to the inverting input terminal of the second voltage comparator U6, the non-inverting input terminal of the fourth operational amplifier U4 is connected to the output terminal of the fourth operational amplifier U4 through a thirteenth resistor R13, the non-inverting input terminal of the fourth operational amplifier U4 is connected to the non-inverting input terminal of the second voltage comparator U4 through a sixteenth resistor R16, the non-inverting input terminal of the second voltage comparator V6 is connected to the first comparator Q3, the output terminal of the second comparator Q2 is connected to the second comparator Q3, the output terminal of the Q2 is connected to the Q3 is connected to the Q2, the Q2 is connected to the Q3, and the Q2 is connected to the output terminal of the Q3, and the Q2.
The resistance of the eleventh resistor R11 is equal to the resistance of the thirteenth resistor R13, and the amplification factor of the fourth operational amplifier U4 is-1, and the fourth operational amplifier U4 outputs a negative upper limit voltage-V1. The negative upper limit voltage-V1 is divided by the fourteenth resistor R14 and the fifteenth resistor R15 to obtain a negative lower limit voltage-V2, and the voltage value of the lower limit voltage V2 is 0.93 times the upper limit voltage V1. The first voltage comparator U5 is for comparing the potential absolute value |vh| with the upper limit voltage V1, and the second voltage comparator U6 is for comparing the potential absolute value |vh| with the lower limit voltage V2. As shown in fig. 6, when the current transformer is over-current and the absolute value of the potential is greater than the upper limit voltage V1, i.e., |vh| > V1, the first voltage comparator U5 and the second voltage comparator U6 both output a high level, and the third nand gate Q4 outputs a high level, i.e., vout is a high level; when the current transformer is close to overcurrent and the absolute value of the potential is larger than the lower limit voltage V2 and smaller than or equal to the upper limit voltage V1, namely V1 is not smaller than |VH| > V2, a buffer zone a is formed between the upper limit voltage V1 and the lower limit voltage V2, as shown in FIG. 7, the first voltage comparator U5 outputs low level, the second voltage comparator U6 outputs high level, and the third NAND gate Q4 keeps the output state at the last moment; when the current of the converter is normal and the absolute value of the potential is smaller than or equal to the lower limit voltage V2, namely |VH| is smaller than or equal to V2, the first voltage comparator U5 and the second voltage comparator U6 output low levels, the third NAND gate Q4 outputs low levels, namely Vout is low level, and therefore the return difference analog-to-digital conversion circuit converts analog quantity output by the current sensor into digital quantity for controlling the relay to be opened and closed.
The output end of the relay control circuit is used as the output end of the current detection circuit to be connected with external equipment and used for outputting alarm signals to the outside.
Specifically, as shown in fig. 5, the relay control circuit includes three not gates, a capacitor C1, a plurality of resistors, a diode D1, a trigger U7, an and gate Q8, a MOS transistor Q9, and a relay K3, and other devices except for the relay K3 form a driving circuit. According to the application, the trigger U7 is realized based on HEF4013BT model, the first end of the nineteenth resistor R19 is used as the input end of a relay control circuit to be connected with a digital quantity Vout, the second end of the nineteenth resistor R19 sequentially passes through a second NOT gate Q5, a capacitor C1 and the first end of a twenty-first resistor R20, the anode of a diode D1 and the cathode of a third NOT gate Q7 and then is connected with the reset end CD of the trigger U7, the second end of the twenty-first resistor R20 and the cathode of the diode D1 are both connected with the positive electrode +V of a power supply, the second end of the nineteenth resistor R19 is also connected with the input end D of the trigger U7, the reverse output end 1Q and the digital quantity Vout of the trigger U7 are respectively connected with two input ends of an AND gate Q8, the output end of the AND gate Q8 is sequentially grounded through a twenty-first resistor R21 and a twenty-second resistor R22 which are connected in series, the output end of the AND gate Q8 is also connected with the clock end CP of the trigger U7 through a fourth NOT gate Q6, the grid of the MOS transistor Q9 is connected with the drain electrode of the common resistor R21 and the drain electrode K3, the drain electrode K is connected with the common coil K3, the output end of the relay can be connected with the external LED device, and the LED device can be used as an external alarm device.
The second NOT gate Q5, the capacitor C1, the twentieth resistor R20, the diode D1 and the third NOT gate Q7 commonly control the reset terminal CD, and the capacitor C1 can be regarded as being disconnected at ordinary times, so that the reset terminal CD is at a low level, when the converter is over-current and the absolute value of the potential is larger than the upper limit voltage V1, namely |VH|>V1, the digital quantity Vout is changed from low level to high level, and the reset end CD of the trigger U7 is reset due to the short high level of the charge and discharge of the capacitor C1, wherein the high level keeping time of the reset end CD is determined according to the capacitor value C1. The reset flip-flop U7 has its inverted outputOutputting a high level, if the digital quantity Vout is still in the high level, outputting the high level by the AND gate Q8, conducting the MOS tube Q9, powering on the coil of the relay K3, and closing the switch to output an alarm signal; conversely, when the digital quantity Vout is changed from high level to low level, the and gate Q8 outputs low level, the MOS transistor Q9 is turned off, and the relay K3 switch is turned off. Report when overcurrent occursThe alarm signal is delayed and then the MOS tube is controlled, if only one peak of the detected current exceeds the alarm value, the alarm is not triggered when the detected current returns to the normal value before the capacitor C1 is charged and discharged, and the transient current peak of the detected current is filtered by a partial circuit connected to the reset end, so that false alarm is prevented.
The current detection circuit disclosed by the application collects the current information of the converter of the IGBT module, and when the current exceeds the safety range, an alarm signal is sent out timely and the operation of the current mode is stopped, so that the IGBT module is prevented from being damaged. In practice, the current detection circuit has reference significance for the design of current detection circuits for other application occasions such as power supply charging and motor control, and has strong circuit practicability and high expansibility. The buffer zone a avoids frequent alarm of the current detection circuit due to current fluctuation of the current transformer, the relay outputs an alarm signal only when the detected current rises above the upper limit voltage, and the alarm is released when the detected current falls below the lower limit voltage, so that the accuracy of the current detection circuit and the stability of the whole circuit module are improved.
The present application adopts the conventional devices, and the internal circuit structure thereof is not described in detail herein.
The above is only a preferred embodiment of the present application, and the present application is not limited to the above examples. It is to be understood that other modifications and variations which may be directly derived or contemplated by those skilled in the art without departing from the spirit and concepts of the present application are deemed to be included within the scope of the present application.
Claims (6)
1. The current detection circuit based on the Hall sensor is characterized by comprising a current sensor sign removing circuit, an upper limit voltage generating circuit, a return difference analog-to-digital conversion circuit and a relay control circuit, wherein the input end of the current sensor sign removing circuit is used as the input end of the current detection circuit to be connected with a current transformer of an IGBT power module, the output end of the current sensor sign removing circuit is connected with the first input end of the return difference analog-to-digital conversion circuit, and the current sensor sign removing circuit is used for collecting the tested current of the current transformer and outputting a negative value of the absolute value of a potential, wherein the potential is in direct proportion to the tested current; the input end of the upper limit voltage generating circuit is connected with the input voltage, the output end of the upper limit voltage generating circuit is connected with the second input end of the return difference analog-to-digital conversion circuit, and the upper limit voltage generating circuit is used for generating an upper limit voltage which is a positive voltage; the output end of the return analog-to-digital conversion circuit is connected with the input end of the relay control circuit, the return analog-to-digital conversion circuit is used for generating a lower limit voltage, comparing the potential absolute value with the lower limit voltage and the upper limit voltage respectively, judging the voltage range of the potential absolute value, and outputting digital quantity for controlling the relay in the relay control circuit to be opened and closed; the output end of the relay control circuit is used as the output end of the current detection circuit to be connected with external equipment and used for outputting an alarm signal to the outside;
the second input end of the fourth operational amplifier is connected with the upper limit voltage through a twelfth resistor, the non-inverting input end of the fourth operational amplifier is grounded through an eleventh resistor, the non-inverting input end of the fourth operational amplifier is also connected with the output end of the fourth operational amplifier through a thirteenth resistor, the output end of the fourth operational amplifier is connected with the non-inverting input end of a first voltage comparator, the output end of the fourth operational amplifier is also connected with the non-inverting input end of a second voltage comparator through a fourteenth resistor, the non-inverting input end of the second voltage comparator is also grounded through a fifteenth resistor, the non-inverting input end of the first voltage comparator is connected with the non-inverting input end of the second voltage comparator, the connected end of the fourth operational amplifier is connected with the negative value of the potential absolute value through a sixteenth resistor, the output end of the first voltage comparator is connected with the non-inverting input end of a seventeenth resistor, the non-inverting input end of the second voltage comparator is connected with the second comparator through a sixteenth resistor, the non-inverting input end of the second voltage comparator is connected with the second comparator, the non-inverting input end of the second comparator is connected with the non-inverting input end of the second comparator, the output end of the output comparator is connected with the input value of the input circuit;
the resistance value of the eleventh resistor is equal to that of the thirteenth resistor, the amplification multiple of the fourth operational amplifier is-1, the fourth operational amplifier outputs a negative upper limit voltage, and the voltage value of the lower limit voltage is 0.93 times of that of the upper limit voltage; the first voltage comparator is used for comparing the potential absolute value with the upper limit voltage, and the second voltage comparator is used for comparing the potential absolute value with the lower limit voltage; when the current transformer is over-current and the potential absolute value is larger than the upper limit voltage, the first voltage comparator and the second voltage comparator both output high level, and the third NAND gate outputs high level; when the current transformer is close to overcurrent, the absolute value of the potential is larger than the lower limit voltage and smaller than or equal to the upper limit voltage, a buffer area is formed between the upper limit voltage and the lower limit voltage, the first voltage comparator outputs a low level, the second voltage comparator outputs a high level, and the third NAND gate keeps the output state at the last moment; and when the current of the converter is normal and the potential absolute value is smaller than or equal to the lower limit voltage, the first voltage comparator and the second voltage comparator both output a low level, and the third NAND gate outputs a low level.
2. The hall sensor-based current detection circuit according to claim 1, wherein the current sensor symbol removal circuit comprises a current sensor, three operational amplifiers, a first NOT gate, a first switch and a second switch, wherein an input terminal of the current sensor is used as an input terminal of the current sensor symbol removal circuit to be connected with the current transformer, a detected current is input, an output terminal of the current sensor is connected with an inverting input terminal of a first operational amplifier through a third resistor, the output terminal outputs a potential proportional to the detected current, an inverting input terminal of the first operational amplifier is further connected with an output terminal of the first operational amplifier through a fourth resistor, an in-phase input terminal of the first operational amplifier is connected with a common terminal of a first resistor and a second resistor in series, the other end of the first resistor is connected with a negative electrode of a power supply, an output terminal of the first operational amplifier is connected with an inverting input terminal of a second operational amplifier through a fifth resistor, an output terminal of the second operational amplifier is further connected with an inverting input terminal of the first operational amplifier through a third resistor, an inverting input terminal of the second operational amplifier is further connected with an inverting input terminal of the third resistor, an inverting input terminal of the first operational amplifier is further connected with an inverting terminal of the first operational amplifier, an inverting terminal of the first operational amplifier is further connected with an inverting terminal of the first resistor, an inverting terminal of the first operational amplifier is further connected with the first output terminal is further connected with the third resistor, the inverting terminal is further connected with the first resistor, the first output terminal is further connected with the first resistor is connected with the inverting terminal is connected with the output terminal is further connected with the first resistor, the output end of the third operational amplifier is also connected with the second selection end of the second switch through the first NOT gate, and the common end of the first switch and the common end of the second switch are used as the output end of the current sensor symbol removing circuit and are connected with the first input end of the return difference analog-to-digital conversion circuit.
3. The hall sensor-based current detection circuit according to claim 2, wherein the first resistor and the second resistor take voltage values close to but not zero, the resistance value of the third resistor is equal to the resistance value of the fourth resistor, the amplification factor of the first op-amp is-1, and the first op-amp outputs a negative potential; the second operational amplifier and the third operational amplifier are inverting operational amplifiers, the resistance of the fifth resistor is equal to the resistance of the sixth resistor, the resistance of the eighth resistor is equal to the resistance of the ninth resistor, the second operational amplifier outputs potential, and the third operational amplifier outputs negative potential; when the potential is greater than zero, the first switch outputs a negative potential, while the second switch is turned off, and when the potential is less than zero, the second switch outputs a potential, while the first switch is turned off, the output end of the current sensor unsigned circuit outputs a negative value of the absolute value of the potential.
4. The hall sensor-based current detection circuit according to claim 1, wherein the upper limit voltage generation circuit comprises a voltage stabilizing tube, a twenty-third resistor and a twenty-fourth resistor, a first end of the twenty-third resistor is used as an input end of the upper limit voltage generation circuit to be connected with the input voltage, a second end of the twenty-third resistor is respectively connected with a cathode of the voltage stabilizing tube and a first end of the twenty-fourth resistor, an anode of the voltage stabilizing tube and a second end of the twenty-fourth resistor are grounded, and a common end of the twenty-third resistor and the twenty-fourth resistor is used as an output end of the upper limit voltage generation circuit to be connected with a second input end of the return difference analog-digital conversion circuit and output the upper limit voltage.
5. The hall sensor based current detection circuit of claim 1, wherein the relay control circuit comprises three not gates, a capacitor, a plurality of resistors, a diode, a trigger, an and gate, a MOS transistor, and a relay, and other devices except the relay constitute a driving circuit; the first end of the nineteenth resistor is used as the input end of the relay control circuit to access the digital quantity, the second end of the nineteenth resistor is sequentially connected with the reset end of the trigger through a second NOT gate, a capacitor, the first end of the twentieth resistor, a diode anode and a third NOT gate, the second end of the twentieth resistor and the diode cathode are both connected with the positive electrode of a power supply, the second end of the nineteenth resistor is also connected with the input end of the trigger, the reverse output end of the trigger and the digital quantity are respectively connected with two input ends of the AND gate, the output end of the AND gate is grounded through the twenty first resistor and the twenty second resistor which are connected in series, the output end of the AND gate is also connected with the clock end of the trigger through a fourth NOT gate, the grid electrode of the MOS tube is connected with the common end of the twenty first resistor and the twenty second resistor, the drain electrode of the relay coil is connected with the negative electrode of the relay coil, the positive electrode of the relay coil is connected with the input voltage, and the switch of the relay is used as the output end of the relay control circuit to be connected with external equipment;
when the current transformer is over-current and the potential absolute value is larger than the upper limit voltage, the digital quantity is changed from low level to high level, and the reset end of the trigger is reset due to short high level caused by charging and discharging of the capacitor, wherein the high level holding time of the reset end is determined according to the capacitor value; the reset reverse output end of the trigger outputs a high level, if the digital quantity is still high level, the AND gate outputs a high level, the MOS tube is conducted, the relay coil is electrified, and the switch is closed to output an alarm signal; and otherwise, when the digital quantity is changed from high level to low level, the AND gate outputs low level, the MOS tube is disconnected, and the relay switch is disconnected.
6. The hall sensor-based current detection circuit of claim 2, wherein the current sensor is implemented based on a CSLA2DG model hall sensor with a precision of ± 0.02%/°c.
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CN114137452A (en) * | 2021-11-26 | 2022-03-04 | 南京新捷中旭微电子有限公司 | Hall integrated circuit with high stability |
CN114089024B (en) | 2022-01-20 | 2022-04-26 | 成都齐碳科技有限公司 | Current measuring circuit, measuring method and nanopore sequencing device |
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