CN112637656A - Channel configuration method and device, electronic equipment and readable storage medium - Google Patents
Channel configuration method and device, electronic equipment and readable storage medium Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 33
- 230000001360 synchronised effect Effects 0.000 claims abstract description 34
- 238000011084 recovery Methods 0.000 claims description 20
- 238000012549 training Methods 0.000 claims description 13
- 238000001514 detection method Methods 0.000 claims description 6
- 230000037361 pathway Effects 0.000 claims 1
- 108091006146 Channels Proteins 0.000 abstract description 59
- 230000006870 function Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 8
- 238000004891 communication Methods 0.000 description 5
- 238000005192 partition Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 3
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- 230000003287 optical effect Effects 0.000 description 2
- 230000005236 sound signal Effects 0.000 description 2
- 230000001413 cellular effect Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000010079 rubber tapping Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/442—Monitoring of processes or resources, e.g. detecting the failure of a recording device, monitoring the downstream bandwidth, the number of times a movie has been viewed, the storage space available from the internal hard disk
- H04N21/4424—Monitoring of the internal components or processes of the client device, e.g. CPU or memory load, processing speed, timer, counter or percentage of the hard disk space used
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/45—Management operations performed by the client for facilitating the reception of or the interaction with the content or administrating data related to the end-user or to the client device itself, e.g. learning user preferences for recommending movies, resolving scheduling conflicts
- H04N21/4508—Management of client data or end-user data
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Abstract
The invention provides a channel configuration method, a channel configuration device, electronic equipment and a readable storage medium, wherein the channel configuration method comprises the following steps: acquiring the color depth of a video data stream; detecting a vertical synchronous frequency and a horizontal synchronous frequency of the video data stream; obtaining the total video bandwidth according to the color depth, the vertical synchronous frequency and the horizontal synchronous frequency; the number of lanes is configured Vby1 based on the total bandwidth. The invention obtains the total bandwidth requirement by calculating the RGB pixel number and combining with detecting the vertical synchronous frequency and the horizontal synchronous frequency from the video data stream, and the Vby1 channel number is correspondingly configured, thereby realizing the automatic configuration of the channel number according to different system requirements to improve the flexibility, and the inactive channel can be forbidden in the low power consumption application, and Vby1 control signals are eliminated to save signal pins.
Description
Technical Field
The present invention relates to the field of data transmission channels, and in particular, to a channel configuration method and apparatus, an electronic device, and a readable storage medium.
Background
The system on chip of the video device requires the use of the Vby1 channel to generate high speed output signals for the LCD driver. In the prior art, the Vby1 channels cannot be automatically configured according to the total bandwidth requirement, which results in the waste of signal pins in the Vby1 channels.
Disclosure of Invention
The invention provides a channel configuration method, a channel configuration device, electronic equipment and a readable storage medium, and aims to solve the problem that pins in a Vby1 channel are wasted because Vby1 channels cannot be automatically configured correspondingly according to the total bandwidth requirement.
According to a first aspect of the present invention, there is provided a channel configuration method comprising: receiving a video data stream; locking the video data stream by a clock data recovery circuit; acquiring the color depth of the video data stream; detecting a vertical synchronous frequency and a horizontal synchronous frequency of the video data stream; obtaining the total video bandwidth according to the color depth, the vertical synchronous frequency and the horizontal synchronous frequency; the number of lanes is configured Vby1 based on the total bandwidth.
In some embodiments, the step of obtaining the color depth comprises: receiving a data enabling signal, and calculating the RGB pixel number of the video data stream during an alignment sequence; and obtaining the color depth based on the RGB pixel number.
In some embodiments, in the step of calculating the number of RGB pixels of the video data stream during the alignment sequence upon receiving the data enable signal, the method comprises: deserializing serial data in the video stream data to obtain parallel data; descrambling or unpacking the parallel data to obtain descrambled or unpacked data; and calculating the RGB pixel number according to the descrambling or unpacking data.
In some embodiments, the step of detecting the vertical synchronization frequency and the horizontal synchronization frequency of the video data stream includes: obtaining data information representing a frame rate according to the video data stream; and detecting the vertical synchronization frequency and the horizontal synchronization frequency according to the data information.
In some embodiments, the obtaining of the total bandwidth according to the color depth, the vertical synchronization frequency and the horizontal synchronization frequency includes: calculating the total bandwidth by the following formula: BW, where BW represents the total bandwidth, Depth represents the color Depth, Vsync represents the vertical synchronization frequency, and Hsync represents the horizontal synchronization frequency.
In some embodiments, the step of configuring Vby1 the number of lanes according to the total bandwidth includes: obtaining Vby1 channel requirements corresponding to the total bandwidth through table lookup; configuring the number of Vby1 channels according to the Vby1 channel requirements.
According to a second aspect of the present invention, there is provided an Vby1 lane configuration device, comprising: the receiving module is used for receiving a video data stream; the locking module is used for locking the video data stream acquisition module through a clock data recovery circuit and is used for acquiring the color depth of the video data stream; the detection module is used for detecting the vertical synchronization frequency and the horizontal synchronization frequency of the video data stream; an obtaining module, configured to obtain a total bandwidth according to the color depth, the vertical synchronization frequency, and the horizontal synchronization frequency; and the configuration module is used for configuring Vby1 the channel number according to the total bandwidth.
In some embodiments, the receiving terminal of the Vby1 lane in the lane configuration device comprises: a clock data recovery circuit for receiving a clock data recovery training mode signal and recovering a clock signal embedded in the clock data recovery training mode signal; the deserializer is connected with the clock data recovery circuit and is used for converting serial data in the received video stream data into parallel data; the descrambler or the unpacker is connected with the deserializer and used for recovering scrambled data in the parallel data into original data or dividing the scrambled data into pixel data, control data and timing data to obtain descrambled or unpacked data; the sequencer is connected with the descrambler or the unpacker and used for carrying out serialization on descrambled or unpacked data and then sending the data to the display equipment; the color depth counter is connected with the clock data recovery circuit and the descrambler or the unpacker, and is used for receiving a data enable signal, calculating the RGB pixel number of the video data stream in the alignment sequence period and obtaining the color depth based on the RGB pixel number; a synchronous signal detector connected with the clock data recovery circuit and the descrambler or the unpacker, wherein the synchronous signal detector is used for receiving a data enable signal and detecting the vertical synchronous frequency and the horizontal synchronous frequency of the video data stream; a total bandwidth calculator connected to the color depth counter and the synchronization signal detector, the total bandwidth calculator being configured to calculate a total video bandwidth according to the color depth, the vertical synchronization frequency, and the horizontal synchronization frequency.
According to a third aspect of the present invention, there is provided an electronic device comprising a processor, a memory, and a program or instructions stored on the memory and executable on the processor, the program or instructions when executed by the processor implementing the steps of the Vby1 channel configuration method as described above.
According to a fourth aspect of the present invention, there is provided a readable storage medium on which is stored a program or instructions which, when executed by a processor, implements the Vby1 channel configuration method as described above.
Compared with the prior art, the invention has the beneficial effects that: by calculating the number of RGB pixels, detecting the vertical synchronization frequency and the horizontal synchronization frequency from the video data stream to obtain the total bandwidth requirement and correspondingly configuring Vby1 channel numbers, the channel numbers can be automatically configured according to different system requirements to improve flexibility, inactive channels can be forbidden in low-power-consumption application, Vby1 control signals are eliminated, and signal pins are saved.
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Fig. 1 is a schematic flowchart illustrating steps of a channel configuration method according to an embodiment of the present invention.
FIG. 2 is a timing diagram of the Vby1 channel according to the present invention.
Fig. 3 is a circuit diagram of a reception terminal of the Vby1 channel according to the present invention.
Fig. 4 is a schematic structural diagram of a channel configuration device according to an embodiment of the present invention.
Fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
FIG. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, an embodiment of the present invention provides a channel configuration method, which includes steps S11 to S14.
Step S11, receiving the video data stream.
Step S12, the video data stream is locked by the clock data recovery circuit.
In step S13, the color depth of the video data stream is obtained.
In the embodiment of the present invention, the acquiring the color depth of the video data stream specifically includes: receiving a data enabling signal, and calculating the RGB pixel number of the video data stream during an alignment sequence; and obtaining the color depth based on the RGB pixel number.
As shown in FIG. 2, an embodiment of the present invention provides a timing diagram for the Vby1 channel.
Upon receiving a video Data stream, a Clock Data Recovery (CDR) circuit receives the CDR training mode signal and locks the phase and frequency of its output. The CDR circuit reduces the auxiliary signal LOCKN to a low level. When the auxiliary signal LOCKN is lowered to a low level, the transmitting terminal of the Vby1 channel transmits the alignment Training pattern signal ALN Training to the receiving terminal of the Vby1 channel during the alignment sequence, and then transmits pixel data displayed on the display device to the receiving terminal. The number of bits of the pixel data sent to the alignment Training pattern signal ALN Training is counted to obtain the number of RGB pixels. The alignment data ALNDATA not displayed on the display device is transmitted to the alignment training mode signal.
The 32 pixel data PIX are transmitted during a high level of the data enable signal DE, and the 32 pixel data PIX are transmitted during a low level of the data enable signal DE. One pixel data includes red (R) data, green (G) data, and blue (B) data. When each of R, G and B data is 8 bits, the data bit depth is 24 bits/3 bytes. When each of R, G and B data is 10 bits, the data bit depth is 30 bits/4 bytes. When the receiving terminal counts the number of bits of the pixel data in the alignment training pattern signal, the number of RGB pixels can be obtained.
Step S14, detecting a vertical synchronization frequency and a horizontal synchronization frequency of the video data stream.
In this embodiment of the present invention, detecting the vertical synchronization frequency and the horizontal synchronization frequency of the video data stream specifically includes: obtaining data information representing a frame rate according to the video data stream; and detecting the vertical synchronization frequency and the horizontal synchronization frequency according to the data information.
And step S15, obtaining the total video bandwidth according to the color depth, the vertical synchronous frequency and the horizontal synchronous frequency.
In the embodiment of the present invention, the total bandwidth is calculated by the following formula:
BW, where BW represents the total bandwidth, Depth represents the color Depth, Vsync represents the vertical synchronization frequency, and Hsync represents the horizontal synchronization frequency.
Step S16, configuring Vby1 number of channels according to the total bandwidth.
In this embodiment of the present invention, configuring Vby1 the number of channels according to the total bandwidth specifically includes: obtaining Vby1 channel requirements corresponding to the total bandwidth through table lookup; configuring the number of Vby1 channels according to the Vby1 channel requirements.
Referring to fig. 3, a circuit diagram of a receiving terminal of Vby1 channels is provided in the embodiment of the present invention, and the receiving terminal includes a CDR circuit 31, an deserializer 32, a descrambler or unpacker 33, a sequencer 34, a color depth counter 35, a synchronization signal detector 36, and a total bandwidth calculator 37.
During initialization after power-up of the Vby1 channel, the CDR circuit 31 receives the CDR training pattern signal and recovers the clock signal embedded in the CDR training pattern signal. When the phase and frequency of the recovered clock signal are locked, the CDR circuit 31 turns the auxiliary signal LOCKN to a low level, and the frequency of the clock signal recovered by the CDR circuit 31 is generated to the same frequency as the data rate of the pixel data. Thus, the count of the clock signal output from the CDR circuit 31 can obtain the number of RGB pixels associated with the pixel data.
The deserializer 32 converts serial data in the received video stream data into parallel data.
The descrambler or unpacker 33 recovers the scrambled data from the transmission terminal into the original data or divides into pixel data, control data, and timing data, resulting in descrambled or unpacked data.
The serializer 34 serializes the descrambled or unpacked data and sends the serialized or unpacked data to the display device.
The color depth counter 35 receives the data enable signal DE from the descrambler or depacketizer 33 and receives a clock signal generated by the CDR circuit 31. Receiving the data enable signal, the color depth counter 35 counts bits of the pixel data or clock output from the CDR circuit 31 to obtain the number of RGB pixels.
The synchronization signal detector 36 receives the data enable signal DE from the descrambler or unpacker 33 and receives the clock signal generated by the CDR circuit 31. Upon receiving the data enable signal, the synchronization signal detector 36 receives the timing data output from the descrambler or depacketizer 33, resulting in a vertical synchronization frequency and a horizontal synchronization frequency.
The total bandwidth calculator 37 calculates the video total bandwidth based on the color depth, the vertical synchronization frequency, and the horizontal synchronization frequency.
The number of channels can be automatically configured according to different system requirements to improve flexibility, inactive channels can be disabled in low-power-consumption application, Vby1 control signals are eliminated, and signal pins, such as pins corresponding to COL0/1 and SDSEL control signals, are saved.
As shown in fig. 4, an embodiment of the present invention provides a channel configuration apparatus, which includes a receiving module 41, a locking module 42, an obtaining module 43, a detecting module 44, an obtaining module 45, and a configuration module 46.
The receiving module 41 is configured to receive the video data stream.
The locking module 42 is used to lock the video data stream through the clock data recovery circuit.
The obtaining module 43 is used for obtaining the color depth of the video data stream.
In the embodiment of the present invention, the acquiring the color depth of the video data stream specifically includes: receiving a data enabling signal, and calculating the RGB pixel number of the video data stream during an alignment sequence; and obtaining the color depth based on the RGB pixel number.
In some embodiments, prior to obtaining the color depth of the video data stream, comprises receiving the video data stream; the video data stream is locked by a clock data recovery circuit.
The detection module 44 is configured to detect a vertical synchronization frequency and a horizontal synchronization frequency of the video data stream.
In this embodiment of the present invention, detecting the vertical synchronization frequency and the horizontal synchronization frequency of the video data stream specifically includes: obtaining data information representing a frame rate according to the video data stream; and detecting the vertical synchronization frequency and the horizontal synchronization frequency according to the data information.
The obtaining module 45 is configured to obtain a total video bandwidth according to the color depth, the vertical synchronization frequency, and the horizontal synchronization frequency.
In the embodiment of the present invention, the total bandwidth is calculated by the following formula:
BW, where BW represents the total bandwidth, Depth represents the color Depth, Vsync represents the vertical synchronization frequency, and Hsync represents the horizontal synchronization frequency.
The step configuration module 46 is configured Vby1 the number of lanes based on the total bandwidth.
In this embodiment of the present invention, configuring Vby1 the number of channels according to the total bandwidth specifically includes: obtaining Vby1 channel requirements corresponding to the total bandwidth through table lookup; configuring the number of Vby1 channels according to the Vby1 channel requirements.
Referring to fig. 5, an embodiment of the invention further provides an electronic device 500, where the electronic device 500 may be a mobile phone, a tablet, a computer, or the like. As shown in fig. 5, the electronic device 500 includes a processor 501, a memory 502. The processor 501 is electrically connected to the memory 502.
The processor 501 is a control center of the electronic device 500, connects various parts of the whole electronic device by using various interfaces and lines, executes various functions of the electronic device and processes data by running or loading an application program stored in the memory 502 and calling the data stored in the memory 502, thereby performing overall monitoring of the electronic device.
In this embodiment, the electronic device 500 is provided with a plurality of memory partitions, where the plurality of memory partitions includes a system partition and a target partition, and the processor 501 in the electronic device 500 loads instructions corresponding to processes of one or more application programs into the memory 502 according to the following steps, and the processor 501 runs the application programs stored in the memory 502, so as to implement various functions:
acquiring the color depth of a video data stream;
detecting a vertical synchronous frequency and a horizontal synchronous frequency of the video data stream;
obtaining the total video bandwidth according to the color depth, the vertical synchronous frequency and the horizontal synchronous frequency;
the number of lanes is configured Vby1 based on the total bandwidth.
Referring to fig. 6, fig. 6 is a specific block diagram of an electronic device 600 according to an embodiment of the present invention, where the electronic device 600 may be used to implement the channel configuration method provided in the foregoing embodiment. The electronic device 600 may be a mobile phone or a tablet. The electronic device 600 also includes the following components.
The RF circuit 610 is used for receiving and transmitting electromagnetic waves, and performs interconversion between the electromagnetic waves and electrical signals, thereby communicating with a communication network or other devices. RF circuit 610 may include various existing circuit elements for performing these functions, such as an antenna, a radio frequency transceiver, a digital signal processor, an encryption/decryption chip, a Subscriber Identity Module (SIM) card, memory, and so forth. The RF circuit 610 may communicate with various networks such as the internet, an intranet, a wireless network, or with other devices over a wireless network. The wireless network may comprise a cellular telephone network, a wireless local area network, or a metropolitan area network. The Wireless network may use various Communication standards, protocols, and technologies, including, but not limited to, Global System for Mobile Communication (GSM), Enhanced Data GSM Environment (EDGE), Wideband Code Division Multiple Access (WCDMA), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Wireless Fidelity (Wi-Fi) (e.g., IEEE802.11a, IEEE802.11 b, IEEE 802.2.access, and/or IEEE802.11 n), Voice over Internet Protocol (VoIP), world wide Internet Microwave Access (Microwave for Wireless Communication), other suitable protocols for short message service (Max), and any other suitable protocols, and may even include those protocols that have not yet been developed.
The memory 620 may be used to store software programs and modules, such as program instructions/modules corresponding to the channel configuration method in the above-described embodiments, and the processor 680 executes various functional applications and data processing by executing the software programs and modules stored in the memory 620, that is, functions of the channel configuration method are implemented. The memory 620 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 620 can further include memory located remotely from the processor 680, which can be connected to the electronic device 600 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input unit 630 may be used to receive input numeric or character information and generate keyboard, mouse, joystick, optical or trackball signal inputs related to user settings and function control. In particular, the input unit 630 may include a touch sensitive surface 631 as well as other input devices 632. The touch sensitive surface 631, also referred to as a touch display screen or a touch pad, may collect touch operations by a user (e.g., operations by a user on the touch sensitive surface 631 or near the touch sensitive surface 631 using any suitable object or attachment such as a finger, a stylus, etc.) on or near the touch sensitive surface 631 and drive the corresponding connection device according to a predetermined program. Alternatively, the touch sensitive surface 631 may comprise two parts, a touch detection means and a touch controller. The touch detection device detects the touch direction of a user, detects a signal brought by touch operation and transmits the signal to the touch controller; the touch controller receives touch information from the touch sensing device, converts the touch information into touch point coordinates, sends the touch point coordinates to the processor 680, and can receive and execute commands sent by the processor 680. In addition, the touch sensitive surface 631 may be implemented using various types of resistive, capacitive, infrared, and surface acoustic waves. The input unit 630 may include other input devices 632 in addition to the touch-sensitive surface 631. In particular, other input devices 632 may include, but are not limited to, one or more of a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, a joystick, and the like.
The display unit 640 may be used to display information input by or provided to a user and various graphical user interfaces of the electronic device 600, which may be made up of graphics, text, icons, video, and any combination thereof. The Display unit 640 may include a Display panel 641, and optionally, the Display panel 641 may be configured in the form of an LCD (Liquid Crystal Display), an OLED (Organic Light-Emitting Diode), or the like. Further, the touch-sensitive surface 631 may overlay the display panel 641, and when the touch-sensitive surface 631 detects a touch operation thereon or nearby, the touch operation is transmitted to the processor 680 to determine the type of the touch event, and then the processor 680 provides a corresponding visual output on the display panel 641 according to the type of the touch event. Although in FIG. 6, the touch-sensitive surface 631 and the display panel 641 are implemented as two separate components to implement input and output functions, in some embodiments, the touch-sensitive surface 631 and the display panel 641 may be integrated to implement input and output functions.
The electronic device 600 may also include at least one sensor 650, such as light sensors, motion sensors, and other sensors. Specifically, the light sensor may include an ambient light sensor that may adjust the brightness of the display panel 641 according to the brightness of ambient light, and a proximity sensor that may turn off the display panel 641 and/or the backlight when the electronic device 600 is moved to the ear. As one of the motion sensors, the gravity acceleration sensor can detect the magnitude of acceleration in each direction (generally, three axes), can detect the magnitude and direction of gravity when the mobile phone is stationary, and can be used for applications of recognizing the posture of the mobile phone (such as horizontal and vertical screen switching, related games, magnetometer posture calibration), vibration recognition related functions (such as pedometer and tapping), and the like; as for other sensors such as a gyroscope, a barometer, a hygrometer, a thermometer, and an infrared sensor, which can be configured in the electronic device 600, further description is omitted here.
The electronic device 600, via the transport module 670 (e.g., a Wi-Fi module), may assist a user in emailing, browsing web pages, accessing streaming media, etc., which provides wireless broadband internet access to the user. Although fig. 6 shows the transmission module 670, it is understood that it does not belong to the essential constitution of the electronic device 600 and may be omitted entirely as needed within the scope not changing the essence of the invention.
The processor 680 is a control center of the electronic device 600, connects various parts of the entire mobile phone using various interfaces and lines, and performs various functions of the electronic device 600 and processes data by operating or executing software programs and/or modules stored in the memory 620 and calling data stored in the memory 620, thereby monitoring the mobile phone as a whole. Optionally, processor 680 may include one or more processing cores; in some embodiments, processor 680 may integrate an application processor, which handles primarily the operating system, user interface, applications, etc., and a modem processor, which handles primarily wireless communications. It will be appreciated that the modem processor described above may not be integrated into processor 680.
Electronic device 600 also includes a power supply 690 (e.g., a battery) that provides power to the various components, and in some embodiments may be logically coupled to processor 680 via a power management system that may perform functions such as managing charging, discharging, and power consumption. The power supply 690 may also include any component including one or more dc or ac power sources, recharging systems, power failure detection circuitry, power converters or inverters, power status indicators, and the like.
Although not shown, the electronic device 600 may further include a camera (e.g., a front camera, a rear camera), a bluetooth module, and the like, which are not described in detail herein. Specifically, in this embodiment, the display unit of the electronic device is a touch screen display, the electronic device further includes a memory, and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs include instructions for:
acquiring the color depth of a video data stream;
detecting a vertical synchronous frequency and a horizontal synchronous frequency of the video data stream;
obtaining the total video bandwidth according to the color depth, the vertical synchronous frequency and the horizontal synchronous frequency;
the number of lanes is configured Vby1 based on the total bandwidth.
In specific implementation, the above modules may be implemented as independent entities, or may be combined arbitrarily to be implemented as the same or several entities, and specific implementation of the above modules may refer to the foregoing method embodiments, which are not described herein again.
It will be understood by those skilled in the art that all or part of the steps of the methods of the above embodiments may be performed by instructions or by instructions controlling associated hardware, and the instructions may be stored in a computer readable storage medium and loaded and executed by a processor. To this end, the present invention provides a readable storage medium, in which a plurality of instructions are stored, where the instructions can be loaded by a processor to execute the steps in any one of the channel configuration methods provided by the present invention.
Wherein the readable storage medium may include: read Only Memory (ROM), Random Access Memory (RAM), magnetic or optical disks, and the like.
Since the instructions stored in the readable storage medium can execute the steps in any channel configuration method provided in the embodiment of the present invention, the beneficial effects that can be achieved by any channel configuration method provided in the embodiment of the present invention can be achieved, for details, see the foregoing embodiments, and are not described herein again. The above operations can be implemented in the foregoing embodiments, and are not described in detail herein.
The invention has the beneficial effects that: the invention obtains the total bandwidth requirement by calculating the RGB pixel number and combining with detecting the vertical synchronous frequency and the horizontal synchronous frequency from the video data stream, and the Vby1 channel number is correspondingly configured, thereby realizing the automatic configuration of the channel number according to different system requirements to improve the flexibility, and the inactive channel can be forbidden in the low power consumption application, and Vby1 control signals are eliminated to save signal pins.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The channel configuration method, the channel configuration device, the electronic device, and the readable storage medium according to the embodiments of the present invention are described in detail above, and a specific example is applied in the description to explain the principle and the implementation of the present invention, and the description of the above embodiments is only used to help understanding the technical solution and the core idea of the present invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A method for channel configuration, comprising:
receiving a video data stream;
locking the video data stream by a clock data recovery circuit;
acquiring the color depth of the video data stream;
detecting a vertical synchronous frequency and a horizontal synchronous frequency of the video data stream;
obtaining the total video bandwidth according to the color depth, the vertical synchronous frequency and the horizontal synchronous frequency;
the number of lanes is configured Vby1 based on the total bandwidth.
2. The channel configuration method according to claim 1, wherein in the step of obtaining the color depth, the method comprises:
receiving a data enabling signal, and calculating the RGB pixel number of the video data stream during an alignment sequence;
and obtaining the color depth based on the RGB pixel number.
3. The channel configuration method of claim 2, wherein in the step of calculating the number of RGB pixels of the video data stream during the alignment sequence upon receiving the data enable signal, comprises:
deserializing serial data in the video stream data to obtain parallel data;
descrambling or unpacking the parallel data to obtain descrambled or unpacked data;
and calculating the RGB pixel number according to the descrambling or unpacking data.
4. The channel allocation method as claimed in claim 1, wherein the step of detecting the vertical sync frequency and the horizontal sync frequency of the video data stream comprises:
obtaining data information representing a frame rate according to the video data stream;
and detecting the vertical synchronization frequency and the horizontal synchronization frequency according to the data information.
5. The channel configuration method according to claim 1, wherein the step of obtaining the total bandwidth according to the color depth, the vertical synchronization frequency, and the horizontal synchronization frequency comprises:
calculating the total bandwidth by the following formula:
BW, where BW represents the total bandwidth, Depth represents the color Depth, Vsync represents the vertical synchronization frequency, and Hsync represents the horizontal synchronization frequency.
6. The channel configuration method of claim 1, wherein in the step of configuring Vby1 the number of channels based on the total bandwidth, comprises:
obtaining Vby1 channel requirements corresponding to the total bandwidth through table lookup;
configuring the number of Vby1 channels according to the Vby1 channel requirements.
7. A pathway configuration device, comprising:
the receiving module is used for receiving a video data stream;
a locking module for locking the video data stream by the clock data recovery circuit
The acquisition module is used for acquiring the color depth of the video data stream;
the detection module is used for detecting the vertical synchronization frequency and the horizontal synchronization frequency of the video data stream;
an obtaining module, configured to obtain a total bandwidth according to the color depth, the vertical synchronization frequency, and the horizontal synchronization frequency;
and the configuration module is used for configuring Vby1 the channel number according to the total bandwidth.
8. The lane configuration device of claim 7, wherein the receive terminal of the Vby1 lane in the lane configuration device comprises:
a clock data recovery circuit for receiving a clock data recovery training mode signal and recovering a clock signal embedded in the clock data recovery training mode signal;
the deserializer is connected with the clock data recovery circuit and is used for converting serial data in the received video stream data into parallel data;
the descrambler or the unpacker is connected with the deserializer and used for recovering scrambled data in the parallel data into original data or dividing the scrambled data into pixel data, control data and timing data to obtain descrambled or unpacked data;
the sequencer is connected with the descrambler or the unpacker and used for carrying out serialization on descrambled or unpacked data and then sending the data to the display equipment;
the color depth counter is connected with the clock data recovery circuit and the descrambler or the unpacker, and is used for receiving a data enable signal, calculating the RGB pixel number of the video data stream in the alignment sequence period and obtaining the color depth based on the RGB pixel number;
a synchronous signal detector connected with the clock data recovery circuit and the descrambler or the unpacker, wherein the synchronous signal detector is used for receiving a data enable signal and detecting the vertical synchronous frequency and the horizontal synchronous frequency of the video data stream;
a total bandwidth calculator connected to the color depth counter and the synchronization signal detector, the total bandwidth calculator being configured to calculate a total video bandwidth according to the color depth, the vertical synchronization frequency, and the horizontal synchronization frequency.
9. An electronic device comprising a processor, a memory, and a program or instructions stored on the memory and executable on the processor, the program or instructions when executed by the processor implementing the steps of the channel configuration method as claimed in any one of claims 1 to 6.
10. A readable storage medium, on which a program or instructions are stored, which when executed by a processor, implement the channel configuration method of any one of claims 1 to 6.
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| WO2022127790A1 (en) * | 2020-12-15 | 2022-06-23 | 海宁奕斯伟集成电路设计有限公司 | Channel configuration method and apparatus, electronic device, and readable storage medium |
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