CN112636176A - Chip processing method, chip and laser - Google Patents
Chip processing method, chip and laser Download PDFInfo
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- CN112636176A CN112636176A CN202011614713.9A CN202011614713A CN112636176A CN 112636176 A CN112636176 A CN 112636176A CN 202011614713 A CN202011614713 A CN 202011614713A CN 112636176 A CN112636176 A CN 112636176A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/223—Buried stripe structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/12—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
- H01S5/34313—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser with a well layer having only As as V-compound, e.g. AlGaAs, InGaAs
Abstract
This application generally relates to laser technical field, specifically relates to a chip processing method, chip and laser instrument, and the chip adopts this chip processing method to process and forms, and this chip is installed to the laser instrument, and the chip processing method includes: processing a chip layer group on a substrate, removing part of the chip layer group to form a waveguide area, processing the covering layer in a growth mode, processing the covering layer of the waveguide area into a waveguide strip with the end surface facing the chip layer group, removing one side part of the waveguide strip facing the chip layer group to form a gap between the waveguide strip and the chip layer group, processing a waveguide cladding, removing the chip layer group and the waveguide cladding corresponding to the gap, and shaping laser emitted by the chip layer group by the waveguide strip to enable the light spot of the emitted laser to be close to a circle, thereby improving the coupling efficiency of the laser and the optical fiber.
Description
Technical Field
The present application generally relates to the field of laser technology, and more particularly, to a chip processing method, a chip, and a laser.
Background
The conventional DFB laser chip mainly forms ion number reversal under the action of forward current through an InGaAlAs/InAlAs multilayer quantum well structure to form stimulated radiation to generate laser, performs specified wavelength screening through a Bragg grating to obtain narrow-linewidth laser, and emits the laser through the emitting end face of the laser chip.
Whereas the thickness of the multilayer quantum well for lasing is typically only a few tens of nanometers, while the width is determined primarily by the width of the ridge waveguide to which current is applied, whereas the ridge waveguide width of high-speed DFB laser chips is typically 2 to 3 μm, thereby causing the difference of at least dozens of times of the transverse-longitudinal width ratio of the laser emitting end face, because the transverse dimension of the prior DFB laser chip is much larger than the longitudinal dimension, therefore, the divergence angle of the spot shape emitted by the conventional DFB laser chip in the longitudinal direction is much larger than that in the transverse direction, therefore, the emergent light spots of the existing DFB laser chip are all oval light spots, while the fiber cores of the common coupling fibers are all round in size and are not matched with the oval light spots emergent from the end face of the DFB laser chip, therefore, the laser chip can be coupled to the transmission fiber in the process of coupling the emergent light of the laser chip to the transmission fiber, and the coupled light power is more lost due to the mismatching of the light spots.
Disclosure of Invention
In this summary, concepts in a simplified form are introduced that are further described in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
In order to solve the technical problem that the emergent light spot shape of a laser chip is not matched with the end face shape of an optical fiber core, the application mainly aims to provide a chip processing method, a chip and a laser.
In order to achieve the purpose of the invention, the following technical scheme is adopted in the application:
a method of chip processing comprising:
processing a chip layer group on a substrate;
removing part of the chip layer group to form a waveguide region;
processing the covering layer by a growth mode;
processing a covering layer of a waveguide area into a waveguide strip with an end face facing a chip layer group, and removing a part of the waveguide strip attached to the chip layer group to form a gap between the waveguide strip and the chip layer group;
and processing a waveguide cladding, and removing the chip layer group and the waveguide cladding corresponding to the gap.
Further, in some embodiments of the present application, the removing the portion of the chip layer group to form the waveguide region includes:
and removing part of the chip layer group from one side of the substrate to the other side of the substrate to form the waveguide region.
Further, in some embodiments of the present application, the processing the capping layer by growing includes:
the 0.5-2 μm cap layer is processed by vapor phase epitaxial growth.
Further, in some embodiments of the present application, the above-mentioned processing of the cladding layer of the waveguide region into the waveguide strip facing the chip layer group:
processing the covering layer of the waveguide area into a waveguide strip with a square cross section by a photoetching process and a dry etching process;
the side length of the cross section of the waveguide strip is 0.5-2 mu m.
Further, in some embodiments of the present application, the processing a chip layer group on the substrate includes:
sequentially processing buffer layers with the thickness of 1-1.5 mu m on the substrate;
processing a lower gradient buffer layer with the thickness of 10nm-100 nm;
processing a quantum well layer group with the thickness of 10nm-30 nm;
processing an upper gradient buffer layer with the thickness of 10nm-100 nm;
processing a grating epitaxial layer with the thickness of 10nm-50nm, and processing a grating by adopting an electron beam grating writing mode;
and processing the corrosion stop layer with the thickness of 10nm-50 nm.
Further, in some embodiments of the present application, the processing the waveguide cladding includes:
and sequentially processing the epitaxial layer and the contact epitaxial layer, and removing the epitaxial layer and the contact epitaxial layer in the waveguide region.
A chip, comprising:
a substrate having a chip region and a waveguide region;
the chip layer group is arranged in the chip area of the substrate;
the waveguide strip and the chip layer group are integrated in the waveguide area of the substrate at intervals, and the waveguide strip is used for guiding the light spot of the emergent laser to be approximately circular;
a waveguide cladding deposited on the waveguide strip.
Further, in some embodiments of the present application, the cross section of the waveguide strip is square, and the side length of the cross section of the waveguide strip is 0.5 μm to 2 μm;
the thickness of the waveguide cladding is 2-3 μm, and the refractive index of the waveguide strip is greater than that of the waveguide cladding.
Further, in some embodiments of the present application, the gap between the waveguide strip and the chip layer group is 1 μm to 5 μm.
A laser is provided with the chip.
According to the technical scheme, the chip processing method, the chip and the laser have the advantages and positive effects that:
the emergent light spot shape of the chip of the laser is improved, and the coupling efficiency of the chip of the laser and the optical fiber is improved.
This application provides a chip processing method on the one hand, at substrate processing chip layer group, gets rid of the part chip layer group forms the waveguide area, through growing mode processing overburden, processes into the terminal surface with the overburden in waveguide area towards the waveguide strip of chip layer group, will waveguide strip orientation one side part of chip layer group is got rid of, with the waveguide strip with form the clearance between the chip layer group, process the waveguide cladding, and remove the chip layer group reaches the waveguide cladding that the clearance corresponds, the waveguide strip is used for carrying out the plastic to the laser that the chip layer group sent, makes the facula of emergent laser be close circularly.
This application on the other hand provides a chip, and the chip includes substrate, chip layer group, waveguide strip and waveguide cladding, and the substrate has chip district and waveguide district, and the chip layer group set up in the chip district of substrate, the waveguide strip with chip layer group interval is integrated in the waveguide district of substrate, the light spot that the waveguide strip is used for guiding emergent laser is circular on an average, and the waveguide cladding deposit is in the waveguide strip, the chip emergent light spot shape of improvement improves laser instrument chip and optical fiber coupling efficiency.
The application still provides a laser instrument, and above-mentioned chip is installed to the laser instrument, and the facula of the waveguide strip guide outgoing laser of chip is circular on the whole, makes the outgoing light spot shape of laser instrument and optic fibre core terminal surface shape the same on the whole, improves laser instrument and optic fibre coupling efficiency.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a flow diagram illustrating a method of processing a chip according to an exemplary embodiment.
Fig. 2 is a schematic diagram of a growth cap layer of a chip processing method according to an exemplary embodiment.
Fig. 3 is a schematic illustration of a blanket process for a chip processing method according to an exemplary embodiment.
FIG. 4 is a schematic illustration of waveguide cladding growth illustrating a method of chip processing according to an exemplary embodiment.
FIG. 5 is a schematic illustration of waveguide cladding processing according to an exemplary embodiment illustrating a method of chip processing.
Fig. 6 is a schematic view of a growing epitaxial side and a contacting epitaxial layer of a chip processing method according to an exemplary embodiment.
Fig. 7 is a schematic view of epitaxial side and contact epitaxial layer processing illustrating a method of chip processing according to an exemplary embodiment.
Fig. 8 is a schematic diagram illustrating a chip structure according to an example embodiment.
Wherein the reference numerals are as follows:
100-a substrate; 200-chip layer group; 300-waveguide strips; 400-a cover layer; 500-waveguide cladding; 600-an epitaxial layer; 700-contacting the epitaxial layer; 800-upper negative electrode layer; 900 — lower negative electrode layer;
210-a buffer layer; 220-lower graded buffer layer; 230-quantum well layer group; 240-upper graded buffer layer; 250-a grating layer; 260-etch stop layer.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in the present application are within the scope of the present application without inventive efforts, and therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention but only to represent selected embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The application provides a chip processing method, chip and laser instrument, the chip adopts this chip processing method to process and forms, and this chip is installed to the laser instrument, and the chip processing method includes processing chip layer group 200 at substrate 100, gets rid of the part chip layer group 200 forms the waveguide district, processes overburden 400 through growing mode, processes the waveguide 400 of waveguide district into the waveguide strip 300 of terminal surface towards chip layer group 200, will waveguide strip 300 orientation one side part of chip layer group 200 is got rid of, so that waveguide strip 300 with form the clearance between the chip layer group 200, process waveguide cladding 500, and remove chip layer group 200 and the waveguide cladding 500 that the clearance corresponds, waveguide strip 300 is used for carrying out the plastic to the laser that chip layer group 200 sent, makes the facula of emergent laser be close to circularly.
In this embodiment, the chip processing method includes:
step 1: referring to fig. 1, a chip layer group 200 is processed on a substrate 100, and a waveguide region is formed on the substrate 100 by removing a portion of the chip layer group 200 from one side of the substrate 100 to the other side of the substrate 100.
Specifically, processing the chip layer group 200 on the substrate 100 by using the MOCVD equipment includes:
sequentially growing an InP buffer layer 210 with the thickness of 1-1.5 μm on the substrate 100; growing a 10nm-100nm thick InAlGaAs lower gradient buffer layer 220; growing a 10nm-30nm thick InAlAs/InAlGaAs quantum well layer group 230; growing an InAlGaAs upper gradient buffer layer 240 with the thickness of 10nm-100 nm; growing a grating epitaxial layer with the thickness of 10nm-50nm, and processing a grating by adopting an electron beam grating writing mode to form a grating layer 250; an InGaAsP etch stop layer 260 is grown to a thickness of 10nm to 50 nm.
As shown in fig. 1, a waveguide region is formed by removing a part of the chip layer group 200 by photolithography, ICP dry stage etching and wet etching, and the waveguide region has a length d in the laser emitting direction1The length of the chip layer group 200 is d2In this embodiment, d1Between 50 μm and 100 μm, d2In the range of 150 μm to 300. mu.m.
Step 2: referring to fig. 2, a cap layer 400 is grown over the waveguide region and the chip layer set 200.
Specifically, the InP clad layer 400 having a thickness of 0.5 μm to 2 μm is processed by vapor phase epitaxial growth using MOCVD equipment.
And step 3: referring to fig. 3, a cover layer 400 of a waveguide region is processed into a waveguide strip 300 whose end face faces a chip layer group 200, and portions of the waveguide strip 300 and the chip layer group 200 are removed to form a gap between the waveguide strip 300 and the chip layer group 200.
Specifically, the cover layer 400 of the waveguide region is processed into the waveguide strip 300 with a square cross section by adopting photoetching and ICP dry etching processes, the side length of the cross section of the waveguide strip 300 is 0.5-2 μm, the refractive index of the waveguide strip 300 is 3.1, and the gap definition d between the waveguide strip 300 and the chip layer group 200 is d3，d3Between 1 μm and 5 μm.
And 4, step 4: referring to fig. 4, a waveguide cladding 500 is fabricated.
Specifically, SiO is carried out by adopting PECVD equipment2The waveguide cladding 500 is deposited to a thickness of 2-3 μm, since the refractive index of the waveguide strip 300 is 3.1, SiO2The refractive index of the waveguide cladding 500 is 1.46, so that the waveguide strip 300 can be made of InP and SiO2 A waveguide cladding 500 is fabricated.
And 5: referring to fig. 5, the chip layer group 200 and the waveguide cladding 500 corresponding to the gap are removed.
Specifically, the waveguide layers on the upper portion and the gap portion of the chip layer group 200 are removed by photolithography and wet etching, and in this embodiment, the waveguide layers in the region corresponding to the gap are removed in the vertical laser emitting direction.
Step 6: referring to fig. 6, after processing the waveguide cladding layer 500, an epitaxial layer 600 and a contact epitaxial layer 700 are processed in sequence.
Specifically, an MOCVD device is adopted to firstly grow an InP epitaxial layer 600 with the thickness of 1-2 μm, and then an InGaAs contact epitaxial layer 700 with the thickness of 0.1-0.3 μm is grown.
And 7: referring to fig. 7, the epitaxial layer 600 and the contact epitaxial layer 700 corresponding to the waveguide region are removed.
Specifically, the InP epitaxial layer 600 and the InGaAs contact epitaxial layer 700 corresponding to the waveguide region are removed by photolithography and wet etching.
And then, combining the existing DFB laser chip manufacturing process, performing processes such as ridge waveguide back thinning, polishing, positive and negative electrodes, cleavage, end face coating and the like to form the final DFB laser chip with the waveguide structure, wherein in the step 7, an upper negative electrode layer 800 is processed on the InGaAs contact epitaxial layer 700 of the chip layer group 200, and a lower negative electrode layer 900 is processed at the bottom of the substrate 100.
In the embodiment, MOCVD is a novel vapor phase epitaxy growth technique developed on the basis of vapor phase epitaxy growth, which uses organic compounds of group iii and group ii elements, hydrides of group V and group vi elements, and the like as crystal growth source materials, and performs vapor phase epitaxy on a substrate 100 in a thermal decomposition reaction mode to grow thin layer single crystal materials of various group iii-V and group ii-vi compound semiconductors and their multiple solid solutions. In represents chemical element indium, P represents chemical element phosphorus, AI represents chemical element aluminum, Ga represents chemical element gallium, As represents chemical element arsenic, PECVD equipment plasma enhanced chemical vapor deposition equipment, and the DFB laser is a distributed feedback laser.
The embodiment also provides a chip, and it is shown in combination with fig. 7 and 8 that the chip includes substrate 100, chip layer group, waveguide strip 300 and waveguide cladding 500, and substrate 100 has chip district and waveguide district, and the chip layer group set up in substrate 100's chip district, waveguide strip 300 with chip layer group interval integration in substrate 100's waveguide district, waveguide strip 300 are used for guiding the facula of emergent laser and are roughly circular, and waveguide cladding 500 deposits waveguide strip 300, the chip emergent light spot shape of improvement improves laser instrument chip and fiber coupling efficiency.
As shown in fig. 8, an end surface of the waveguide strip 300 faces a chip layer group, a gap between the waveguide strip 300 and the chip layer group is 1 μm to 5 μm, a cross section of the waveguide strip 300 is square, a side length of the cross section of the waveguide strip 300 is 0.5 μm to 2 μm, a thickness of the waveguide cladding 500 is 2 μm to 3 μm, and a refractive index of the waveguide strip 300 is greater than a refractive index of the waveguide cladding 500. In this embodiment, the waveguide cladding 500 is made of SiO2The refractive index of the waveguide cladding 500 is 1.46, the material of the waveguide strip 300 is InP, and the refractive index of the waveguide strip 300 is 3.1.
According to the formula Δ θ ═ 2 λ/a, where Δ θ is the outgoing divergence angle of the laser, λ is the outgoing wavelength, and a is the outgoing end face line width, since the cross section of the waveguide strip 300 is square, the laser spot outgoing from the waveguide strip 300 approaches to a circular spot, and the coupling efficiency between the laser chip and the optical fiber is improved.
The embodiment also provides a laser, and the chip is installed.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the general inventive concept. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A method of processing a chip, comprising:
processing a chip layer group on a substrate;
removing part of the chip layer group to form a waveguide region;
processing the covering layer by a growth mode;
processing a covering layer of a waveguide area into a waveguide strip with an end face facing a chip layer group, and removing a part of the waveguide strip attached to the chip layer group to form a gap between the waveguide strip and the chip layer group;
and processing a waveguide cladding, and removing the chip layer group and the waveguide cladding corresponding to the gap.
2. The chip processing method of claim 1, wherein removing a portion of the chip layer group to form a waveguide region comprises:
and removing part of the chip layer group from one side of the substrate to the other side of the substrate to form the waveguide region.
3. The chip processing method of claim 1, wherein processing the cap layer by growth comprises:
the 0.5-2 μm cap layer is processed by vapor phase epitaxial growth.
4. The chip processing method according to claim 1, wherein the cladding layer of the waveguide area is processed into a waveguide strip facing the chip layer group:
processing the covering layer of the waveguide area into a waveguide strip with a square cross section by a photoetching process and a dry etching process;
the side length of the cross section of the waveguide strip is 0.5-2 mu m.
5. The chip processing method of claim 1, wherein processing the group of chip layers on the substrate comprises:
sequentially processing buffer layers with the thickness of 1-1.5 mu m on the substrate;
processing a lower gradient buffer layer with the thickness of 10nm-100 nm;
processing a quantum well layer group with the thickness of 10nm-30 nm;
processing an upper gradient buffer layer with the thickness of 10nm-100 nm;
processing a grating epitaxial layer with the thickness of 10nm-50nm, and processing a grating by adopting an electron beam grating writing mode;
and processing the corrosion stop layer with the thickness of 10nm-50 nm.
6. The chip processing method of claim 1, wherein processing the waveguide cladding layer comprises:
and sequentially processing an epitaxial layer and a contact epitaxial layer, and removing the epitaxial layer and the contact epitaxial layer in the waveguide region.
7. A chip, comprising:
a substrate having a chip region and a waveguide region;
the chip layer group is arranged in the chip area of the substrate;
the waveguide strip and the chip layer group are integrated in the waveguide area of the substrate at intervals, and the waveguide strip is used for guiding the light spot of the emergent laser to be approximately circular;
a waveguide cladding deposited on the waveguide strip.
8. The chip of claim 7, wherein the cross-section of the waveguide strip is square, and the side of the cross-section of the waveguide strip is 0.5 μm to 2 μm;
the thickness of the waveguide cladding is 2-3 μm, and the refractive index of the waveguide strip is greater than that of the waveguide cladding.
9. The chip of claim 7, wherein a gap between the waveguide strip and the chip layer set is 1 μ ι η to 5 μ ι η.
10. A laser provided with a chip according to any one of claims 7 to 9.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011614713.9A CN112636176A (en) | 2020-12-30 | 2020-12-30 | Chip processing method, chip and laser |
| EP21913769.2A EP4274040A1 (en) | 2020-12-30 | 2021-12-07 | Quantum well structure, chip processing method, chip, and laser |
| JP2023540828A JP2024501749A (en) | 2020-12-30 | 2021-12-07 | Quantum well structure, chip processing method and chip |
| PCT/CN2021/135908 WO2022143028A1 (en) | 2020-12-30 | 2021-12-07 | Quantum well structure, chip processing method, chip, and laser |
| US18/217,106 US20230369829A1 (en) | 2020-12-30 | 2023-06-30 | Quantum well structure, chip processing method, chip, and laser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011614713.9A CN112636176A (en) | 2020-12-30 | 2020-12-30 | Chip processing method, chip and laser |
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| Publication Number | Publication Date |
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| CN112636176A true CN112636176A (en) | 2021-04-09 |
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| CN202011614713.9A Pending CN112636176A (en) | 2020-12-30 | 2020-12-30 | Chip processing method, chip and laser |
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| CN (1) | CN112636176A (en) |
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- 2020-12-30 CN CN202011614713.9A patent/CN112636176A/en active Pending
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