CN112635408B - Manufacturing method of copper foil step on DBC substrate - Google Patents
Manufacturing method of copper foil step on DBC substrate Download PDFInfo
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- CN112635408B CN112635408B CN202011520067.XA CN202011520067A CN112635408B CN 112635408 B CN112635408 B CN 112635408B CN 202011520067 A CN202011520067 A CN 202011520067A CN 112635408 B CN112635408 B CN 112635408B
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- copper foil
- small square
- square holes
- steps
- dbc substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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Abstract
The invention discloses a method for manufacturing copper foil steps on a DBC substrate, which comprises the following steps of firstly, designing dense small square holes in a copper foil area where steps need to be manufactured on a film drawing of a copper foil graph; etching the copper foil graph with the dense small square holes and other copper foil graphs together to enable the copper foil area under the dense small square holes to be etched into a plane to form a copper foil step plane; other patterns of the copper foil are etched and formed at one time; the dense small square holes are designed in the copper foil area needing to be provided with the steps on the film drawing of the copper foil graph, and the small square holes can form the steps after the dense small square holes and other copper foil graphs are normally etched together, so that the problem that the steps are required to be subjected to secondary corrosion when the DBC substrate welding chip area is manufactured is solved, the production efficiency is improved, the cost is reduced, and meanwhile, the product yield is improved.
Description
Technical Field
The invention belongs to the field of DBC substrate manufacturing, relates to application of a DBC substrate, and particularly relates to a manufacturing method of a copper foil step on the DBC substrate.
Background
In the subsequent packaging process of the DBC copper-clad ceramic substrate, it is necessary to solder components such as a chip 2 to the surface of the copper foil pattern and connect the components by an aluminum wire 3, which is generally in the shape of an arc. See fig. 1. In order to improve the reliability and heat dissipation of the package and increase the packaging density, the copper foil 1 area of the DBC substrate where the chip 2 is welded needs to be made into a step type, the chip is welded on the step, and the aluminum wire 3 is linearly connected. See fig. 2. The thickness of the entire copper foil is not uniform due to the steps on the copper foil 1. And to make the copper foil pattern at the position of the welding chip 2 into a step type, the DBC substrate needs to be processed by two pattern transfer and etching procedures: the step area is etched firstly, then the step area is protected, and other areas of the copper foil without steps are etched, so that the production efficiency is low and the cost is high. Meanwhile, the pattern is aligned twice, which affects the position accuracy of the product and causes the yield to decrease.
Disclosure of Invention
The invention provides a method for manufacturing copper foil steps on a DBC substrate, which is characterized in that dense small square holes are designed in a copper foil area needing steps on a film drawing of a copper foil graph, and after the dense small square holes and other graphs of a copper foil are normally etched, the steps can be formed by the small square holes, so that the problem that secondary corrosion is needed when the steps are manufactured in a welding chip area of the DBC substrate is solved, and the purposes of improving the production efficiency, reducing the cost and improving the product yield are achieved.
The technical scheme of the invention is as follows: a method for manufacturing a copper foil step on a DBC substrate comprises the following specific steps:
step one, designing dense small square holes in a copper foil area needing to be provided with steps on a film drawing of a copper foil graph;
etching the copper foil graph with the dense small square holes and other copper foil graphs together to enable the copper foil area under the dense small square holes to be etched into a plane to form a copper foil step plane; other patterns of the copper foil are etched and formed at one time.
Furthermore, the side length of the small square hole is (0.04-0.12) mmX (0.04-0.12) mm; the interval between the adjacent small square holes is (0.03-0.10) mm.
Further, when the copper foil is 0.20mm thick;
the side length of the small square hole is (0.04-0.06) mmX (0.04-0.06) mm,
the interval between the adjacent small square holes is (0.03-0.05) mm.
The height difference between the etched copper foil step plane and the unetched copper foil surface is 0.10 mm-0.15 mm.
Further, when the copper foil is 0.30mm thick;
the side length of the small square hole is (0.06-0.09) mmX (0.06-0.09) mm;
the interval between the adjacent small square holes is (0.05-0.07) mm.
The height difference between the etched copper foil step plane and the unetched copper foil surface is 0.15 mm-0.20 mm.
Further, when the copper foil is 0.40mm thick;
the side length of the small square hole is (0.09-0.12) mmX (0.09-0.12) mm;
the interval between the adjacent small square holes is (0.08-0.10) mm.
The height difference between the etched copper foil step plane and the unetched copper foil surface is 0.22 mm-0.27 mm.
The invention has the beneficial effects that: the copper foil graphic area at the position of the welding chip is designed into a step type, so that the aluminum wires can be linearly connected, the packaging reliability and the heat dissipation performance are improved, and the packaging density is increased.
The dense small square holes are designed in the copper foil area needing to be provided with the steps on the film drawing of the copper foil graph, and the small square holes can form the steps after the dense small square holes and other copper foil graphs are normally etched together, so that the problem that the steps are required to be subjected to secondary corrosion when the DBC substrate welding chip area is manufactured is solved, the production efficiency is improved, the cost is reduced, and meanwhile, the product yield is improved.
Drawings
FIG. 1 is a schematic view of a chip welded on the surface of a copper foil graph with an aluminum wire in an arc shape;
FIG. 2 is a schematic view of a chip welded on the surface of a copper foil graph with aluminum wires linearly connected;
the left side of fig. 3 is a schematic drawing of a film drawing of a copper foil graph before etching, and the right side is a schematic drawing of a copper foil after etching, wherein dense square holes are designed in a copper foil area needing to be provided with steps on the film drawing of the copper foil graph.
In the figure: 1 is copper foil, 2 is a chip, 3 is an aluminum wire, 4 is ceramic, and 5 is a small square hole.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 3, in this embodiment, dense small square holes 5 are designed in the copper foil area where steps are made on the film drawing, and after etching, the small holes become flat and form steps, so as to solve the problem that the steps are welded on the DBC substrate and need to be etched twice.
The design steps of this example are as follows:
1. and designing a step in a copper foil area where the chip is welded on the DBC substrate.
2. Step design:
on a film design drawing, a step area is designed into small square holes which are arranged horizontally and vertically.
1) When the thickness of the copper foil is 0.20mm,
the side length of the small square hole is (0.04-0.06) mmX (0.04-0.06) mm,
the interval between the adjacent small square holes is (0.03-0.05) mm,
the height difference between the etched copper foil step plane and the unetched copper foil surface is 0.10 mm-0.15 mm.
2) When the thickness of the copper foil is 0.30mm,
the side length of the small square hole is (0.06-0.09) mmX (0.06-0.09) mm,
the interval between the adjacent small square holes is (0.05-0.07) mm,
the height difference between the etched copper foil step plane and the unetched copper foil surface is 0.15 mm-0.20 mm.
3) When the thickness of the copper foil is 0.40mm,
the side length of the small square hole is (0.09-0.12) mmX (0.09-0.12) mm;
the interval between the adjacent small square holes is (0.08-0.10) mm,
the height difference between the etched copper foil step plane and the unetched copper foil surface is 0.22 mm-0.27 mm.
Through the implementation of the invention, the area of the copper foil of the DBC substrate, which is welded with the chip, can be etched into a step.
According to the embodiment, the dense small square holes are designed in the copper foil area needing to be provided with the steps on the film drawing of the copper foil graph, and the small square holes can form the steps after being normally etched together with other graphs of the copper foil, so that the problem that secondary corrosion is needed when the steps are formed in the DBC substrate welding chip area is solved, the production efficiency is improved, the cost is reduced, and meanwhile the product yield is improved.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (7)
1. A manufacturing method of a copper foil step on a DBC substrate is characterized by comprising the following steps: the method comprises the following specific steps:
step one, designing dense small square holes in a copper foil area needing to be provided with steps on a film drawing of a copper foil graph;
etching the copper foil graph with the dense small square holes and other copper foil graphs together to enable the copper foil area under the dense small square holes to be etched into a plane to form a copper foil step plane; other patterns of the copper foil are etched and formed at one time;
the side length of the small square hole is (0.04-0.12) mmX (0.04-0.12) mm; the interval between the adjacent small square holes is (0.03-0.10) mm.
2. The method for manufacturing the copper foil step on the DBC substrate according to claim 1, wherein:
when the thickness of the copper foil is 0.20 mm;
the side length of the small square hole is (0.04-0.06) mmX (0.04-0.06) mm,
the interval between the adjacent small square holes is (0.03-0.05) mm.
3. The method for manufacturing the copper foil step on the DBC substrate according to claim 2, wherein: the height difference between the etched copper foil step plane and the unetched copper foil surface is 0.10 mm-0.15 mm.
4. The method for manufacturing the copper foil step on the DBC substrate according to claim 1, wherein:
when the thickness of the copper foil is 0.30 mm;
the side length of the small square hole is (0.06-0.09) mm multiplied by (0.06-0.09) mm;
the interval between the adjacent small square holes is (0.05-0.07) mm.
5. The method for manufacturing the copper foil step on the DBC substrate according to claim 4, wherein the step comprises the following steps: the height difference between the etched copper foil step plane and the unetched copper foil surface is 0.15 mm-0.20 mm.
6. The method for manufacturing the copper foil step on the DBC substrate according to claim 1, wherein:
when the thickness of the copper foil is 0.40 mm;
the side length of the small square hole is (0.09-0.12) mmX (0.09-0.12) mm;
the interval between the adjacent small square holes is (0.08-0.10) mm.
7. The method for manufacturing the copper foil step on the DBC substrate according to claim 6, wherein the step comprises the following steps: the height difference between the etched copper foil step plane and the unetched copper foil surface is 0.22 mm-0.27 mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202011520067.XA CN112635408B (en) | 2020-12-21 | 2020-12-21 | Manufacturing method of copper foil step on DBC substrate |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011520067.XA CN112635408B (en) | 2020-12-21 | 2020-12-21 | Manufacturing method of copper foil step on DBC substrate |
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| CN112635408A CN112635408A (en) | 2021-04-09 |
| CN112635408B true CN112635408B (en) | 2022-08-16 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6274281B1 (en) * | 1999-12-28 | 2001-08-14 | Taiwan Semiconductor Manufacturing Company | Using different transmittance with attenuate phase shift mask (APSM) to compensate ADI critical dimension proximity |
| CN101006329A (en) * | 2004-03-18 | 2007-07-25 | 美商福昌公司 | Embedded attenuated phase shift mask with tunable transmission |
| CN103442530A (en) * | 2013-09-18 | 2013-12-11 | 胜华电子（惠阳）有限公司 | Manufacturing method for PCB unilateral annular ring |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5504712B2 (en) * | 2009-06-30 | 2014-05-28 | 日立金属株式会社 | High-speed circuit board connection structure |
| CN105792548B (en) * | 2016-05-23 | 2018-12-14 | 上海美维科技有限公司 | A method of ladder slot structure printed circuit board is made with plating and engraving method |
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- 2020-12-21 CN CN202011520067.XA patent/CN112635408B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6274281B1 (en) * | 1999-12-28 | 2001-08-14 | Taiwan Semiconductor Manufacturing Company | Using different transmittance with attenuate phase shift mask (APSM) to compensate ADI critical dimension proximity |
| CN101006329A (en) * | 2004-03-18 | 2007-07-25 | 美商福昌公司 | Embedded attenuated phase shift mask with tunable transmission |
| CN103442530A (en) * | 2013-09-18 | 2013-12-11 | 胜华电子（惠阳）有限公司 | Manufacturing method for PCB unilateral annular ring |
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| CN112635408A (en) | 2021-04-09 |
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