CN112635345B - Wafer detection device and method of single-chip process chamber - Google Patents
Wafer detection device and method of single-chip process chamber Download PDFInfo
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- CN112635345B CN112635345B CN202011422009.3A CN202011422009A CN112635345B CN 112635345 B CN112635345 B CN 112635345B CN 202011422009 A CN202011422009 A CN 202011422009A CN 112635345 B CN112635345 B CN 112635345B
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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Abstract
The invention discloses a wafer detection device of a single-chip process cavity, which comprises: the optical signal transmitting terminal, the optical signal receiving terminal and the mode control component; the mode control component closes the optical signal transmitting end in the wafer operation process so as to prevent the optical signal transmitted by the optical signal transmitting end from generating photochemical reaction with a film layer of the wafer in the operation process. The invention also provides a wafer detection method of the single-chip process cavity. The invention can prevent the optical signal of the wafer detection device from generating photochemical reaction on the film layer of the wafer and thereby avoid the defects generated thereby, and is particularly beneficial to preventing copper diffusion in wet etching after dry etching of a groove or a through hole opening in a dual damascene process.
Description
Technical Field
The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a wafer detection device of a single-chip process chamber. The invention also relates to a wafer detection method of the single-chip process cavity.
Background
The back end of line (BEOL) of CMOS process generally adopts Cu interconnection technology, wherein the Cu interconnection technology needs to adopt a Damascus process, the Damascus process is a damascene process that a groove is etched in an interlayer film and then is filled with copper. The Cu interconnection process includes a Cu interconnection line composed of copper filled in a trench (trench) and a via (via) composed of copper filled in an opening of the via.
In the dual damascene process, after the formation of the interlayer film, the trench and the via opening are formed simultaneously by dry etching, which is also called dry etching
The damascene process adopted by the dry etching has the process characteristic of simultaneously forming Trench and Via openings, namely so-called All In One (AIO) etching. Heavy polymer residues (polymer residue) are formed on the sides of the Trench and Via openings (sidewall) after the AIO etch. Therefore, after the AIO etch, a wet clean, i.e., a wet etch, must be performed to remove these polymer residues. After wet cleaning, Cu at the bottom of the Trench and via openings is directly exposed, and a kind of Cu diffusion defect (Cu diffusion defect) may be formed under the action of external factors, which may seriously affect the reliability of the chip.
As shown in fig. 1, it is a schematic diagram of a copper diffusion defect structure formed after wet etching to remove polymer residues after etching a trench and a via opening in the existing dual damascene process; the via opening 105 and the trench 106 are formed by dry etching the interlayer film 101.
A bottom interlayer film 101a and a bottom copper line 102 are also formed on the bottom of the interlayer film 101.
In general, a diffusion barrier layer 103 is also formed on the surface of the underlying interlayer film 101a and the underlying copper line 102 at the bottom of the interlayer film 101, and the diffusion barrier layer 103 is used to block diffusion of copper of the copper line 102 into the interlayer film 101. The diffusion barrier layer 103 is typically nitrogen doped silicon carbide (NDC), which may also be referred to as SiCN.
The interlayer films 101 and 101a are generally formed using a low dielectric constant layer, for example, SiCOH.
In the dual damascene process, a metal hard mask layer 104 is further formed on the surface of the interlayer film 101, the metal hard mask layer 104 is used for defining the pattern of the trench 106, and the material of the metal hard mask layer 104 includes TiN. An oxide layer such as a TEOS oxide layer can also be formed between the interlayer film 101 and the metal hard mask layer 104.
As shown in fig. 1, the dry etching of the via opening 105 and the trench 106 is followed by a wet cleaning process, in which the underlying copper line 102 at the bottom of the via opening 105 is exposed and finally copper diffusion defects are formed along the sides of the via opening 105 and the trench 106 by diffusion, as indicated by reference numeral 107.
As shown in fig. 2, is a photograph of the copper diffusion defect of fig. 1.
Disclosure of Invention
The invention aims to provide a wafer detection device of a single-chip process chamber, which can prevent an optical signal of the wafer detection device from generating a photochemical reaction on a film layer of a wafer and further avoid the defects generated thereby. Therefore, the invention also provides a wafer detection method of the single-chip process cavity.
In order to solve the above technical problem, the wafer inspection apparatus for a single wafer process chamber provided by the present invention comprises: the optical signal transmitting terminal, the optical signal receiving terminal and the mode control component.
The mode control component closes the optical signal transmitting end in the wafer operation process so as to prevent the optical signal transmitted by the optical signal transmitting end from generating photochemical reaction with a film layer of the wafer in the operation process.
In a further improvement, the mode control part turns on the optical signal transmitting terminal before the wafer operation.
The wafer operation comprises a wafer placing process of transferring the wafer into a single-wafer process cavity and placing the wafer on a wafer carrying table of the single-wafer process cavity, the optical signal transmitting end and the optical signal receiving end detect the wafer in the wafer placing process, and after the wafer placing process is completed, the optical signal transmitted by the optical signal transmitting end is blocked by the wafer and is not received by the optical signal receiving end.
In a further improvement, the mode control part turns on the optical signal transmitting terminal after the wafer operation is finished.
The wafer operation is finished, the wafer operation comprises a wafer taking process of taking the wafer out of a wafer carrying table of the single-wafer process cavity, and after the wafer taking process is finished, the optical signal emitted by the optical signal emitting end is received by the optical signal receiving end.
In a further refinement, the mode control component includes a photo relay disposed at the optical signal receiving end.
Before the operation of the wafer, after the wafer is placed on a wafer carrying table of a single-chip process cavity, the optical signal emitted by the optical signal emitting end is blocked by the wafer and is not received by the photoelectric relay, so that the photoelectric relay is triggered to disconnect the power supply path of the optical signal emitting end.
When the wafer is not placed on the slide holder or taken away, the optical signal emitted by the optical signal emitting end is received by the photoelectric relay, so that the photoelectric relay is triggered to conduct a power supply path of the optical signal emitting end.
In a further refinement, the monolithic process chamber comprises a monolithic wet etch process chamber.
The wafer is further improved in that a copper layer is formed on the wafer, the operation process of the wafer is wet etching, the surface of the copper layer on the wafer is exposed in the wet etching, and the optical signal transmitting end is closed in the operation process of the wafer, so that copper diffusion generated under the catalysis of photochemical reaction can be prevented.
The further improvement is that the wet etching is the etching of the polymer residues on the inner side surface of the through hole opening formed on the wafer by adopting a Damascus process; or, the wet etching is to etch polymer residues on the inner side surfaces of the groove and the through hole opening formed on the wafer by adopting a dual damascene process.
In order to solve the technical problem, the wafer detection method of the single-chip process cavity provided by the invention comprises the following steps:
the method comprises the following steps that firstly, before the operation of a wafer, a mode control component controls an optical signal transmitting end and an optical signal receiving end to work so as to realize the detection of the wafer placement.
And step two, when the wafer operation is started, the mode control component closes the optical signal transmitting end and keeps the optical signal transmitting end in a closed state in the operation process so as to prevent the optical signal transmitted by the optical signal transmitting end from generating photochemical reaction with a film layer of the wafer in the operation process.
And step three, after the operation of the wafer is finished, the mode control component controls the optical signal transmitting end and the optical signal receiving end to work so as to realize the detection of the wafer taking.
In a further improvement, the wafer is transferred to a single-chip process chamber and placed on a wafer carrying table of the single-chip process chamber; after the wafer is placed, the optical signal emitted by the optical signal emitting end is blocked by the wafer and is not received by the optical signal receiving end.
The further improvement is that the wafer taking is to take the wafer out of a wafer carrying table of the single-wafer process cavity; and after the chip is taken, the optical signal transmitted by the optical signal transmitting end is received by the optical signal receiving end.
In a further refinement, the mode control component includes a photo relay disposed at the optical signal receiving end.
Before the wafer operation, after the wafer is placed on a wafer carrying table of a single-chip process cavity, an optical signal emitted by the optical signal emitting end is blocked by the wafer and is not received by the photoelectric relay, so that the photoelectric relay is triggered to disconnect a power supply path of the optical signal emitting end.
When the wafer is not placed on the slide holder or taken away, the optical signal emitted by the optical signal emitting end is received by the photoelectric relay, so that the photoelectric relay is triggered to conduct a power supply path of the optical signal emitting end.
In a further improvement, the monolithic process chamber comprises a monolithic wet etch process chamber.
The wafer is further improved in that a copper layer is formed on the wafer, the operation process of the wafer is wet etching, the surface of the copper layer on the wafer is exposed in the wet etching, and the optical signal transmitting end is closed in the operation process of the wafer, so that copper diffusion generated under the catalysis of photochemical reaction can be prevented.
The further improvement is that the wet etching is the etching of the polymer residues on the inner side surface of the through hole opening formed on the wafer by adopting a Damascus process; or, the wet etching is to etch polymer residues on the inner side surfaces of the groove and the through hole opening formed on the wafer by adopting a dual damascene process.
The mode control component is arranged in the wafer detection device, so that the optical signal transmitting end can be closed in the wafer operation process, the optical signal transmitted by the optical signal transmitting end and a film layer of the wafer in the operation process can be prevented from generating photochemical reaction, and particularly when a copper layer is exposed out of the surface of the wafer, the mode control component can well prevent copper from diffusing under the action of photocatalysis, so that the copper diffusion defect can be prevented, and the product yield is improved.
The mode control component can be realized by arranging the photoelectric relay at the optical signal receiving end, and has the advantages of simple structure, easy realization and lower cost.
The wafer detection device can be well applied to a single-wafer wet etching process cavity, and can prevent copper diffusion defects from occurring in wet etching for removing polymer residues after dry etching of a Damascus process or a dual Damascus process.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1 is a schematic diagram of a copper diffusion defect structure formed after wet etching to remove polymer residues after etching trenches and via openings in a conventional dual damascene process;
FIG. 2 is a photograph of the copper diffusion defect of FIG. 1;
FIG. 3 is a schematic structural diagram of a conventional single-wafer process chamber during wet etching;
FIG. 4A is a schematic view of a wafer inspection apparatus of a single wafer processing chamber according to an embodiment of the present invention in a working state during wafer placement;
FIG. 4B is a schematic diagram illustrating the operation of the wafer inspection apparatus for a single wafer processing chamber during wafer operation according to the present invention;
FIG. 4C is a schematic view of a wafer inspection apparatus for a single wafer processing chamber according to an embodiment of the present invention in a working state during wafer picking;
FIG. 5A is a schematic view of the wafer inspection apparatus of the single wafer processing chamber of the present invention in a working state without a wafer placed on the stage;
FIG. 5B is a schematic diagram illustrating the operation of the wafer inspection apparatus of the single wafer processing chamber during wafer operation according to the embodiment of the present invention.
Detailed Description
The present invention is formed on the basis of analyzing the problems of the prior art, and has an unexpected technical effect, and before the embodiments of the present invention are described in detail, the main mechanism of the copper diffusion defect shown in fig. 1 is described as follows:
in the wet etching process after the dry etching of the trench and the via opening, light easily enters the bottom of the via opening and reacts with the copper line 102 in a photoelectrochemical reaction, and copper diffusion is easily generated under the catalytic action of light. Therefore, how to reduce the light source in the wet etching process chamber is particularly important.
FIG. 3 is a schematic structural diagram of a conventional single-wafer process chamber during wet etching; in the conventional single-chip process chamber, a wafer detection device is required to detect whether the wafer 204 is placed on the stage 205.
The wafer detection device mainly comprises an optical signal transmitting end 201 and an optical signal receiving end 202, wherein the optical signal transmitting end 201 transmits an optical signal 203 for the optical signal receiving end 202 to receive, if no wafer 204 is placed on the slide stage 205, the optical signal 203 directly reaches the optical signal receiving end 202, and thus a signal that the wafer 204 is not placed is formed.
If the wafer 204 is placed, the optical signal 203 is blocked by the wafer 204, so as to determine that the wafer 204 is placed on the stage 205; this enables the operation of wafer 204, i.e., wet etching, to begin.
However, as shown in fig. 3, when the copper layer on the surface similar to the wafer 204 is exposed, the optical signal 203 is likely to generate a photoelectrochemical reaction with the copper layer as shown by the mark 208, which may generate a catalytic action, so that the copper layer is likely to generate diffusion.
The wafer detection device of the single-chip process cavity comprises the following steps:
fig. 4A is a schematic view illustrating a working state of the wafer inspection apparatus in a single-wafer processing chamber according to an embodiment of the present invention during wafer placement; fig. 4B is a schematic diagram illustrating a working state of the wafer inspection apparatus for a single wafer processing chamber according to the embodiment of the present invention during wafer 5 operation; fig. 4C is a schematic view illustrating a working state of the wafer inspection apparatus in a single-wafer processing chamber according to the embodiment of the present invention during wafer picking; the wafer detection device of the single-chip process cavity comprises the following steps:
the wafer detection device of the single-chip process cavity comprises the following components: an optical signal transmitting terminal 1, an optical signal receiving terminal 2 and a mode control part.
As shown in fig. 4B, the mode control component turns off the optical signal emitting terminal 1 during the operation of the wafer 5, so as to prevent the optical signal 3 emitted from the optical signal emitting terminal 1 from generating a photochemical reaction with the film layer of the wafer 5 during the operation.
In an embodiment of the invention, the single-wafer process chamber comprises a single-wafer wet etching process chamber. The wafer 5 is fixed on the stage 4 during the operation. The stage 4 can be a chuck (chuck), such as a vacuum chuck or an electrostatic chuck. In the wet process, the wafer carrier 4 rotates to drive the wafer 5 to rotate, so that the wet etching solution can be uniformly distributed on the surface of the wafer 5.
The copper layer is formed on the wafer 5, the operation process of the wafer 5 is wet etching, the surface of the copper layer on the wafer 5 is exposed in the wet etching, and the optical signal transmitting end 1 is closed in the operation process of the wafer 5, so that copper diffusion generated under photochemical reaction catalysis can be prevented. For example, the wet etching is to etch polymer residues on the inner side surface of the through hole opening formed on the wafer 5 by adopting a damascene process; or, the wet etching is to etch the polymer residues on the inner side surfaces of the trench and the through hole opening formed on the wafer 5 by adopting a dual damascene process.
In the embodiment of the present invention, as shown in fig. 4A, the mode control component turns on the optical signal emitting terminal 1 before the wafer 5 is operated.
The wafer 5 comprises a wafer placing process of transferring the wafer 5 into a single-wafer process cavity and placing the wafer on a wafer carrying table 4 of the single-wafer process cavity before operation, the optical signal transmitting terminal 1 and the optical signal receiving terminal 2 detect the wafer 5 in the wafer placing process, and after the wafer placing is completed, an optical signal 3 transmitted by the optical signal transmitting terminal 1 is blocked by the wafer 5 and is not received by the optical signal receiving terminal 2.
As shown in fig. 4C, the mode control part turns on the optical signal transmitting terminal 1 after the wafer 5 operation is finished.
After the operation of the wafer 5 is finished, the wafer 5 is taken out from the wafer stage 4 of the single-wafer process cavity, and after the wafer is taken out, the optical signal 3 emitted by the optical signal emitting end 1 is received by the optical signal receiving end 2.
According to the embodiment of the invention, the mode control part is arranged in the wafer detection device, so that the optical signal transmitting terminal 1 can be closed in the operation process of the wafer 5, the optical signal 3 transmitted by the optical signal transmitting terminal 1 and a film layer of the wafer 5 in the operation process can be prevented from generating photochemical reaction, and particularly, when a copper layer is exposed out of the surface of the wafer 5, the embodiment of the invention can well prevent copper from being diffused under the catalysis operation of light, thereby preventing the copper diffusion defect from being generated and improving the yield of products.
The mode control component of the embodiment of the invention can be realized by arranging the photoelectric relay 6 at the optical signal receiving end 2, and has the advantages of simple structure, easy realization and lower cost.
The wafer detection device provided by the embodiment of the invention can be well applied to a single-wafer wet etching process cavity, and can prevent copper diffusion defects from occurring in wet etching for removing polymer residues after dry etching of a Damascus process or a dual Damascus process.
The wafer detection device of the single-chip process cavity in the preferred embodiment of the invention comprises the following steps:
FIG. 5A is a schematic view showing the working status of the wafer inspection apparatus of the single wafer processing chamber of the present invention when no wafer is placed on the stage; fig. 5B is a schematic view illustrating a working state of the wafer inspection apparatus in a single wafer processing chamber according to an embodiment of the present invention during wafer operation; in the preferred embodiment of the invention:
the mode control means comprises a photo relay 6 arranged at the optical signal receiving end 2.
As shown in fig. 5B, before the operation of the wafer 5, after the wafer 5 is placed on the stage 4 of the single chip process chamber, the optical signal 3 emitted by the optical signal emitting terminal 1 is blocked by the wafer 5 and is not received by the photoelectric relay 6, so as to trigger the photoelectric relay 6 to disconnect the power supply path of the optical signal emitting terminal 1. The switch 303 controlled by the photo-relay 6 is shown in an open state in fig. 5B.
As shown in fig. 5A, when the wafer 5 is not placed on the stage 4 or the wafer 5 is taken away, the optical signal 3 emitted by the optical signal emitting terminal 1 is received by the optoelectronic relay 6, so as to trigger the optoelectronic relay 6 to turn on the power supply path of the optical signal emitting terminal 1. Fig. 5B shows the on state of the switch controlled by the photo relay 6 as indicated by the connecting line marked 302.
The wafer detection method of the single-chip process cavity comprises the following steps:
step one, as shown in fig. 4A, before the operation of the wafer 5, the mode control component controls the optical signal transmitting terminal 1 and the optical signal receiving terminal 2 to work, so as to implement the detection of the placement of the wafer 5.
The wafer placing is to convey the wafer 5 to a single-chip process cavity and place the wafer on a wafer carrying table 4 of the single-chip process cavity; after the wafer is placed, the optical signal 3 emitted by the optical signal emitting end 1 is blocked by the wafer 5 and is not received by the optical signal receiving end 2.
Step two, as shown in fig. 4B, when the operation of the wafer 5 starts, the mode control component turns off the optical signal emitting terminal 1 and keeps the optical signal emitting terminal 1 in the off state during the operation, so as to prevent the optical signal 3 emitted by the optical signal emitting terminal 1 and the film layer of the wafer 5 from generating a photochemical reaction during the operation.
The monolithic process chamber comprises a monolithic wet etch process chamber.
The copper layer is formed on the wafer 5, the operation process of the wafer 5 is wet etching, the surface of the copper layer on the wafer 5 is exposed in the wet etching, and the optical signal transmitting end 1 is closed in the operation process of the wafer 5, so that copper diffusion generated under photochemical reaction catalysis can be prevented. For example, the wet etching is to etch polymer residues on the inner side surface of the through hole opening formed on the wafer 5 by adopting a damascene process; or, the wet etching is to etch the polymer residues on the inner side surfaces of the trench and the through hole opening formed on the wafer 5 by adopting a dual damascene process.
Step three, as shown in fig. 4C, after the operation of the wafer 5 is completed, the mode control component controls the optical signal transmitting terminal 1 and the optical signal receiving terminal 2 to work, so as to implement the detection of the wafer 5.
The wafer taking is to take the wafer 5 out of a wafer carrying table 4 of the single-wafer process cavity; after the chip is taken out, the optical signal 3 emitted by the optical signal emitting end 1 is received by the optical signal receiving end 2.
Preferably, the mode control part comprises a photoelectric relay 6 arranged at the optical signal receiving end 2.
Before the operation of the wafer 5, after the wafer 5 is placed on a wafer stage 4 of a single-chip process chamber, the optical signal 3 emitted by the optical signal emitting end 1 is blocked by the wafer 5 and is not received by the photoelectric relay 6, so that the photoelectric relay 6 is triggered to disconnect the power supply path of the optical signal emitting end 1.
When the wafer 5 is not placed on the slide holder 4 or the wafer 5 is taken away, the optical signal 3 emitted by the optical signal emitting end 1 is received by the photoelectric relay 6, so that the photoelectric relay 6 is triggered to conduct the power supply path of the optical signal emitting end 1.
The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.
Claims (14)
1. A wafer detection device of a single-chip process chamber is characterized by comprising: the optical signal transmitting terminal, the optical signal receiving terminal and the mode control component;
the mode control component closes the optical signal transmitting end in the wafer operation process so as to prevent the optical signal transmitted by the optical signal transmitting end and a film layer of the wafer in the operation process from generating photochemical reaction;
the mode control component opens the optical signal transmitting terminal before the wafer operation;
the mode control component opens the optical signal transmitting terminal after the wafer operation is finished.
2. The wafer inspection apparatus for monolithic processing chambers as recited in claim 1, wherein: the wafer operation comprises a wafer placing process of conveying the wafer into a single-wafer process cavity and placing the wafer on a wafer carrying table of the single-wafer process cavity, the optical signal transmitting end and the optical signal receiving end detect the wafer in the wafer placing process, and after the wafer placing is finished, the optical signal transmitted by the optical signal transmitting end is blocked by the wafer and is not received by the optical signal receiving end.
3. The wafer inspection apparatus for a monolithic processing chamber as recited in claim 2, wherein: and after the wafer operation is finished, the wafer taking process of taking the wafer out of the wafer carrying table of the single-wafer process cavity is included, and after the wafer taking is finished, the optical signal transmitted by the optical signal transmitting end is received by the optical signal receiving end.
4. The wafer inspection apparatus for monolithic processing chamber as claimed in any one of claims 1 to 3, wherein: the mode control component comprises a photoelectric relay arranged at the optical signal receiving end;
before the operation of the wafer, after the wafer is placed on a wafer carrying table of a single-chip process cavity, the optical signal emitted by the optical signal emitting end is blocked by the wafer and is not received by the photoelectric relay, so that the photoelectric relay is triggered to disconnect the power supply path of the optical signal emitting end;
when the wafer is not placed on the slide holder or taken away, the optical signal emitted by the optical signal emitting end is received by the photoelectric relay, so that the photoelectric relay is triggered to conduct a power supply path of the optical signal emitting end.
5. The wafer inspection apparatus for monolithic processing chambers as recited in claim 4, wherein: the monolithic process chamber comprises a monolithic wet etch process chamber.
6. The wafer inspection apparatus for monolithic processing chambers as recited in claim 5, wherein: the wafer is provided with a copper layer, the operation process of the wafer is wet etching, the surface of the copper layer on the wafer is exposed in the wet etching, and the optical signal transmitting end is closed in the operation process of the wafer, so that copper diffusion generated under the catalysis of photochemical reaction can be prevented.
7. The wafer inspection apparatus for monolithic processing chambers as recited in claim 6, wherein: the wet etching is to etch polymer residues on the inner side surface of the through hole opening formed on the wafer by adopting a Damascus process; or, the wet etching is to etch polymer residues on the inner side surfaces of the groove and the through hole opening formed on the wafer by adopting a dual damascene process.
8. A wafer detection method of a single-chip process chamber is characterized by comprising the following steps:
the method comprises the following steps that firstly, before wafer operation, a mode control component controls an optical signal transmitting end and an optical signal receiving end to work so as to realize detection of wafer placement;
step two, the mode control component closes the optical signal transmitting end when the wafer operation starts and keeps the optical signal transmitting end in a closed state in the operation process so as to prevent the optical signal transmitted by the optical signal transmitting end and a film layer of the wafer in the operation process from generating photochemical reaction;
and step three, after the operation of the wafer is finished, the mode control component controls the optical signal transmitting end and the optical signal receiving end to work so as to realize the detection of the wafer taking.
9. The wafer inspection method of a monolithic process chamber of claim 8, wherein: the wafer placing is to convey the wafer to a single-chip process cavity and place the wafer on a wafer carrying table of the single-chip process cavity; after the wafer is placed, the optical signal emitted by the optical signal emitting end is blocked by the wafer and is not received by the optical signal receiving end.
10. The wafer inspection method of a monolithic process chamber of claim 9, wherein: the wafer taking is to take the wafer out of a wafer carrying table of the single-wafer process cavity; and after the chip is taken, the optical signal transmitted by the optical signal transmitting end is received by the optical signal receiving end.
11. The wafer inspection method of one of claims 8 to 10, wherein: the mode control component comprises a photoelectric relay arranged at the optical signal receiving end;
before the operation of the wafer, after the wafer is placed on a wafer carrying table of a single-chip process cavity, the optical signal emitted by the optical signal emitting end is blocked by the wafer and is not received by the photoelectric relay, so that the photoelectric relay is triggered to disconnect the power supply path of the optical signal emitting end;
when the wafer is not placed on the slide holder or taken away, the optical signal emitted by the optical signal emitting end is received by the photoelectric relay, so that the photoelectric relay is triggered to conduct a power supply path of the optical signal emitting end.
12. The wafer inspection method of a monolithic process chamber of claim 11, wherein: the monolithic process chamber comprises a monolithic wet etch process chamber.
13. The wafer inspection method of a monolithic process chamber of claim 12, wherein: the wafer is provided with a copper layer, the operation process of the wafer is wet etching, the surface of the copper layer on the wafer is exposed in the wet etching, and the optical signal transmitting end is closed in the operation process of the wafer, so that copper diffusion generated under the catalysis of photochemical reaction can be prevented.
14. The wafer inspection method of a monolithic process chamber of claim 13, wherein: the wet etching is to etch polymer residues on the inner side surface of the through hole opening formed on the wafer by adopting a Damascus process; or, the wet etching is to etch polymer residues on the inner side surfaces of the groove and the through hole opening formed on the wafer by adopting a dual damascene process.
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