CN112597009B - FPGA embedded PCIExpress IP core mass production test optimization method based on coverage rate sequencing - Google Patents
FPGA embedded PCIExpress IP core mass production test optimization method based on coverage rate sequencing Download PDFInfo
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Abstract
The invention relates to a method for optimizing mass production test of an FPGA embedded PCI Express IP core based on coverage rate sequencing, which comprises the following specific steps: step 1: generating a test vector set required by the FPGA embedded PCI Express IP core test; step 2: using a test vector node coverage rate statistical algorithm to calculate node coverage rate of each test vector in the test vector set; step 3: step 2, obtaining a single test vector with highest node coverage rate in the test vector set; step 4: and (3) using a test vector set ordering algorithm to order and optimize the original test vector set based on the single test vector obtained in the step (3) so as to finish the optimization of the test vector set. Through the steps, on the premise of not reducing the test coverage rate, the sequencing optimization of the test vector set is completed by adopting the mass production test optimization method based on the coverage rate sequencing, so that the test efficiency of the test vector set can be effectively improved, the configuration test time is shortened, and the configuration test cost is reduced.
Description
Technical Field
The invention relates to a method for optimizing mass production test of an embedded PCI Express IP core of an FPGA, belonging to the technical field of integrated circuits.
Background
With the continuous development of field programmable gate arrays (i.e., FPGAs), the variety and number of embedded IP modules in FPGAs are increasing, and more difficulties and challenges are brought to testing FPGAs.
In recent years, in the process of designing and developing the FPGA, the specific gravity of the test cost in the total cost is higher and higher, and the test time for the internal interconnection line resource and the IP core module of the FPGA also occupies most of the total development time. In particular, compared with the interconnection line resources in the FPGA, the embedded IP core of the FPGA has more complex internal structure and design principle, so that the testing difficulty is higher, and the testing time and the testing expense occupy most of the total testing expense of the FPGA.
The PCI Express IP core is embedded in the millions of gate-level FPGA, is integrated on an FPGA device for the first time in 2005, has been an essential IP module of a high-end FPGA after more than ten years of development, and meets the requirements of users on high bandwidth and high data transmission rate. The development of a mature and effective test means for the PCI Express IP core is an important ring of high-performance FPGA chip test engineering.
Because of the high complexity of PCI Express IP cores, hundreds of test vectors are typically required to complete them (coverage rates above 97% are generally considered complete), and thus the total configuration test time required would be on the order of minutes, which means significant test costs for engineering mass production testing, and therefore the reduction in configuration test time would typically be traded for a reduction in the cost of sacrificing some of the test coverage.
Because the test vectors have different contents on the IP core test and different test effects on different test vectors, the test sequence of the test vectors in the test vector set is reasonably arranged, and the test efficiency of the test set can be effectively improved, so that the use quantity of configuration vectors is reduced and the total configuration test time is shortened on the premise of achieving higher test coverage rate.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the invention provides a method for optimizing mass production test of an FPGA embedded PCI Express IP core based on coverage rate sequencing, which aims to solve the problems of long code stream configuration time and low test efficiency in the FPGA embedded PCI Express IP core test process. The method can effectively reduce the number of test vectors, and shortens the test time of the PCI Express IP core embedded in the FPGA under the condition of ensuring a certain coverage rate.
The technical scheme adopted by the invention is as follows: the FPGA embedded PCI Express IP core mass production test optimization method based on coverage rate sequencing comprises the following specific steps:
step 1: generating a test vector set required by the FPGA embedded PCI Express IP core test;
step 2: using a test vector node coverage rate statistical algorithm to calculate node coverage rate of each test vector in the test vector set;
step 3: step 2, obtaining a single test vector with highest node coverage rate in the test vector set;
step 4: and (3) using a test vector set ordering algorithm to order and optimize the original test vector set based on the single test vector with the highest node coverage rate obtained in the step (3) so as to finish the optimization of the test vector set.
The step of performing node coverage measurement on each test vector in the test vector set by using the test vector node coverage statistical algorithm described in the step 2 is as follows:
step 21: creating a source file sequence comprising all test vector files, and defining an integer n=0, and the total number M of test vectors;
step 22: performing functional simulation on the test vector files in the source file sequence [ N ] and generating a VCD digital format file ([ VCD file);
step 23: creating a coverage rate sequence comprising node coverage rates of all test vector files;
step 24: counting the number of nodes with 0/1 turnover change in a VCD digital format file generated by a source file sequence [ N ], calculating to obtain corresponding node coverage rate, and adding the corresponding node coverage rate to a coverage rate sequence [ N ];
step 25: starting from N=0, sorting the sizes of the coverage rate sequences, wherein the sorting rule is to firstly select two test vectors of N=0 and N=1, compare the coverage rates of the two test vectors, and reserve the test vector after determining the test vector with large coverage rate as a reference vector for comparing the test coverage rate with the next N+1 test vector;
step 26: judging whether N is equal to M; if N is smaller than M, executing n=n+1, selecting the next test vector to compare with the current test coverage rate vector with the test coverage rate, if the coverage rate of the test vector n+1 is larger, using the test vector n+1 as the test vector for comparing with the test coverage rate later, and if the coverage rate of the original test vector is larger, using the original test item as the comparison vector; if N is equal to M, all the test vectors representing the coverage rate sequence [ N ] are compared, and the finally reserved test vector is used as the test vector with the highest test coverage rate;
the step of using the test vector set sorting algorithm to sort and optimize the original test vector set based on the single test vector with the highest node coverage rate obtained in the step 3 and finish the optimization of the test vector set is as follows:
step 41: creating an optimized vector file sequence, and defining an integer T=0;
step 42: adding the single test vector with the highest node coverage rate obtained in the step 3 to an optimized vector file sequence [ T ], deleting the vector file in the source file sequence, and replacing M with an integer M-1;
step 43: combining the total (T+1) vector files in the optimized vector file sequence with M vector files in the source file sequence respectively to form M vector combinations;
step 44: measuring and calculating the total node coverage rate of each vector combination, comparing the coverage rate to obtain a vector combination with the highest coverage rate, updating the vector combination to an optimized vector file sequence, deleting a test vector which is the same as the vector combination in a source file sequence, and replacing M with an integer M-1;
step 45: comparing whether the node coverage rate of the vector combination in the step 44 exceeds a set coverage rate target, if so, completing optimization and outputting an optimized vector file sequence; otherwise, the integer t+1 is substituted for T, step 43 is performed.
Compared with the prior art, the invention has the advantages that:
the invention completes the sorting optimization of the test vector set by adopting the mass production test optimization method based on the coverage rate sorting on the premise of not reducing the test coverage rate, can effectively improve the test efficiency of the test vector set, shortens the configuration test time and reduces the configuration test cost.
Drawings
FIG. 1 is a schematic diagram of the overall flow of transactions of a mass production test optimization method based on coverage rate sequencing;
FIG. 2 is a flow chart of a core algorithm of the invention for simple ordering of test vector sets;
FIG. 3 is a flow chart of a core algorithm for vector set ordering optimization designed based on the principle of "the greater the node dissimilarity tested between two consecutive test vector files, the higher the total test coverage resulting from superposition thereof";
Detailed Description
The invention is described with reference to the accompanying drawings.
According to the principle that the larger the node dissimilarity tested between two continuous test vector files is, the higher the total test coverage rate obtained by superposition is, firstly, a simple arrangement algorithm is used for ordering the test vector files by taking the node coverage rate of the test vectors as an index, and the test vector file with the highest test coverage rate is screened out; then, on the basis of the vector file, calculating node coverage rate of other test vectors in the vector set and the vector after combination in pairs, and determining the test vector combination with the highest coverage rate; on the basis of the vector combination, calculating node coverage rate of other test vectors in the vector set and the vector group after combination in pairs, and determining three test vector combinations with highest coverage rate; and the like, outputting the test vector combination with higher test efficiency until the node coverage rate of the vector group set reaches the expected set target.
The node coverage measurement formula for one or more test vectors is as follows:
as shown in fig. 1 to 3, the method for optimizing the mass production test of the embedded PCI Express IP core of the FPGA based on coverage rate sequencing comprises the following steps:
step 1: generating a test vector set required by the FPGA embedded PCI Express IP core test;
step 2: using a test vector node coverage rate statistical algorithm to calculate node coverage rate of each test vector in the test vector set;
the method comprises the following specific steps:
step 21: creating a source file sequence comprising all test vector files, and defining an integer n=0, and the total number M of test vectors;
step 22: performing functional simulation on the test vector files in the source file sequence [ N ] and generating a VCD digital format file ([ VCD file);
step 23: creating a coverage rate sequence comprising node coverage rates of all test vector files;
step 24: counting the number of nodes with 0/1 turnover change in a VCD digital format file generated by a source file sequence [ N ], calculating to obtain corresponding node coverage rate, and adding the corresponding node coverage rate to a coverage rate sequence [ N ];
step 25: starting from N=0, sorting the sizes of the coverage rate sequences, wherein the sorting rule is to firstly select two test vectors of N=0 and N=1, compare the coverage rates of the two test vectors, and reserve the test vector after determining the test vector with large coverage rate as a reference vector for comparing the test coverage rate with the next N+1 test vector;
step 26: judging whether N is equal to M; if N is smaller than M, executing n=n+1, selecting the next test vector to compare with the current test coverage rate vector with the test coverage rate, if the coverage rate of the test vector n+1 is larger, using the test vector n+1 as the test vector for comparing with the test coverage rate later, and if the coverage rate of the original test vector is larger, using the original test item as the comparison vector; if N is equal to M, all the test vectors representing the coverage rate sequence [ N ] are compared, and the finally reserved test vector is used as the test vector with the highest test coverage rate;
step 3: step 2, obtaining a single test vector with highest node coverage rate in the test vector set;
step 4: and (3) using a test vector set ordering algorithm to order and optimize the original test vector set based on the single test vector with the highest node coverage rate obtained in the step (3) so as to finish the optimization of the test vector set.
The specific steps of the step 4 are as follows:
step 41: creating an optimized vector file sequence, and defining an integer T=0;
step 42: adding the single test vector with the highest node coverage rate obtained in the step 3 to an optimized vector file sequence [ T ], deleting the vector file in the source file sequence, and replacing M with an integer M-1;
step 43: combining the total (T+1) vector files in the optimized vector file sequence with M vector files in the source file sequence respectively to form M vector combinations;
step 44: measuring and calculating the total node coverage rate of each vector combination, comparing the coverage rate to obtain a vector combination with the highest coverage rate, updating the vector combination to an optimized vector file sequence, deleting a test vector which is the same as the vector combination in a source file sequence, and replacing M with an integer M-1;
step 45: comparing whether the node coverage rate of the vector combination in the step 44 exceeds a set coverage rate target, if so, completing optimization and outputting an optimized vector file sequence; otherwise, the integer t+1 is substituted for T, step 43 is performed.
It is to be noted that the present invention has various examples, and those skilled in the art can make various corresponding changes and modifications according to the present invention without departing from the spirit and the essence thereof, but these corresponding changes and modifications should fall within the scope of the appended claims.
Claims (2)
1. The method for optimizing the mass production test of the embedded PCIExpress IP core of the FPGA based on coverage rate sequencing is characterized by comprising the following steps of:
step 1: generating a test vector set required by the test of the embedded PCIExpress IP core of the FPGA;
step 2: using a test vector node coverage rate statistical algorithm to calculate node coverage rate of each test vector in the test vector set;
step 3: step 2, obtaining a single test vector with highest node coverage rate in the test vector set;
step 4: using a test vector set ordering algorithm and the single test vector with highest node coverage rate obtained in the step 3 to order and optimize the original test vector set, and completing the optimization of the test vector set;
the specific steps of the step 4 are as follows:
step 41: creating an optimized vector file sequence, wherein the integer T=0;
step 42: adding the single test vector with the highest node coverage rate obtained in the step 3 to an optimized vector file sequence [ T ], and deleting the vector file in the source file sequence, so that M=M-1;
step 43: combining the T+1 vector files in the optimized vector file sequence with each vector file in the source file sequence respectively to form M vector combinations;
step 44: measuring and calculating the total node coverage rate of each vector combination, comparing the coverage rate to obtain a vector combination with the highest coverage rate, updating the vector combination to an optimized vector file sequence, deleting the test vector which is the same as the vector combination in a source file sequence, and enabling M=M-1;
step 45: comparing whether the node coverage rate of the vector combination in the step 44 exceeds a set coverage rate target, and if so, outputting an optimized vector file sequence; otherwise, let t=t+1, go to step 43;
the source file sequence comprises all test vector files, and M is the total number of test vectors.
2. The method for optimizing mass production testing of embedded pci express IP cores of an FPGA based on coverage rate sequencing according to claim 1, wherein the method is characterized by comprising the following steps: the specific steps of the step 2 are as follows:
step 21: creating a source file sequence comprising all test vector files, and defining an initial value n=0 of an integer N and a total number M of test vectors;
step 22: performing functional simulation on the test vector file in the source file sequence [ N ] and generating a VCD digital format file;
step 23: creating a coverage rate sequence comprising node coverage rates of all test vector files;
step 24: counting the number of nodes with 0/1 turnover change in a VCD digital format file generated by a source file sequence [ N ], calculating to obtain corresponding node coverage rate, and adding the corresponding node coverage rate to the coverage rate sequence [ N ];
step 25: starting from N=0, sorting the sizes of the coverage rate sequences, wherein the sorting rule is to firstly select two test vectors of N=0 and N=1, compare the coverage rates of the two test vectors, and reserve the test vector after determining the test vector with large coverage rate as a reference vector for comparing the test coverage rate with the next N+1 test vector;
step 26: judging whether N is equal to M; if N is smaller than M, executing n=n+1, selecting the next test vector to compare with the current test coverage rate vector with the test coverage rate, if the coverage rate of the test vector n+1 is larger, using the test vector n+1 as the test vector for comparing with the test coverage rate later, and if the coverage rate of the original test vector is larger, using the original test item as the comparison vector; if N is equal to M, all the test vectors representing the coverage rate sequence [ N ] are compared, and the finally reserved test vector is used as the test vector with the highest test coverage rate.
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