CN112579512B - Airborne embedded intelligent micro-processing system - Google Patents
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- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
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Abstract
The application provides an airborne embedded intelligent micro-processing system, the system includes: the general computing unit (1) realizes the functions of system management, comprehensive control and data computing; the intelligent computing unit (2) realizes hardware acceleration functions of a decision tree and a neural network intelligent algorithm, and completes intelligent computing tasks of voice recognition, image target detection and decision control; the data storage unit (3) stores application programs, files, algorithm parameters, original data and calculation results; the information security unit (4) realizes the functions of data encryption and decryption, identity authentication and access control; the wired communication interface unit (5) and the wireless communication interface unit (6) realize data communication and configuration debugging functions; an internal interconnection network (7) enables data communication between the internal hardware units. The system adopts a modular heterogeneous multi-core architecture design, and the number and the topological structure of hardware units can be customized according to the requirements of the functions and performance indexes of a specific application scene.
Description
Technical Field
The invention belongs to the field of embedded computing, and relates to an airborne embedded intelligent micro-processing system.
Background
With the increasing requirements on performance, volume, weight and power consumption in recent years, the onboard embedded computer will be developed towards intellectualization, miniaturization and multi-core in the future. The traditional embedded computing system based on a central processing unit, a memory, a signal processor, a communication interface and a plurality of discrete components of a peripheral circuit can hardly meet the requirements of a future onboard embedded computer. Meanwhile, the traditional airborne embedded computer cannot meet the requirements of an artificial intelligence algorithm based on a deep neural network on parallel computation and mass data processing, and a high-performance, high-intelligence and miniaturized airborne embedded computing system is lacked at present.
Disclosure of Invention
In order to solve the problems mentioned in the background, the invention provides an airborne embedded intelligent micro-processing system which can improve the intelligent task capability, processing efficiency and data security of an airborne system.
The application provides an airborne embedded intelligent micro-processing system, airborne embedded intelligent micro-processing system includes general computational unit (1), intelligent computational unit (2), data memory cell (3), information security unit (4), wired communication interface unit (5), wireless communication interface unit (6) and internal interconnection network (7), wherein:
the general computing unit (1) adopts a multi-core CPU, runs an embedded real-time operating system and application software, and is used for realizing the functions of system management, comprehensive control and data computing; the general computing unit (1) is connected with the wired communication interface unit (5) and the wireless communication interface unit (6) through the internal interconnection network (7), receives instructions of external control equipment and original data of external information acquisition equipment through the wired communication interface unit (5) and the wireless communication interface unit (6), and sends processing results to external display equipment and actuating equipment through the wired communication interface unit (5) and the wireless communication interface unit (6); the general computing unit (1) is connected with the data storage unit (3) through an internal interconnection network (7), loads an application program and reads data from the data storage unit (3) for data computing, and stores the computing result in the data storage unit (3); the general computing unit (1) is connected with the intelligent computing unit (2) through an internal interconnection network (7), and the intelligent computing unit (2) is called to complete intelligent computing tasks including voice recognition, image target detection and decision control; the general computing unit (1) is connected with the information security unit (4) through an internal interconnection network (7), and data encryption and decryption and identity authentication algorithms in the information security unit (4) are configured;
the intelligent computing unit (2) adopts DSP, GPU, FPGA and ASIC chips and is used for realizing hardware acceleration functions of decision trees and neural network intelligent algorithms and completing intelligent computing tasks of voice recognition, image target detection and decision control; the intelligent computing unit (2) is connected with the data storage unit (3) and the wired communication interface unit (5) through an internal interconnection network (7), intelligent algorithm parameters in the data storage unit (3) are read, original data of external information acquisition equipment are received through the wired communication interface unit (5), and the intelligent computing units (2) perform parallel computing to finish hardware acceleration of an intelligent algorithm;
the data storage unit (3) comprises a DRAM (dynamic random access memory) and NorFlash and Nand Flash nonvolatile memory banks and is used for storing application programs, files, algorithm parameters, original data and calculation results; the data storage unit (3) is connected with the wired communication interface unit (5) and the wireless communication interface unit (6) through an internal interconnection network (7) and receives application programs, files and algorithm parameters of external control equipment and original data of external information acquisition equipment; the data storage unit (3) is connected with the information security unit (4) through an internal interconnection network (7), and data encryption and decryption are completed through the information security unit (4);
the information security unit (4) comprises data encryption and decryption, identity authentication and authorization and access control functions, and is used for realizing the secure storage and the secure transmission of the key data of the airborne embedded intelligent micro-processing system and forbidding the operation of unauthorized users; the information security unit (4) is connected with the data storage unit (3), the wired communication interface unit (5) and the wireless communication interface unit (6) through an internal interconnection network (7);
the wired communication interface unit (5) comprises PCIE, rapidIO, ethernet, optical fiber channel, RS-232 and JTAG interface types, and is used for realizing wired data communication between the embedded intelligent micro-processing systems and other equipment, and the functions of configuration, debugging and testing of the airborne embedded intelligent micro-processing systems;
the wireless communication interface unit (6) comprises a micro antenna, a modem and an amplifier, supports WIFI, bluetooth, 60GHz and 5G communication protocols, and is used for realizing wireless data communication between the embedded intelligent micro processing systems and other equipment;
the internal interconnection network (7) comprises a bus, a multi-level bus and an interconnection network of a network-on-chip topological structure, and is used for realizing data communication among internal hardware units of the embedded intelligent micro-processing system;
the airborne embedded intelligent micro-processing system is realized by a multi-core SoC chip and a system-in-package SIP.
Preferably, the system adopts a modular heterogeneous multi-core architecture design, the number of the general computing unit (1), the intelligent computing unit (2), the data storage unit (3), the information security unit (4), the wired communication interface unit (5) and the wireless communication interface unit (6) is customized according to the function and performance index requirements of a specific application scene, the parameter configuration of an artificial intelligence algorithm supported by the intelligent computing unit (2) is customized, and the topological structure and the communication protocol of the internal interconnection network (7) are customized.
Preferably, the intelligent computing unit (2) is used for intelligent computing tasks of voice recognition, image target detection and decision control, and supports decision trees, deep neural network intelligent algorithms and reinforcement learning artificial intelligent algorithms; the intelligent computing unit (2) comprises matrix multiplication and addition, convolution, pooling, reLU, sigmoid and Tanh activation function operation; the algorithm parameters and the data format and bit width of the intelligent computing unit (2) are configurable, and the intelligent computing unit comprises 32-bit standard floating point numbers, 16-bit floating point numbers, 32-bit integers, 16-bit integers, 8-bit integers and 4-bit integers.
Preferably, the data storage unit (3) comprises a ROM, a NorFlash and Nand Flash nonvolatile memory bank for fixedly storing an operating system, an application program, a file and algorithm parameters; the data storage unit (3) comprises a large-capacity DRAM memory for storing original data and calculation results; the data storage unit (3) supports PCIE and SATA interfaces.
Preferably, the information security unit (4) encrypts the stored data by using a 128-bit AES key, and executes a data clearing command to delete all data in the data storage unit (3) within 100S; the information security unit (4) has identity authentication based on a lightweight ECC digital certificate and a data security communication function based on a CTR mode, and authenticates a control command and a data access request which pass through the wired communication interface unit (5) and the wireless communication interface unit (6).
Preferably, the wired communication interface unit (5) supports high-speed data communication between the embedded intelligent processing micro-system and other devices through PCIE, rapidIO, ethernet and fiber channel interfaces, and supports algorithm and parameter configuration and function test through RS-232 and JTAG interfaces.
Preferably, the wireless communication interface unit (6) can select a communication module with multiple wireless communication protocols, short-distance low-speed wireless data communication between the embedded intelligent processing micro-system and other equipment selects WIFI and Bluetooth, a 60GHz wireless data communication protocol is selected for high speed, and long-distance wireless data between the embedded intelligent processing micro-system and other equipment selects a 5G communication protocol.
Preferably, the internal interconnection network (7) can select various topological structures, and when the number of the processing units contained in the embedded intelligent processing micro-system is less than 10, a bus network is selected; when the number of processing units contained in the embedded intelligent processing micro-system is more than 10 and less than 64, a multi-level bus network is selected; when the number of the processing units contained in the embedded intelligent processing micro-system is more than 64, the network-on-chip with a grid structure is selected.
The invention has the advantages that: the airborne embedded intelligent micro-processing system can customize the types and the number of heterogeneous multi-core units according to the requirements of functions and performance indexes of a specific application scene, and can be realized based on multi-core SoC chips, SIP and FPGA hardware modes, so that the volume, weight and power consumption of the airborne embedded computing system are reduced, and the processing efficiency and the resource utilization rate of the airborne embedded computing system are improved; the heterogeneous multi-core airborne embedded intelligent micro-processing system comprises general computation, intelligent computation, data storage, information safety, an internal interconnection network, a wired communication interface and a wireless communication interface type hardware unit, so that the future airborne embedded computing system has the capabilities of high-performance computation, intelligent task acceleration, wireless data communication and information safety protection.
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FIG. 1 is a schematic diagram of a hardware architecture of an onboard embedded intelligent micro-processing system according to an embodiment of the present invention;
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings.
Referring to fig. 1, a schematic diagram of a hardware structure of an onboard embedded intelligent micro-processing system with heterogeneous multi-core according to an embodiment of the present invention is provided. The heterogeneous multi-core airborne embedded intelligent micro-processing system comprises:
a general purpose computing unit: the system management, comprehensive control and data calculation functions are realized, and an embedded operating system and application software are operated;
the intelligent computing unit: hardware acceleration functions of a convolutional neural network and a cyclic neural network artificial intelligence algorithm are realized;
a data storage unit: the large-capacity data storage of various data and programs is realized, and the high data access bandwidth is realized;
an information security unit: the functions of data encryption and decryption and access control are realized, and the safe storage and safe transmission of the key data of the airborne embedded intelligent micro-processing system are ensured;
a wired communication interface unit: the wired data communication between the embedded intelligent micro-processing systems and other equipment is realized, and the configuration, debugging and testing functions of the airborne embedded intelligent micro-processing system are realized, wherein the functions comprise an Ethernet interface, a serial port and an optical fiber interface;
a wireless communication interface unit: wireless data communication between the embedded intelligent micro-processing systems and other equipment is realized, and the wireless data communication comprises a micro antenna, a modem and an amplifier;
internal interconnection network: the data communication between the hardware units in the embedded intelligent micro-processing system is realized, and the embedded intelligent micro-processing system comprises a bus, a multi-level bus and a network on chip.
The heterogeneous multi-core airborne embedded intelligent micro-processing system provided by the embodiment of the disclosure comprises general computation, intelligent computation, data storage, information security, an internal interconnection network, a wired communication interface and a wireless communication interface type hardware unit, can customize the type and the number of heterogeneous multi-core units according to the function and performance index requirements of a specific application scene, can be realized based on multi-core SoC chips, SIP and FPGA hardware modes, can obviously reduce the volume, weight and power consumption of the airborne embedded computing system, and improves the processing efficiency and the resource utilization rate of the airborne embedded computing system.
The invention provides an airborne embedded intelligent micro-processing system facing the requirements of future intelligent miniaturized airborne embedded computers and based on the design idea of a modularized heterogeneous multi-core architecture, according to the task requirements of the future airborne embedded computers, the airborne embedded intelligent micro-processing system comprises general computation, intelligent computation, data storage, information safety, an internal interconnection network, a wired communication interface and a wireless communication interface type hardware unit, the type and the number of heterogeneous multi-core units can be customized according to the function and performance index requirements of specific application scenes, an airborne embedded intelligent micro-processing system type spectrum is formed, and the intelligent task capability, the processing efficiency and the data safety of the airborne system are finally improved.
The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present disclosure should be covered within the scope of the present disclosure. Therefore, the scope of protection not disclosed should be dominated by the scope of protection claimed.
Claims (6)
1. The utility model provides an airborne embedded intelligent micro-processing system which characterized in that, airborne embedded intelligent micro-processing system includes general purpose computing unit (1), intelligent computing unit (2), data memory cell (3), information security unit (4), wired communication interface unit (5), wireless communication interface unit (6) and internal interconnection network (7), wherein:
the general computing unit (1) adopts a multi-core CPU, runs an embedded real-time operating system and application software, and is used for realizing the functions of system management, comprehensive control and data computing; the general computing unit (1) is connected with the wired communication interface unit (5) and the wireless communication interface unit (6) through the internal interconnection network (7), receives instructions of external control equipment and original data of external information acquisition equipment through the wired communication interface unit (5) and the wireless communication interface unit (6), and sends processing results to external display equipment and actuating equipment through the wired communication interface unit (5) and the wireless communication interface unit (6); the general computing unit (1) is connected with the data storage unit (3) through an internal interconnection network (7), loads an application program and reads data from the data storage unit (3) for data computing, and stores the computing result in the data storage unit (3); the general computing unit (1) is connected with the intelligent computing unit (2) through an internal interconnection network (7), and the intelligent computing unit (2) is called to complete intelligent computing tasks including voice recognition, image target detection and decision control; the general computing unit (1) is connected with the information security unit (4) through an internal interconnection network (7), and data encryption and decryption and identity authentication algorithms in the information security unit (4) are configured;
the intelligent computing unit (2) adopts DSP, GPU, FPGA and ASIC chips and is used for realizing hardware acceleration functions of decision trees and neural network intelligent algorithms and completing intelligent computing tasks of voice recognition, image target detection and decision control; the intelligent computing unit (2) is connected with the data storage unit (3) and the wired communication interface unit (5) through an internal interconnection network (7), intelligent algorithm parameters in the data storage unit (3) are read, original data of external information acquisition equipment are received through the wired communication interface unit (5), and the intelligent computing units (2) perform parallel computing to finish hardware acceleration of an intelligent algorithm;
the data storage unit (3) comprises a DRAM (dynamic random access memory) and a NorFlash and Nand Flash nonvolatile memory body and is used for storing application programs, files, algorithm parameters, original data and calculation results; the data storage unit (3) is connected with the wired communication interface unit (5) and the wireless communication interface unit (6) through an internal interconnection network (7) and receives application programs, files and algorithm parameters of external control equipment and original data of external information acquisition equipment; the data storage unit (3) is connected with the information security unit (4) through an internal interconnection network (7), and data encryption and decryption are completed through the information security unit (4);
the information security unit (4) comprises data encryption and decryption, identity authentication and authorization and access control functions, and is used for realizing the secure storage and the secure transmission of the key data of the airborne embedded intelligent micro-processing system and forbidding the operation of unauthorized users; the information security unit (4) is connected with the data storage unit (3), the wired communication interface unit (5) and the wireless communication interface unit (6) through an internal interconnection network (7);
the wired communication interface unit (5) comprises PCIE, rapidIO, ethernet, optical fiber channel, RS-232 and JTAG interface types, and is used for realizing wired data communication between the embedded intelligent micro-processing systems and other equipment, and the functions of configuration, debugging and testing of the airborne embedded intelligent micro-processing systems;
the wireless communication interface unit (6) comprises a micro antenna, a modem and an amplifier, supports WIFI, bluetooth, 60GHz and 5G communication protocols, and is used for realizing wireless data communication between the embedded intelligent micro processing systems and other equipment;
the internal interconnection network (7) comprises a bus, a multi-level bus and an interconnection network of a network-on-chip topological structure, and is used for realizing data communication among internal hardware units of the embedded intelligent micro-processing system;
the airborne embedded intelligent micro-processing system is realized by a multi-core SoC chip and a system-in-package SIP;
the system adopts a modular heterogeneous multi-core architecture design, the number of a general computing unit (1), an intelligent computing unit (2), a data storage unit (3), an information security unit (4), a wired communication interface unit (5) and a wireless communication interface unit (6) is customized according to the function and performance index requirements of a specific application scene, the parameter configuration of an artificial intelligence algorithm supported by the intelligent computing unit (2) is customized, and the topological structure and the communication protocol of an internal interconnection network (7) are customized;
the information security unit (4) encrypts the stored data by using a 128-bit AES key, and executes a data clearing command to delete all data in the data storage unit (3) within 100S; the information security unit (4) has identity authentication based on a lightweight ECC digital certificate and a data security communication function based on a CTR mode, and authenticates a control command and a data access request which pass through a wired communication interface unit (5) and a wireless communication interface unit (6).
2. The system according to claim 1, wherein the intelligent computing unit (2) is used for intelligent computing tasks of voice recognition, image target detection and decision control, and supports decision trees, deep neural network intelligent algorithms and reinforcement learning artificial intelligent algorithms; the intelligent computing unit (2) comprises matrix multiplication and addition, convolution, pooling, reLU, sigmoid and Tanh activation function operation; the algorithm parameters and the data format and bit width of the intelligent computing unit (2) are configurable, and the intelligent computing unit comprises a 32-bit standard floating point number, a 16-bit floating point number, a 32-bit integer, a 16-bit integer, an 8-bit integer and a 4-bit integer.
3. The system according to claim 1, characterized in that the data storage unit (3) comprises ROM, norFlash, nand Flash non-volatile memory banks, fixed storage operating system, application programs, files, algorithm parameters; the data storage unit (3) comprises a high-capacity DRAM memory for storing original data and calculation results; the data storage unit (3) supports PCIE and SATA interfaces.
4. The system according to claim 1, wherein the wired communication interface unit (5) supports high-speed data communication between the embedded intelligent micro-processing system and other devices through PCIE, rapidIO, ethernet and fibre channel interface, and supports algorithm and parameter configuration and function test through RS-232 and JTAG interfaces.
5. The system of claim 1, wherein the wireless communication interface unit (6) is capable of selecting a communication module of multiple wireless communication protocols, short-distance low-speed wireless data communication between the embedded intelligent micro-processing system and other devices is achieved by using WIFI and Bluetooth, high-speed wireless data communication protocol is achieved by using 60GHz, and long-distance wireless data communication between the embedded intelligent micro-processing system and other devices is achieved by using 5G communication protocol.
6. The system according to claim 1, wherein said internal interconnection network (7) is capable of selecting a plurality of topologies, and when the number of processing units included in said embedded intelligent microprocessor system is less than 10, a bus network is selected; when the number of processing units contained in the embedded intelligent micro-processing system is more than 10 and less than 64, a multi-level bus network is selected; when the number of the processing units contained in the embedded intelligent micro-processing system is more than 64, the network-on-chip with a grid structure is selected.
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