CN112562497A - Display panel and preparation method thereof - Google Patents
Display panel and preparation method thereof Download PDFInfo
- Publication number
- CN112562497A CN112562497A CN202011415619.0A CN202011415619A CN112562497A CN 112562497 A CN112562497 A CN 112562497A CN 202011415619 A CN202011415619 A CN 202011415619A CN 112562497 A CN112562497 A CN 112562497A
- Authority
- CN
- China
- Prior art keywords
- substrate
- retaining wall
- layer
- area
- display panel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The embodiment of the invention relates to the technical field of display, and discloses a display panel, which comprises a substrate and a wiring layer arranged on the surface of the substrate; the substrate comprises a substrate and a retaining wall positioned on one side of the substrate close to the routing layer; the substrate is provided with a first sunken area at one side close to the routing layer, and the orthographic projection of the first sunken area on the top surface of the retaining wall far away from the substrate at least partially covers the top surface of the retaining wall far away from the substrate; the wiring layer is provided with a second concave area, and the second concave area at least partially covers the first concave area in the orthographic projection of the substrate. According to the display panel and the preparation method of the display panel, the preparation yield of the wiring layer above the retaining wall is improved, so that the finished product yield of the display panel is improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel and a preparation method of the display panel.
Background
The conventional display panel generally adopts a thin film packaging structure to package a display device, so as to prevent water and oxygen from invading the display device, thereby causing the failure of the display device. The thin film packaging structure comprises a plurality of layers of inorganic layers and organic layers which are stacked alternately, the organic layers are formed between the inorganic layers and are coated by the inorganic layers, so that the effects of flatness and stress release are realized, meanwhile, a retaining wall with a certain height is formed on the substrate, the organic layers are prevented from overflowing out of the inorganic layers in the organic layer forming process, and the packaging reliability of the thin film packaging structure is ensured.
However, the inventors found that short circuit or open circuit is likely to occur when the routing layer is prepared on the retaining wall in the display panel, and the yield of the preparation of the routing layer above the retaining wall is not high, resulting in low yield of the finished product of the display panel.
Disclosure of Invention
The embodiment of the invention aims to provide a display panel and a preparation method of the display panel, which improve the preparation yield of a wiring layer above a retaining wall so as to improve the finished product yield of the display panel.
To solve the above technical problem, an embodiment of the present invention provides a display panel including: the wiring layer is arranged on the surface of the substrate; the substrate comprises a substrate and a retaining wall positioned on one side of the substrate close to the routing layer; the substrate is provided with a first sunken area at one side close to the routing layer, and the orthographic projection of the first sunken area on the top surface of the retaining wall far away from the substrate at least partially covers the top surface of the retaining wall far away from the substrate; the wiring layer is provided with a second concave area, and the second concave area at least partially covers the first concave area in the orthographic projection of the substrate.
In addition, the substrate further includes: the inorganic layer is positioned on one side of the retaining wall, which is far away from the substrate, and the routing layer is positioned on one side of the inorganic layer, which is far away from the substrate; at least one of the retaining wall and the inorganic layer is provided with a thinning area so as to form the first concave area; alternatively, the substrate further comprises: the inorganic layer and the buffer layer are stacked on one side, away from the substrate, of the retaining wall, and the routing layer is located on one side, away from the substrate, of the buffer layer; at least one of the retaining wall, the inorganic layer and the buffer layer is provided with a thinning area so as to form the first depressed area.
In addition, the depth of the first concave region is between 0.45 and 1.35 microns in the direction perpendicular to the substrate. Because the depth of the first depressed area is 0.45-1.35 microns, the depth of the second depressed area is approximately the same as the depth of the first depressed area and is also 0.45-1.35 microns, and the thickness of the photoresist reserved on the second depressed area is approximately 1 micron-1.9 microns, so that the thickness of the photoresist above the routing layer on the retaining wall is approximately the same as that of the photoresist on the substrate, and the condition that the routing layer above the retaining wall is short-circuited or broken-circuited due to the loss of the photoresist above the routing layer on the retaining wall is improved.
In addition, the depth of the first recessed region is 0.5 micrometers.
In addition, the opening area of the first recess region gradually increases in a direction away from the substrate. In the embodiment of the scheme, the first concave area is set to be in a shape with a wide upper part and a narrow lower part, so that the side wall of the position where the second concave area is located can retain the photoresist coated during the patterning routing layer; therefore, the situation that the wiring layer above the retaining wall is short-circuited or broken-circuited due to the fact that the first concave area is set to be a structure with a narrow upper part and a wide lower part and photoresist cannot be reserved is avoided.
In addition, the orthographic projection of the first concave region on the top surface of the retaining wall far away from the substrate completely covers the top surface of the retaining wall far away from the substrate; or the first recessed area is far away from the opening edge of the substrate, and is separated from the top surface edge of the substrate by a preset distance with the retaining wall.
In addition, the cross section of the first concave region in the direction vertical to the substrate is in an inverted trapezoid or arc shape. Because the structure that the slope of falling is gentle is to falling trapezoidal and arc, so, also gentle with the slope of falling of the just right section shape of second depressed area of first depressed area for the photoresist thickness of second depressed area top is comparatively even, avoids the photoresist thickness of second depressed area top to differ, and leads to the condition of the routing layer short circuit of second depressed area position or open circuit.
In addition, the first recessed area has a smooth inner wall surface. In this case, it is convenient to prepare the first recessed area having a smooth inner wall surface.
In addition, in the direction perpendicular to the substrate, the cross section of the retaining wall is trapezoidal, and the bottom angle is between 30 and 60 degrees. The sectional shape preparation of barricade is trapezoidal in this scheme, and trapezoidal base angle is between 30 ~ 60, and the slope of barricade lateral wall is comparatively mitigateed, can keep the photoresist of barricade lateral wall top betterly to avoided the barricade lateral wall slope to be steeper makes the photoresist of domatic top can't keep falling on the base plate, lead to the condition that the routing layer is thin on a side, resistance is great on the base plate.
In addition, the routing layer at least comprises one or any combination of the following: data routing layer, signal routing layer.
The embodiment of the invention also provides a preparation method of the display panel, which comprises the following steps: providing a substrate; the base plate surface forms the routing layer, wherein, the base plate includes the substrate and is located the substrate is close to the barricade of routing layer one side, the base plate is close to routing layer one side has first depressed area, first depressed area is in the barricade is kept away from the orthographic projection of the top surface of substrate at least partly covers the barricade is kept away from the top surface of substrate, the routing layer has the second depressed area, the second depressed area is in the orthographic projection of base plate at least partly covers first depressed area.
Compared with the related art, the embodiment of the invention provides a display panel, wherein the surface of the substrate on the side close to the routing layer is provided with a first concave region, and an orthographic projection of the first concave region on the top surface of the retaining wall far from the substrate at least partially covers the top surface of the retaining wall far from the substrate, so that an orthographic projection of the second concave region on the top surface of the retaining wall far from the substrate also at least partially covers the top surface of the retaining wall far from the substrate. Due to the existence of the second sunken area, the photoresist above the routing layer on the retaining wall can be retained during patterning of the routing layer, so that the thickness of the photoresist above the routing layer on the retaining wall is approximately the same as that of the photoresist on the substrate; the situation that the photoresist is too thin above the wiring layer on the retaining wall, so that the photoresist is consumed completely too early, and the part of the wiring layer above the retaining wall is broken during dry etching is avoided; or the photoresist above the wiring layer on the retaining wall falls on the substrate, so that the photoresist on the substrate is too thick and cannot be etched to cause short circuit during exposure and development, and the preparation yield of the wiring layer above the retaining wall is improved, and the finished product yield of the display panel is improved.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic cross-sectional structural diagram of a display panel according to a first embodiment of the present invention;
fig. 3 is a schematic cross-sectional structural diagram of a display panel according to a second embodiment of the present invention;
fig. 4 is a schematic cross-sectional structural diagram of a display panel according to a third embodiment of the present invention;
fig. 5 is a schematic cross-sectional structural diagram of a display panel according to a fourth embodiment of the invention;
fig. 6 is a schematic cross-sectional structural view of a display panel according to a fifth embodiment of the present invention;
fig. 7 is a schematic cross-sectional structural diagram of a display panel according to a sixth embodiment of the invention;
fig. 8 is a schematic flow chart of a method for manufacturing a display panel according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that numerous technical details are set forth in order to provide a better understanding of the present application in various embodiments of the present invention. However, the technical solution claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments.
In the conventional display panel, a retaining wall with a certain height is usually formed on a substrate, and then a thin film encapsulation layer is formed above the retaining wall to prevent an organic layer in the thin film encapsulation layer from overflowing to the outside of an inorganic layer to cause encapsulation failure in the process of forming the organic layer. Therefore, the wiring layer located in the display area and above the packaging layer needs to be electrically connected with the IC or FPC circuit board in the non-display area through the retaining wall, so that signal conduction is realized.
When the wiring layer above the packaging layer is patterned, photoresist needs to be coated on the wiring layer, and due to the height difference between the retaining wall and the substrate, the photoresist above the wiring layer on the retaining wall is easy to flow down to fall on the substrate, so that the photoresist above the wiring layer on the retaining wall is too thin, the photoresist is consumed early, and the part of the wiring layer above the retaining wall is broken during dry etching; or, the photoresist on the substrate is too thick and cannot be etched away during exposure and development, so that a short circuit occurs, and the preparation yield of the routing layer above the retaining wall is not high, so that the yield of the finished product of the display panel is not high.
In view of the above, the present invention relates to a display panel, and the core of the present application is a display panel including: a substrate and a wiring layer 4 arranged on the surface of the substrate; the substrate comprises a substrate 1 and a retaining wall 3 positioned on one side of the substrate 1 close to a routing layer 4; the side of the substrate close to the routing layer 4 is provided with a first concave area 30, and the orthographic projection of the first concave area 30 on the top surface of the retaining wall 3 far away from the substrate 1 at least partially covers the top surface of the retaining wall 3 far away from the substrate 1; the wiring layer 4 has a second recess 40, and the second recess 40 at least partially covers the first recess 30 in an orthographic projection of the substrate.
The surface of the substrate close to one side of the wiring layer 4 is provided with a first concave area 30, so that the wiring layer 4 formed on the substrate is provided with a second concave area 40 opposite to the first concave area 30; and because the orthographic projection of the first concave region 30 on the top surface of the retaining wall 3 far from the substrate 1 at least partially covers the top surface of the retaining wall 3 far from the substrate 1, the orthographic projection of the second concave region 40 on the top surface of the retaining wall 3 far from the substrate 1 also at least partially covers the top surface of the retaining wall 3 far from the substrate 1. Due to the existence of the second recessed area 40, the photoresist above the routing layer 4 on the retaining wall 4 can be retained during patterning of the routing layer 4, and the influence of the height difference between the retaining wall area and the non-retaining wall area on the photoresist thickness is weakened or even eliminated, so that the photoresist thickness above the routing layer 4 on the retaining wall 3 is approximately the same as the photoresist thickness of the non-retaining wall area on the substrate; the situation that the photoresist is too early and completely consumed due to the fact that the photoresist above the routing layer 4 on the retaining wall 3 is too thin and the part of the routing layer 4 above the retaining wall 3 is broken during dry etching is avoided; or, the photoresist above the routing layer 4 on the retaining wall 3 falls on the substrate, which causes the photoresist in the non-retaining wall area of the substrate to be too thick, and the photoresist cannot be etched during exposure and development to cause short circuit, thereby improving the preparation yield of the routing layer 4 above the retaining wall 3 and improving the finished product yield of the display panel.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the present disclosure; fig. 2 to fig. 7 are schematic cross-sectional structural diagrams of display panels according to different embodiments provided in the present application, and the cross-sectional directions are along AA' direction shown in fig. 1. The following detailed description of the display panel of the present application is provided in conjunction with fig. 1-7, and the following description is provided only for the convenience of understanding and is not necessary to implement the present invention.
As shown in fig. 2 to 6, in this embodiment, the substrate further includes: the inorganic layer is located on the side of the retaining wall 3, which faces away from the substrate 1, the routing layer 4 is located on the side of the inorganic layer, which faces away from the substrate 1, and at least one of the retaining wall 3 and the inorganic layer has a thinning area to form a first recessed area 30. At least one of the retaining wall 3 and the inorganic layer has a thinning region, that is, a partial region of at least one of the retaining wall 3 and the inorganic layer is thinned. It can be understood that the orthographic projection of the thinned area on the retaining wall 3 overlaps at least part of the area on the upper surface of the retaining wall 3, so that a sunken area exists in the area of the substrate corresponding to the retaining wall 3, and the problem of large difference of the thickness of the photoresist on the routing layer of the retaining wall area and the non-retaining wall area caused by the existence of the retaining wall 3 can be solved, thereby improving the preparation yield of the routing layer of the display panel. Of course, the regions of the retaining wall 3 and the inorganic layer corresponding to the retaining wall may be thinned at the same time, as long as the first recess 30 can be formed in the substrate, and the application is not limited to which film has the thinned region.
As shown in fig. 7, in this embodiment, the substrate may further include an inorganic layer and a buffer layer 5 stacked on the side of the retaining wall 3 away from the substrate, and the buffer layer 5 is located on the side of the inorganic layer away from the substrate 1, at least one of the retaining wall 3, the inorganic layer, and the buffer layer 5 having a thinning region to form the first recess region 30.
The substrate is divided into a display area 101 and a non-display area 102 located at the periphery of the display area 101. The substrate further includes: a light emitting device layer (not shown in the drawing) positioned in the display region 101, and a thin film encapsulation layer 2 positioned above the light emitting device layer, the thin film encapsulation layer 2 including a plurality of inorganic layers and organic layers alternately stacked on the light emitting device layer. In the embodiment, the thin film encapsulation layer 2 includes a first inorganic layer 21, an organic layer 22 and a second inorganic layer 23, which are only illustrated here, and the number of the organic layer and the inorganic layer can be set according to actual requirements in practical applications. The retaining wall 3 is located on the substrate 1 and the inorganic layer, in this embodiment, the first inorganic layer 21 is located on one side of the second inorganic layer 22 close to the substrate 1, the retaining wall 3 is located between the first inorganic layer 21 and the substrate 1, and the retaining wall 3 is located on the periphery of the display region 101 and is disposed around the light emitting device layer, so as to play a role of blocking when forming an organic layer of the encapsulation layer, avoid overflow of the organic layer, and improve the encapsulation effect. The number of the retaining walls 3 can be set according to actual conditions, if the retaining wall 3 comprises a first retaining wall and a second retaining wall, the second retaining wall surrounds the first retaining wall, and the second retaining wall is arranged on one side, far away from the display area, of the first retaining wall, so that the packaging effect is improved. The wiring layer 4 is arranged above the inorganic layer, and the wiring layer 4 in the display area 101 needs to be electrically connected with structures such as an IC or an FPC (flexible printed circuit) board in the non-display area 102 after passing through the retaining wall 3, so that signal conduction is realized.
At least one of the retaining wall 3 and the inorganic layer is thinned to form a thinned region, and the other layers are normally formed to form the first recessed region 30. Referring to fig. 2-4, only one of the retaining wall 3 and the inorganic layer is thinned, specifically, the side of the retaining wall 3 away from the substrate 1 has a thinned region, so that a first recessed region 30 is formed on the surface of the substrate close to the routing layer 4.
Specifically, a thinned region is formed by thinning design on the side of the retaining wall 3 facing away from the substrate 1, and the thinned region at least partially covers the top surface of the retaining wall 3 facing away from the substrate 1. Due to the existence of the thinned region on the dam, other layers (e.g., the first inorganic layer 21 and the second inorganic layer 23) formed above the dam 3 are recessed, so that the surface of the substrate on the side close to the routing layer 4 has a first recessed region 30. Due to the first recessed area 30, the wiring layer 4 formed on the substrate has a second recessed area 40 opposite to the first recessed area 30.
As shown in fig. 5 or fig. 6, in this embodiment, the side of the inorganic layer facing away from substrate 1 has a thinned region, so that the surface of the substrate near routing layer 4 forms a first recessed region 30.
Specifically, the inorganic layer is an inorganic layer in the thin film encapsulation layer 2, and when the inorganic layer includes a plurality of sublayers, a thinning region may be formed in any sublayer, or each layer may be thinned. As shown in fig. 5, the inorganic layer includes a first inorganic layer 21 and a second inorganic layer 23, and a thinning region is formed by thinning design on a side of the first inorganic layer 21 away from the substrate 1, and the thinning region at least partially covers the top surface of the retaining wall 3 away from the substrate 1 in an orthographic projection of the retaining wall 3 away from the top surface of the substrate 1. Due to the presence of the thinned region on the first inorganic layer 21, other film layers (e.g., the second inorganic layer 23) formed above the first inorganic layer 21 are recessed, so that the surface of the substrate on the side close to the routing layer 4 has a first recessed region 30. Due to the first recessed area 30, the wiring layer 4 formed on the substrate has a second recessed area 40 opposite to the first recessed area 30.
As shown in fig. 6, a thinning region is formed by thinning design on the side of the second inorganic layer 23 away from the substrate 1, and the thinning region at least partially covers the top surface of the retaining wall 3 away from the substrate 1 in the orthographic projection of the retaining wall 3 away from the top surface of the substrate 1. Due to the presence of the thinned region on the second inorganic layer 23, the surface of the substrate on the side close to the routing layer 4 has a first recessed region 30. Due to the presence of the first recessed area 30, the routing layer 4 formed on the substrate has a second recessed area 40 directly opposite to the first recessed area 30.
In other embodiments, the retaining wall 3 and the inorganic layer may be thinned. Specifically, in one embodiment, the side of the retaining wall 3 away from the substrate 1 and the side of the inorganic layer away from the substrate 1 are both formed with a thinning design to form a thinning area, so that the surface of the substrate close to the routing layer 4 forms a first recessed area 30.
Since the inorganic layer includes: therefore, in this embodiment, when the retaining wall 3, the first inorganic layer 21, and the second inorganic layer 23 are thinned, or the retaining wall 3 and the first inorganic layer 21 are thinned, or the retaining wall 3 and the second inorganic layer 23 are thinned.
It should be noted that in the above three implementations, the depth of the first recessed area 30 is substantially the same as the recessed depth of the second recessed area 40; and the cross-sectional shape of the first recess region 30 is substantially the same as the cross-sectional shape of the second recess region 40 in a direction perpendicular to the substrate 1.
Further, the routing layer 4 includes a touch routing layer, so as to detect a touch operation of a user. Routing layer 4 includes at least one or any combination of the following: the data routing layer is used for transmitting data signals, and the signal routing layer is used for transmitting scanning signals.
In one embodiment, the depth of the first recessed region 30 is between 0.45 microns and 1.35 microns in a direction perpendicular to the substrate 1.
Specifically, the thickness of the photoresist applied over routing layer 4 during patterning routing layer 4 is varied due to the presence of retaining walls 3. the inventors have found that the normal thickness of the photoresist on the substrate is about 1.5 microns to about 1.9 microns, while the thickness of the photoresist over routing layer 4 on retaining walls 3 is about 0.55 microns and the thickness of the photoresist on the substrate at the bottom of retaining walls 3 is about 3.85 microns. In the embodiment, the depth of the first recessed region 30 is between 0.45 and 1.35 microns in the direction perpendicular to the substrate 1, and the depth of the second recessed region 40 is between 0.45 and 1.35 microns because the depth of the first recessed region 30 is substantially the same as the recessed depth of the first recessed region 30 and the recessed depth of the second recessed region 40. The inventor finds that: the second recessed area 40 can retain the photoresist coated during patterning of the routing layer 4, and the thickness of the photoresist retained on the second recessed area 40 is approximately 1 micrometer to 1.9 micrometers, so that the thickness of the photoresist above the routing layer 4 on the retaining wall 3 is approximately the same as that of the photoresist on the substrate, and the short circuit or open circuit of the routing layer 4 above the retaining wall 3 caused by the loss of the photoresist above the routing layer 4 on the retaining wall 3 is improved.
Preferably, the depth of the first recessed region 30 is 0.5 microns, and at this time, the depth of the second recessed region 40 is also approximately 0.5 microns, and the thickness of the photoresist on the second recessed region 40 is approximately 1.05 microns.
Further, the opening area of the first recess region 30 gradually increases in a direction away from the substrate 1. Since the cross-sectional shape of the first recessed area 30 is substantially the same as the cross-sectional shape of the second recessed area 40 in the direction perpendicular to the substrate 1, the first recessed area 30 is set to have a shape with a wide top and a narrow bottom, so that the photoresist applied when patterning the routing layer 4 can be retained by the sidewall of the second recessed area 40; therefore, the situation that the first recessed area 30 is set to be a structure with a narrow top and a wide bottom and cannot retain photoresist, so that the wiring layer 4 above the retaining wall 3 is short-circuited or broken is avoided.
As one way of realization, as shown in fig. 3, the orthographic projection of the first recess 30 on the top surface of the retaining wall 3 away from the substrate 1 completely covers the top surface of the retaining wall 3 away from the substrate 1. Since the cross-sectional shape of the first recessed area 30 is substantially the same as the cross-sectional shape of the second recessed area 40 in the direction perpendicular to the substrate 1, when the orthographic projection of the first recessed area 30 on the top surface of the retaining wall 3 away from the substrate 1 completely covers the top surface of the retaining wall 3 away from the substrate 1, the orthographic projection of the second recessed area 40 on the top surface of the retaining wall 3 away from the substrate 1 also completely covers the top surface of the retaining wall 3 away from the substrate 1, so that the thickness of the photoresist above the second recessed area 40 is relatively uniform, and the situation that the routing layer 4 at the position of the second recessed area 40 is short-circuited or open-circuited due to a relatively large difference in the thickness of the photoresist above the second recessed area 40 is avoided.
As another alternative, as shown in fig. 4, the first recess region 30 is spaced apart from the edge of the opening of the substrate 1 by a predetermined distance from the edge of the top surface of the retaining wall 3 away from the substrate 1. Because the cross-sectional shape of the first recessed area 30 is substantially the same as the cross-sectional shape of the second recessed area 40 in the direction perpendicular to the substrate 1, the opening edge of the recessed portion of the second recessed area 40 is spaced from the top surface edge of the retaining wall 3 away from the substrate 1 by a predetermined distance, so that the condition that the wiring layer 4 cannot form a film and is broken at the joint due to a small angle formed at the joint between the opening edge and the top surface edge of the retaining wall 3 away from the substrate 1 is avoided, and the preparation reliability of the display panel is improved.
It should be noted that, since the opening edge of the first recess 30 is spaced from the edge of the top surface of the retaining wall 3 away from the substrate 1 by a predetermined distance, if the predetermined distance is too large, the photoresist thickness above the second recess 40 may have a large difference, and to avoid this, assuming that the first distance is between the center point of the top surface of the substrate 1 and the edge of the top surface of the retaining wall 3 in the present embodiment, the predetermined distance cannot be greater than one-half of the first distance.
Further, the cross-sectional shape of the first recessed area 30 in the direction perpendicular to the substrate 1 is an inverted trapezoid or an arc.
In the present embodiment, the cross-sectional shape of the first recessed area 30 in the direction perpendicular to the substrate 1 is given, the cross-sectional shape of the first recessed area 30 is an inverted trapezoid as shown in fig. 2, and the cross-sectional shape of the first recessed area 30 is an inverted trapezoid as shown in fig. 3. The inverted trapezoid and the arc are in shapes with a gentle descending gradient. Because the cross-sectional shape of the first recessed area 30 is substantially the same as the cross-sectional shape of the first recessed area and the cross-sectional shape of the second recessed area 40 in the direction perpendicular to the substrate 1, the descending slope of the second recessed area 40 is also gentle, so that the thickness of the photoresist above the second recessed area 40 is uniform, and the situation that the routing layer 4 at the position of the second recessed area 40 is short-circuited or open-circuited due to the non-uniform thickness of the photoresist above the second recessed area 40 is avoided.
It should be noted that the shape of the first recessed area 30 in the present embodiment may also be other shapes, and as long as the descending gradient of the first recessed area 30 is gentle, the purpose of the present embodiment can be achieved, which is not exhaustive in the present embodiment. The descending slopes of the inverted trapezoid and the arc can be reduced in this embodiment to further ensure the uniformity of the photoresist thickness above the second recess 40.
It is realized that the inner wall surface of the first recessed area 30 may be stepped, and for the convenience of preparation, the first recessed area 30 has a smooth inner wall surface in the present embodiment.
In the direction perpendicular to the substrate 1, the cross-sectional shape of the retaining wall 3 is a trapezoid, and the base angle of the trapezoid is between 30 and 60 degrees. The section shape preparation with barricade 3 is trapezoidal in this embodiment, and trapezoidal base angle is between 30 ~ 60, and the slope of 3 lateral walls of barricade is comparatively mild, can keep the photoresist of 3 lateral walls tops of barricade betterly to avoided 3 lateral walls slopes of barricade steep and lead to the photoresist of domatic top to remain on the base plate, so lead to walking the circumstances that the line is thin partially, resistance is great when carrying out exposure development.
Compared with the related art, the embodiment of the invention provides a display panel, because the surface of the substrate on the side close to the routing layer 4 is provided with the first recessed area 30, the routing layer 4 formed on the substrate is provided with the first recessed area 30 which at least partially covers the top surface of the retaining wall 3 far away from the substrate 1 in the orthographic projection of the retaining wall 3 far away from the top surface of the substrate 1, and therefore, the second recessed area 40 is at least partially arranged to cover the top surface of the retaining wall 3 far away from the substrate 1 in the orthographic projection of the retaining wall 3 far away from the top surface of the substrate 1. Due to the existence of the second recessed area 40, the photoresist above the routing layer 4 on the retaining wall 3 can be retained when patterning the routing layer 4, so that the thickness of the photoresist above the routing layer 4 on the retaining wall 3 is approximately the same as that of the photoresist on the substrate; the situation that the photoresist is too early and completely consumed due to the fact that the photoresist above the routing layer 4 on the retaining wall 3 is too thin and the part of the routing layer 4 above the retaining wall 3 is broken during dry etching is avoided; or, the photoresist above the wiring layer 4 on the retaining wall 3 falls on the substrate, so that the photoresist on the substrate is too thick and cannot be etched during exposure and development to cause short circuit, thereby improving the preparation yield of the wiring layer 4 above the retaining wall 3 and improving the finished product yield of the display panel.
As shown in fig. 7, this embodiment is substantially the same as the embodiment shown in fig. 1 to 6, except that the substrate in this embodiment further includes: and the inorganic layer and the buffer layer 5 are stacked on one side of the retaining wall 3, which is far away from the substrate 1, the routing layer 4 is positioned on one side of the buffer layer 5, which is far away from the substrate 1, and at least one of the retaining wall 3, the inorganic layer and the buffer layer 5 is provided with a thinning area so as to form a first recessed area 30.
Specifically, the substrate of this embodiment has substantially the same structure as the substrate of the embodiment shown in fig. 1 to 6, except that the substrate of this embodiment further includes a buffer layer 5 between the inorganic layer and the wiring layer 4.
When the substrate further includes an inorganic layer and a buffer layer, at least one of the retaining wall 3, the inorganic layer and the buffer layer 5 is thinned to form a thinned region, and the other layers are normally fabricated to form the first recess region 30.
In one embodiment, one of the retaining wall 3, the inorganic layer and the buffer layer 5 is thinned. The specific retaining wall 3 is provided with a thinning area at the side away from the substrate 1, so that a first concave area 30 is formed on the surface of the substrate at the side close to the routing layer 4; or the side of the inorganic layer facing away from substrate 1 has a thinned area so that the surface of the substrate on the side close to routing layer 4 forms a first recessed area 30. The embodiment with the thinning-out region only on the side of the retaining wall 3 or the inorganic layer away from the substrate 1 has been described above, and in order to avoid repetition, the description in this embodiment is omitted.
Furthermore, as shown in fig. 7, buffer layer 5 may have a thinned region only on the side facing away from substrate 1, so that a surface of the substrate on the side close to routing layer 4 forms first recessed region 30. Specifically, the side of the buffer layer 5 facing away from the substrate 1 is thinned to obtain a thinned region, which at least partially covers the top surface of the retaining wall 3 facing away from the substrate 1 in an orthographic projection of the retaining wall 3 facing away from the top surface of the substrate 1. Due to the existence of the thinned region on buffer layer 5, the surface of the substrate on the side close to routing layer 4 is provided with a first recessed region 30. Due to the presence of the first recessed area 30, the routing layer 4 formed on the substrate has a second recessed area 40 directly opposite to the first recessed area 30.
In one embodiment, the retaining wall 3, the inorganic layer, and the buffer layer 5 are thinned. Specifically, in an embodiment, the side of the retaining wall 3 away from the substrate 1 and the side of the inorganic layer away from the substrate 1 are both formed with a thinning design to form a thinning area, so that the surface of the substrate close to the routing layer 4 forms a first recessed area 30. This implementation is substantially the same as the thinning region formed by thinning the side of the retaining wall 3 away from the substrate 1 and the side of the inorganic layer away from the substrate 1 in the above embodiments of fig. 1 to 6, and in order to avoid repetition, this embodiment is not described again.
In another embodiment, the side of the retaining wall 3 and the side of the buffer layer 5 facing away from the substrate 1 are both thinned to form a thinned area, so that the surface of the substrate near the routing layer 4 forms a first recessed area 30. Specifically, in the present embodiment, the side of the retaining wall 3 away from the substrate 1 and the side of the buffer layer 5 away from the substrate 1 are both formed with a thinning design to form a thinning region, so that the surface of the substrate on the side close to the routing layer 4 forms a first recessed region 30. Due to the presence of the first recessed area 30, the routing layer 4 formed on the substrate has a second recessed area 40 directly opposite to the first recessed area 30.
In another embodiment, the inorganic layer and the buffer layer 5 are thinned to form a thinned area on the side away from the substrate 1, so that the surface of the substrate on the side close to the routing layer 4 forms a first recessed area 30. Specifically, in the present embodiment, the side of the inorganic layer away from the substrate 1 and the side of the buffer layer 5 away from the substrate 1 are both formed with a thinning design to form a thinning region, so that the surface of the substrate close to the routing layer 4 forms the first recess region 30. Due to the presence of the first recessed area 30, the routing layer 4 formed on the substrate has a second recessed area 40 directly opposite to the first recessed area 30.
Since the inorganic layer includes: therefore, the buffer layer 5, the first inorganic layer 21, and the second inorganic layer 23 may be thinned, or the buffer layer 5 and the first inorganic layer 21 may be thinned, or the buffer layer 5 and the second inorganic layer 23 may be thinned.
In another embodiment, the retaining wall 3, the inorganic layer, and the buffer layer 5 may be thinned, specifically, in this embodiment, a thinning region is formed on a side of the retaining wall 3, the inorganic layer, and a side of the buffer layer 5 away from the substrate 1 by thinning design, so that a first recess region 30 is formed on a surface of the substrate close to the routing layer 4. Specifically, in the present embodiment, the side of the retaining wall 3, the inorganic layer, and the buffer layer 5 away from the substrate 1 are simultaneously thinned to form a thinned region, so that the surface of the substrate on the side close to the routing layer 4 forms a first recessed region 30. Due to the presence of the first recessed area 30, the routing layer 4 formed on the substrate has a second recessed area 40 directly opposite to the first recessed area 30.
Since the inorganic layer includes: therefore, in this embodiment, the retaining wall 3, the first inorganic layer 21, the second inorganic layer 23 and the buffer layer 5 may be thinned, or the retaining wall 3, the first inorganic layer 21 and the buffer layer 5 may be thinned, or the retaining wall 3, the second inorganic layer 23 and the buffer layer 5 may be thinned.
The substrate illustrated in fig. 7 includes the retaining wall 3, and further includes an inorganic layer and a buffer layer 5 stacked on the side of the retaining wall away from the substrate 3, where the routing layer 4 is located on the side of the buffer layer 5 away from the substrate, and the substrate illustrated in fig. 1 to 6 includes the retaining wall 3, and further includes an inorganic layer located on the side of the retaining wall 3 away from the substrate, where the second-direction implementation of the routing layer 4 on the side of the inorganic layer away from the substrate is substantially the same, and the main difference is whether the substrate includes the buffer layer 5, and the thin region generated by the buffer layer 5 is provided with a film layer combination mode, so that some implementation details in the implementation mode of the first aspect can be applied to the implementation mode of the second aspect. To avoid repetition, further description is omitted.
It should be noted that, in the process of preparing the first recessed area 30, a halftone mask may be used to form the first recessed area 30 by making the retaining wall 3, the inorganic layer, or the buffer layer 5 into a recessed shape. The halftone mask has partial light transmittance, and by utilizing the characteristic, a concave surface is formed to form the first concave area 30 by utilizing the characteristics of different light transmittances, low light transmittances at two sides and high light transmittance at the middle part when the top of the retaining wall 3, the inorganic layer or the buffer layer 5 is exposed, so that the preparation process is simple.
The invention further relates to a preparation method of the display panel, wherein the flow schematic diagram of the preparation method of the display panel is shown in fig. 8, and the preparation method specifically comprises the following steps:
step 101: a base plate is provided, the base plate including a substrate.
Specifically, the substrate in this embodiment includes: the device comprises a substrate and a driving device layer positioned on the substrate, wherein the substrate can be a flexible substrate (such as polyimide) or a rigid substrate (such as glass). The substrate includes: the display device comprises a display area and a non-display area positioned on the periphery of the display area, wherein a light-emitting device layer is arranged in the display area on the substrate, and the driving device layer is used for providing a driving signal for the light-emitting device layer so as to light a light-emitting device in the light-emitting device layer.
The substrate further includes: and a thin film encapsulation layer over the light emitting device layer, the thin film encapsulation layer including a plurality of inorganic layers and organic layers alternately stacked on the light emitting device layer. The retaining wall is positioned between the substrate and the thin film packaging layer, is positioned at the periphery of the display area and is arranged around the light-emitting device layer. The side, far away from the substrate, of the light-emitting device layer is also provided with multiple inorganic packaging layers and organic layers which are stacked alternately, and the retaining wall can prevent the organic layers from overflowing out of the inorganic layers when the organic film layers are formed.
Step 102: the wiring layer is formed on the surface of the substrate, wherein the substrate further comprises a retaining wall positioned on one side, close to the wiring layer, of the substrate, a first recessed area is arranged on one side, close to the wiring layer, of the substrate, the orthographic projection of the first recessed area on the top surface, far away from the substrate, of the retaining wall at least partially covers the top surface, far away from the substrate, of the retaining wall, the wiring layer is provided with a second recessed area, and the orthographic projection of the second recessed area on the substrate at least partially covers the first recessed area.
Specifically, a wiring layer is arranged above the thin film packaging layer, and the wiring layer in the display area needs to be electrically connected with an IC or FPC circuit board in the non-display area through a retaining wall, so that signal conduction is realized. Because the surface of the substrate close to one side of the routing layer is provided with the first recessed area, and the orthographic projection of the first recessed area on the top surface of the retaining wall far away from the substrate at least partially covers the top surface of the retaining wall far away from the substrate, the orthographic projection of the second recessed area on the top surface of the retaining wall far away from the substrate also at least partially covers the top surface of the retaining wall far away from the substrate. Due to the existence of the second sunken area, the photoresist above the routing layer on the retaining wall can be retained during patterning of the routing layer, so that the thickness of the photoresist above the routing layer on the retaining wall is approximately the same as that of the photoresist on the substrate; the situation that the photoresist is too thin above the wiring layer on the retaining wall, so that the photoresist is consumed completely too early, and the part of the wiring layer above the retaining wall is broken during dry etching is avoided; or the photoresist above the wiring layer on the retaining wall falls on the substrate, so that the photoresist on the substrate is too thick and cannot be etched to cause short circuit during exposure and development, and the preparation yield of the wiring layer above the retaining wall is improved, and the finished product yield of the display panel is improved.
Compared with the related art, the embodiment of the invention provides a preparation method of a display panel, since the surface of the substrate on the side close to the routing layer is provided with the first recessed area, and the orthographic projection of the first recessed area on the top surface of the retaining wall far from the substrate at least partially covers the top surface of the retaining wall far from the substrate, the orthographic projection of the second recessed area on the top surface of the retaining wall far from the substrate also at least partially covers the top surface of the retaining wall far from the substrate. Due to the existence of the second recessed area, the photoresist above the routing layer on the retaining wall can be kept during patterning of the routing layer, so that the thickness of the photoresist above the routing layer on the retaining wall is approximately the same as that of the photoresist on the substrate, and the condition that the routing layer above the retaining wall is short-circuited or broken-circuited due to the loss of the photoresist above the routing layer on the retaining wall is improved.
The steps of the above methods are divided for clarity, and the implementation may be combined into one step or split some steps, and the steps are divided into multiple steps, so long as the same logical relationship is included, which are all within the protection scope of the present patent; it is within the scope of the patent to add insignificant modifications to the algorithms or processes or to introduce insignificant design changes to the core design without changing the algorithms or processes.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples for carrying out the invention, and that various changes in form and details may be made therein without departing from the spirit and scope of the invention in practice.
Claims (10)
1. A display panel, comprising: the wiring layer is arranged on the surface of the substrate;
the substrate comprises a substrate and a retaining wall positioned on one side of the substrate close to the routing layer;
the substrate is provided with a first sunken area at one side close to the routing layer, and the orthographic projection of the first sunken area on the top surface of the retaining wall far away from the substrate at least partially covers the top surface of the retaining wall far away from the substrate;
the wiring layer is provided with a second concave area, and the second concave area at least partially covers the first concave area in the orthographic projection of the substrate.
2. The display panel of claim 1, wherein the substrate further comprises: the inorganic layer is positioned on one side of the retaining wall, which is far away from the substrate, and the routing layer is positioned on one side of the inorganic layer, which is far away from the substrate; at least one of the retaining wall and the inorganic layer is provided with a thinning area so as to form the first concave area;
alternatively, the substrate further comprises: the inorganic layer and the buffer layer are stacked on one side, away from the substrate, of the retaining wall, and the routing layer is located on one side, away from the substrate, of the buffer layer; at least one of the retaining wall, the inorganic layer and the buffer layer is provided with a thinning area so as to form the first depressed area.
3. The display panel according to claim 1, wherein the depth of the first recess region in a direction perpendicular to the substrate is between 0.45 and 1.35 micrometers; preferably, the depth of the first recessed region is 0.5 microns.
4. The display panel according to claim 1, wherein an opening area of the first recess region is gradually increased in a direction away from the substrate.
5. The display panel according to claim 4, wherein an orthographic projection of the first recessed region on the top surface of the retaining wall away from the substrate completely covers the retaining wall away from the top surface of the substrate; or the first recessed area is far away from the opening edge of the substrate, and is separated from the top surface edge of the substrate by a preset distance with the retaining wall.
6. The display panel according to claim 4, wherein a cross-sectional shape of the first concave region in a direction perpendicular to the substrate is an inverted trapezoid or an arc.
7. The display panel according to claim 4, wherein the first concave region has a smooth inner wall surface.
8. The display panel according to claim 1, wherein the cross-sectional shape of the dam in a direction perpendicular to the substrate is a trapezoid, and the base angle of the trapezoid is between 30 ° and 60 °.
9. The display panel of claim 1, wherein the routing layer comprises at least one or any combination of the following: data routing layer, signal routing layer.
10. A method for manufacturing a display panel, comprising:
providing a substrate;
the base plate surface forms the routing layer, wherein, the base plate includes the substrate and is located the substrate is close to the barricade of routing layer one side, the base plate is close to routing layer one side has first depressed area, first depressed area is in the barricade is kept away from the orthographic projection of the top surface of substrate at least partly covers the barricade is kept away from the top surface of substrate, the routing layer has the second depressed area, the second depressed area is in the orthographic projection of base plate at least partly covers first depressed area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011415619.0A CN112562497B (en) | 2020-12-03 | 2020-12-03 | Display panel and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011415619.0A CN112562497B (en) | 2020-12-03 | 2020-12-03 | Display panel and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112562497A true CN112562497A (en) | 2021-03-26 |
| CN112562497B CN112562497B (en) | 2022-06-07 |
Family
ID=75058950
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011415619.0A Active CN112562497B (en) | 2020-12-03 | 2020-12-03 | Display panel and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112562497B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113937137A (en) * | 2021-09-23 | 2022-01-14 | 昆山国显光电有限公司 | Display panel and display device |
Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104882468A (en) * | 2015-06-09 | 2015-09-02 | 京东方科技集团股份有限公司 | Organic electroluminescence display base plate and manufacturing method thereof, and display apparatus |
| CN106873839A (en) * | 2017-02-15 | 2017-06-20 | 上海天马微电子有限公司 | A kind of touch-control display panel and touch control display apparatus |
| CN107180852A (en) * | 2017-05-18 | 2017-09-19 | 上海天马有机发光显示技术有限公司 | A kind of touch-control display panel and display device |
| CN207852679U (en) * | 2018-03-09 | 2018-09-11 | 上海和辉光电有限公司 | A kind of display panel and display device |
| CN109216406A (en) * | 2017-06-30 | 2019-01-15 | 昆山国显光电有限公司 | OLED display panel and preparation method thereof |
| CN109494242A (en) * | 2018-10-26 | 2019-03-19 | 武汉华星光电半导体显示技术有限公司 | OLED display panel and preparation method thereof, OLED display |
| CN109585688A (en) * | 2018-12-28 | 2019-04-05 | 厦门天马微电子有限公司 | Display panel and display device |
| CN109728194A (en) * | 2018-12-28 | 2019-05-07 | 上海天马微电子有限公司 | Display panel and display device |
| CN209328948U (en) * | 2019-03-07 | 2019-08-30 | 昆山国显光电有限公司 | A kind of display panel |
| CN110196656A (en) * | 2019-05-16 | 2019-09-03 | 云谷（固安）科技有限公司 | Display panel and display device |
| CN110265579A (en) * | 2019-06-27 | 2019-09-20 | 京东方科技集团股份有限公司 | A kind of display panel and preparation method thereof, display device |
| CN111403464A (en) * | 2020-03-30 | 2020-07-10 | 昆山国显光电有限公司 | Display panel, preparation method of display panel and display device |
| WO2020191623A1 (en) * | 2019-03-26 | 2020-10-01 | 京东方科技集团股份有限公司 | Display substrate and method for preparing same, and display apparatus |
| CN112018159A (en) * | 2020-08-27 | 2020-12-01 | 京东方科技集团股份有限公司 | Touch control display panel |
-
2020
- 2020-12-03 CN CN202011415619.0A patent/CN112562497B/en active Active
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104882468A (en) * | 2015-06-09 | 2015-09-02 | 京东方科技集团股份有限公司 | Organic electroluminescence display base plate and manufacturing method thereof, and display apparatus |
| CN106873839A (en) * | 2017-02-15 | 2017-06-20 | 上海天马微电子有限公司 | A kind of touch-control display panel and touch control display apparatus |
| CN107180852A (en) * | 2017-05-18 | 2017-09-19 | 上海天马有机发光显示技术有限公司 | A kind of touch-control display panel and display device |
| CN109216406A (en) * | 2017-06-30 | 2019-01-15 | 昆山国显光电有限公司 | OLED display panel and preparation method thereof |
| CN207852679U (en) * | 2018-03-09 | 2018-09-11 | 上海和辉光电有限公司 | A kind of display panel and display device |
| CN109494242A (en) * | 2018-10-26 | 2019-03-19 | 武汉华星光电半导体显示技术有限公司 | OLED display panel and preparation method thereof, OLED display |
| CN109585688A (en) * | 2018-12-28 | 2019-04-05 | 厦门天马微电子有限公司 | Display panel and display device |
| CN109728194A (en) * | 2018-12-28 | 2019-05-07 | 上海天马微电子有限公司 | Display panel and display device |
| CN209328948U (en) * | 2019-03-07 | 2019-08-30 | 昆山国显光电有限公司 | A kind of display panel |
| WO2020191623A1 (en) * | 2019-03-26 | 2020-10-01 | 京东方科技集团股份有限公司 | Display substrate and method for preparing same, and display apparatus |
| CN110196656A (en) * | 2019-05-16 | 2019-09-03 | 云谷（固安）科技有限公司 | Display panel and display device |
| CN110265579A (en) * | 2019-06-27 | 2019-09-20 | 京东方科技集团股份有限公司 | A kind of display panel and preparation method thereof, display device |
| CN111403464A (en) * | 2020-03-30 | 2020-07-10 | 昆山国显光电有限公司 | Display panel, preparation method of display panel and display device |
| CN112018159A (en) * | 2020-08-27 | 2020-12-01 | 京东方科技集团股份有限公司 | Touch control display panel |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113937137A (en) * | 2021-09-23 | 2022-01-14 | 昆山国显光电有限公司 | Display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112562497B (en) | 2022-06-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110416434B (en) | Display substrate, preparation method thereof and display device | |
| US10985195B2 (en) | Array substrates and methods for manufacturing thereof and display screens | |
| WO2022037195A1 (en) | Display panel | |
| WO2019174297A1 (en) | Array substrate, manufacturing method therefor, and display apparatus | |
| US20220344612A1 (en) | Display substrate, manufacturing mothod thereof, and display device | |
| CN113078195B (en) | Display device, display panel and manufacturing method thereof | |
| CN110993821B (en) | OLED display panel | |
| WO2020118990A1 (en) | Display panel | |
| US5444020A (en) | Method for forming contact holes having different depths | |
| CN112562497B (en) | Display panel and preparation method thereof | |
| CN111819693A (en) | Array substrate, manufacturing method thereof, display panel and display device | |
| CN111180470B (en) | Display substrate, manufacturing method thereof and display device | |
| CN114975477A (en) | Display panel, method for manufacturing display panel, and display device | |
| WO2022121608A1 (en) | Touch substrate and touch display device | |
| US11937485B2 (en) | Display panel and display device | |
| CN111048530B (en) | Flexible display panel, preparation method thereof and curved surface display screen | |
| CN111640771A (en) | Display device | |
| CN114489377B (en) | Touch display panel and touch display device | |
| US20220271059A1 (en) | Display substrate, display device, display substrate, method of forming display substrate, and method of forming display device | |
| CN111416059B (en) | Display panel, manufacturing method thereof and display device | |
| JP2023545142A (en) | Display panel, its manufacturing method, and display device | |
| CN113540196B (en) | Stretchable display substrate and display device | |
| CN219352274U (en) | Array substrate and display panel | |
| TWI818646B (en) | Display panel and manufacturing method thereof | |
| US20230307426A1 (en) | Display panel, preparing method thereof, and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |