CN112543015B - Comparator output structure capable of selecting output type through packaging bonding wire - Google Patents

Comparator output structure capable of selecting output type through packaging bonding wire Download PDF

Info

Publication number
CN112543015B
CN112543015B CN201910891458.3A CN201910891458A CN112543015B CN 112543015 B CN112543015 B CN 112543015B CN 201910891458 A CN201910891458 A CN 201910891458A CN 112543015 B CN112543015 B CN 112543015B
Authority
CN
China
Prior art keywords
output
comparator
type
bonding
pmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910891458.3A
Other languages
Chinese (zh)
Other versions
CN112543015A (en
Inventor
孙德臣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SG Micro Beijing Co Ltd
Original Assignee
SG Micro Beijing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SG Micro Beijing Co Ltd filed Critical SG Micro Beijing Co Ltd
Priority to CN201910891458.3A priority Critical patent/CN112543015B/en
Publication of CN112543015A publication Critical patent/CN112543015A/en
Application granted granted Critical
Publication of CN112543015B publication Critical patent/CN112543015B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

The utility model provides a can select comparator output structure of output type through encapsulation bonding wire, is used for connecting first pad and PMOS output lead through NMOS output lead and is used for connecting the dual output lead setting of second pad, can select the output type through encapsulation bonding wire, the output type includes P type field effect transistor drain electrode open circuit output structure, push-pull output structure and N type field effect transistor drain electrode open circuit output structure, is favorable to realizing adopting one set of integrated circuit mask board can deal with the effect of three kinds of different comparator output structures.

Description

Comparator output structure capable of selecting output type through packaging bonding wire
Technical Field
The invention relates to a comparator output stage technology, in particular to a comparator output structure capable of selecting output types through packaging bonding wires, wherein double output leads are arranged through an NMOS output lead and used for connecting a first bonding pad and a PMOS output lead and used for connecting a second bonding pad, the output types can be selected through the packaging bonding wires, the output types comprise a P-type field effect transistor drain open-circuit output structure, a push-pull output structure and an N-type field effect transistor drain open-circuit output structure, and the comparator output stage technology is favorable for realizing the effect that three different comparator output structures can be dealt with by adopting a set of integrated circuit mask plate.
Background
In the prior art, in the aspect of realizing the design of comparator circuits with different output types, respective corresponding circuits and layouts are generally designed for each output type, and different mask plates are manufactured. Different output stage types determine different application occasions of the comparator. Comparator products typically include three different output types: push-pull type output stage, N-type FET drain open circuit output stage, and P-type FET drain open circuit output stage. Three different output types require three different circuit configurations to be designed. Even under the condition that the preceding circuits are completely consistent, three sets of different circuits and layouts still need to be designed, and three sets of corresponding mask plates are manufactured for production. The circuit of the push-pull type output stage comparator corresponds to the layout of the push-pull output stage comparator, the comparator of the N-type field effect transistor with the open-circuit drain electrode corresponds to the layout of the comparator of the N-type field effect transistor with the open-circuit drain electrode, and the comparator of the P-type field effect transistor with the open-circuit drain electrode corresponds to the layout of the comparator of the P-type field effect transistor with the open-circuit drain electrode. Such chip manufacturing not only imposes a burden on the manufacturing and design costs, but also causes a waste problem. The inventor thinks that if the dual-output lead setting that the NMOS output lead is used for connecting the first bonding pad and the PMOS output lead is used for connecting the second bonding pad is arranged through the NMOS output lead, the output type can be selected through the packaging welding wire, the output type comprises a P-type field effect transistor drain open circuit output structure, a push-pull output structure and an N-type field effect transistor drain open circuit output structure, thereby being beneficial to realizing the effect of coping with three different comparator output structures by adopting one set of integrated circuit mask plate instead of three original integrated circuit mask plates, thereby reducing the cost and reducing the waste. In view of the above, the present inventors have completed the present invention.
Disclosure of Invention
Aiming at the defects or shortcomings in the prior art, the invention provides the comparator output structure capable of selecting the output type through the packaging welding wire, the dual-output lead arrangement for connecting the first bonding pad and the PMOS output lead for connecting the second bonding pad is realized through the NMOS output lead, the output type can be selected through the packaging welding wire, the output types comprise a P-type field effect transistor drain open-circuit output structure, a push-pull output structure and an N-type field effect transistor drain open-circuit output structure, and the effect that three different comparator output structures can be responded by adopting one set of integrated circuit mask plate is favorably realized.
The technical scheme of the invention is as follows:
a comparator output structure capable of selecting an output type through a packaging bonding wire is characterized by comprising a PMOS tube and an NMOS tube, wherein a grid electrode of the PMOS tube and a grid electrode of the NMOS tube are connected with each other and then are connected with an output end of a front comparator, the front comparator is provided with a positive input end and a negative input end, a power supply end of the front comparator and a source electrode of the PMOS tube are both connected with a power supply voltage end, a ground potential end of the front comparator and a source electrode of the NMOS tube are both connected with a grounding end, a PMOS output lead extends from a drain electrode of the PMOS tube, an NMOS output lead extends from a drain electrode of the NMOS tube, and the PMOS output lead and the NMOS output lead are independent from each other.
The PMOS output lead is connected to a first bonding pad, and the NMOS output lead is connected to a second bonding pad.
Alternative output types include open-drain output structures for PFETs, push-pull output structures, and open-drain output structures for NFETs.
The first bonding pad and the second bonding pad are both connected with an antistatic unit.
The first bonding pad is connected to a chip packaging output pin in a routing mode, the second bonding pad is suspended, the NMOS tube loses functions, only the drain electrode of the PMOS tube becomes the output end of the comparator, and the open-circuit output structure of the drain electrode of the P-type field effect transistor is formed.
The second bonding pad is connected to a chip packaging output pin in a routing mode, the first bonding pad is suspended, the PMOS tube loses functions, only the drain electrode of the NMOS tube becomes the output end of the comparator, and an N-type field effect transistor drain electrode open-circuit output structure is formed.
The first bonding pad and the second bonding pad are respectively connected to an output pin of a chip package in a routing way, and the drain electrode of the PMOS tube and the drain electrode of the NMOS tube are connected with each other to form an output end of a comparator, so that a push-pull output structure is formed.
The invention has the following technical effects: the comparator output structure capable of selecting the output type through the packaging welding line utilizes the common point and different points of different output types of the comparator and the same or similar of the comparator in other aspects, and realizes the effect of coping with three different comparator output structures by adopting one set of integrated circuit mask plate through the mutually independent arrangement of the PMOS output lead and the NMOS output lead, thereby being beneficial to reducing the cost and reducing the waste.
Drawings
Fig. 1 is a schematic diagram of a comparator output structure capable of selecting an output type through package bonding wires according to the present invention.
The reference numbers are listed below: VCC-supply voltage terminal; GND-ground; PreComp-pre comparator; INP-comparator positive input; INN-negative comparator input; Mp-PMOS tube; a Mn-NMOS tube; a POLW-PMOS output lead; NOLW-NMOS output leads; PA-first pad; PB-second pad; BW 1-first routing; BW 2-second routing; BW 3-third routing; BW 4-fourth routing; VOUT1 — a first selective chip package output pin (i.e. only selective execution is performed from the first bonding pad PA to VOUT by wire bonding, the second wire bonding BW2, the third wire bonding BW3 and the fourth wire bonding BW4 are not selectively performed, the second bonding pad PB is suspended, the NMOS transistor Mn loses function, only the drain of the PMOS transistor Mp becomes the comparator output, forming a P-type field effect transistor open-drain output structure) or a P-type field effect transistor open-drain output structure end; VOUT2 — a second selective chip package output pin (i.e., selectively performing wire bonding from the first pad PA and the second pad PB to VOUT, for example, connecting VOUT by the second wire bonding BW2 and the third wire bonding BW3, respectively, and interconnecting the drain of the PMOS transistor Mp and the drain of the NMOS transistor Mn to form a push-pull output structure) or a push-pull output structure end; VOUT 3-third selective chip package output pin (i.e. only selective execution is performed from the second bonding pad PB to VOUT by wire bonding, the first wire bonding BW1, the second wire bonding BW2 and the third wire bonding BW3 are not selectively executed, the first bonding pad PA is suspended, the PMOS transistor Mp loses function, only the drain of the NMOS transistor Mn becomes the comparator output terminal, forming the N-type field effect transistor drain open circuit output structure) or the N-type field effect transistor drain open circuit output structure terminal.
Detailed Description
The invention is described below with reference to the accompanying drawing (fig. 1).
Fig. 1 is a schematic diagram of a comparator output structure capable of selecting an output type through package bonding wires according to the present invention. As shown in fig. 1, a comparator output structure capable of selecting an output type through a package bonding wire includes a PMOS transistor Mp and an NMOS transistor Mn, a gate of the PMOS transistor Mp and a gate of the NMOS transistor Mn are interconnected and then connected to an output terminal of a pre-comparator PreComp, the pre-comparator PreComp has a positive input terminal (+) and a negative input terminal (-) thereof, a power supply terminal of the pre-comparator PreComp and a source of the PMOS transistor Mp are both connected to a power supply voltage terminal VCC, a ground potential terminal (i.e., a ground terminal) of the pre-comparator PreComp and a source of the NMOS transistor Mn are both connected to a ground terminal GND, a drain of the PMOS transistor Mp extends to a PMOS output lead POLW, a drain of the NMOS transistor Mn extends to an NMOS output lead NOLW, and the PMOS output lead POLW and the NMOS output lead NOLW are independent from each other. The PMOS output lead POLW is connected to a first bonding pad PA, and the NMOS output lead NOLW is connected to a second bonding pad PB.
Alternative output types include open-drain output structures for PFETs, push-pull output structures, and open-drain output structures for NFETs. The first pad PA and the second pad PB are both connected with an antistatic unit. The first bonding pad PA is wire-bonded to a chip package output pin VOUT (indicated by VOUT1 in fig. 1, that is, the first bonding pad BW1 realizes the connection between PA and VOUT 1), the second bonding pad PB is suspended, the NMOS transistor Mn is disabled (i.e., does not function in the circuit), and only the drain of the PMOS transistor Mp becomes the comparator output terminal VOUT, thereby forming an open-drain output structure of the P-type field effect transistor. The second bonding pad PB is wire-bonded to a chip package output pin (denoted by VOUT3 in fig. 1, that is, the fourth wire bonding BW4 realizes the connection between PB and VOUT 3), the first bonding pad PA is suspended, the PMOS transistor Mp is disabled (i.e., does not function in the circuit), and only the drain of the NMOS transistor Mn becomes the comparator output terminal VOUT, thereby forming an N-type field effect transistor drain open-circuit output structure. The first bonding pad PA and the second bonding pad PB are respectively wire-bonded to an output pin of a chip package (represented by VOUT2 in fig. 1, that is, the second wire bonding BW2 and the third wire bonding BW3 are respectively connected to VOUT2), and the drain of the PMOS transistor Mp and the drain of the NMOS transistor Mn are interconnected to form a comparator output terminal VOUT, thereby forming a push-pull output structure.
The invention completes the change of the output structure of the comparator in the chip packaging process, designs the comparator chips with different output level structures by using one set of mask plate, saves the cost compared with the traditional scheme, simplifies the design process, and has the same function of the comparator as that of the comparator designed by the original method.
It is pointed out here that the above description is helpful for the person skilled in the art to understand the invention, but does not limit the scope of protection of the invention. Any such equivalents, modifications and/or omissions as may be made without departing from the spirit and scope of the invention may be resorted to.

Claims (7)

1. A comparator output structure capable of selecting an output type through a packaging bonding wire is characterized by comprising a PMOS tube and an NMOS tube, wherein a grid electrode of the PMOS tube and a grid electrode of the NMOS tube are connected with each other and then are connected with an output end of a front comparator, the front comparator is provided with a positive input end and a negative input end, a power supply end of the front comparator and a source electrode of the PMOS tube are both connected with a power supply voltage end, a ground potential end of the front comparator and a source electrode of the NMOS tube are both connected with a grounding end, a PMOS output lead extends from a drain electrode of the PMOS tube, an NMOS output lead extends from a drain electrode of the NMOS tube, and the PMOS output lead and the NMOS output lead are independent from each other.
2. The comparator output structure capable of selecting an output type through package wire bonding of claim 1, wherein the PMOS output lead is connected to a first pad and the NMOS output lead is connected to a second pad.
3. The comparator output structure capable of selecting an output type through package wire bonding of claim 1, wherein the alternative output types comprise an open-drain output structure of P-type field effect transistor, a push-pull output structure and an open-drain output structure of N-type field effect transistor.
4. The comparator output structure capable of selecting an output type by an encapsulating wire according to claim 2, wherein an antistatic unit is connected to each of the first pad and the second pad.
5. The comparator output structure capable of selecting an output type through packaging bonding wires according to claim 2, wherein the first bonding pad is connected to a chip package output pin in a routing mode, the second bonding pad is suspended, the NMOS tube loses function, and only the drain electrode of the PMOS tube becomes the output end of the comparator, so that an open-circuit output structure of the drain electrode of the P-type field effect transistor is formed.
6. The output structure of the comparator capable of selecting the output type through the packaging bonding wire according to claim 2, wherein the second bonding pad is wire-bonded to the output pin of the chip package, the first bonding pad is suspended, the PMOS tube loses function, and only the drain electrode of the NMOS tube becomes the output end of the comparator, so as to form an open-drain output structure of the N-type field effect transistor.
7. The comparator output structure capable of selecting an output type through packaging bonding wires according to claim 2, wherein the first bonding pad and the second bonding pad are respectively connected to a chip package output pin in a wire bonding mode, and a drain electrode of the PMOS tube and a drain electrode of the NMOS tube are connected with each other to form a comparator output end, so that a push-pull output structure is formed.
CN201910891458.3A 2019-09-20 2019-09-20 Comparator output structure capable of selecting output type through packaging bonding wire Active CN112543015B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910891458.3A CN112543015B (en) 2019-09-20 2019-09-20 Comparator output structure capable of selecting output type through packaging bonding wire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910891458.3A CN112543015B (en) 2019-09-20 2019-09-20 Comparator output structure capable of selecting output type through packaging bonding wire

Publications (2)

Publication Number Publication Date
CN112543015A CN112543015A (en) 2021-03-23
CN112543015B true CN112543015B (en) 2022-09-30

Family

ID=75012711

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910891458.3A Active CN112543015B (en) 2019-09-20 2019-09-20 Comparator output structure capable of selecting output type through packaging bonding wire

Country Status (1)

Country Link
CN (1) CN112543015B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5036223A (en) * 1989-05-22 1991-07-30 Kabushiki Kaisha Toshiba Inverter circuit and chopper type comparator circuit using the same
US5422591A (en) * 1994-01-03 1995-06-06 Sgs-Thomson Microelectronics, Inc. Output driver circuit with body bias control for multiple power supply operation
CN1707952A (en) * 1993-11-29 2005-12-14 富士通株式会社 Electronic system, semiconductor integrated circuit and terminal apparatus
CN204668924U (en) * 2015-06-19 2015-09-23 杭州士兰微电子股份有限公司 Switching Power Supply and control circuit thereof and open-circuit-protection arrange circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5036223A (en) * 1989-05-22 1991-07-30 Kabushiki Kaisha Toshiba Inverter circuit and chopper type comparator circuit using the same
CN1707952A (en) * 1993-11-29 2005-12-14 富士通株式会社 Electronic system, semiconductor integrated circuit and terminal apparatus
US5422591A (en) * 1994-01-03 1995-06-06 Sgs-Thomson Microelectronics, Inc. Output driver circuit with body bias control for multiple power supply operation
CN204668924U (en) * 2015-06-19 2015-09-23 杭州士兰微电子股份有限公司 Switching Power Supply and control circuit thereof and open-circuit-protection arrange circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
64-kb Hybrid Josephson-CMOS 4 Kelvin RAM With 400 ps Access Time and 12 mW Read Power;Theodore Van Duzer等;《IEEE Transactions on Applied Superconductivity》;20121129;全文 *
工作时钟1GHz超高速电压比较器设计;高彬等;《电子器件》;20070430;全文 *

Also Published As

Publication number Publication date
CN112543015A (en) 2021-03-23

Similar Documents

Publication Publication Date Title
KR101894199B1 (en) Scanning driving circuit and its NAND logic operation circuit
JP6028097B2 (en) Semiconductor integrated circuit device
JPS6074644A (en) Cmos gate array
JPH05243940A (en) Output buffer device
CN103809637B (en) Voltage-regulating circuit
CN112543015B (en) Comparator output structure capable of selecting output type through packaging bonding wire
KR100263785B1 (en) Cmos circuit
CN112543014B (en) Comparator output structure capable of selecting output type through laser cutting
JP2602974B2 (en) CMOS semiconductor integrated circuit device
CN104242909A (en) Level conversion circuit
US20090284287A1 (en) Output buffer circuit and integrated circuit
JP2004120373A5 (en)
KR101053539B1 (en) Data output circuit with output driver
CN208208752U (en) A kind of Power drive integrated circuit
WO2024119697A1 (en) Driving-stage power supply circuit of dc-dc buck apparatus
WO2023190001A1 (en) Semiconductor apparatus
JP3586985B2 (en) Output circuit of semiconductor device
CN107887332B (en) Monolithic integrated semiconductor chip for chopper circuit and preparation method thereof
JPH02264519A (en) Semiconductor device
JPH03159313A (en) Output circuit and semiconductor integrated circuit device
JPH02174316A (en) Semiconductor integrated circuit
JPS63219153A (en) Semiconductor integrated circuit
TWI226121B (en) Chip-packaging with bonding options connected to a package substrate
JPH04147674A (en) Cmos gate array device
CN109348574A (en) A kind of illumination LED drive circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant