CN112532894B - Image processing method, device and system - Google Patents
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Abstract
The embodiment of the invention discloses an image processing method, an image processing device, an image processing system and a computer storage medium. The image processing method comprises the following steps: acquiring a target input source; performing input zooming processing on the target input source to obtain a processed input source, and storing the processed input source; reading at least a part of image data of the processed input source according to the image output parameters to obtain target image data; carrying out first output scaling processing on the target image data by using scaling processing resources to obtain a target output image, and outputting the target output image; adjusting the arrangement sequence of the pixel points in the target image data to obtain image data after mirror image processing; and performing second output scaling processing on the image data subjected to the mirror image processing by using idle scaling processing resources to obtain a target mirror image output image, and outputting the target mirror image output image. According to the embodiment of the invention, the target output image and the target mirror image output image which is mirror image of the target output image can be obtained under the condition of not increasing resource overhead.
Description
Technical Field
The present invention relates to the field of image processing technologies, and in particular, to an image processing method, an image processing apparatus, and an image processing system.
Background
With the rapid development of image display technology, users have made more demands on the display of images, for example, in consideration of the needs of some special stages or activities such as lecture occasions, users need to generate a mirror image window, i.e., a horizontal mirror image, with the same size and with horizontally reversed window content for a certain window, i.e., a certain image, so as to simultaneously display the original image and the mirror image on a display interface.
In the prior art, a window resource is usually required to be additionally added for generating a mirror image, however, adding a window resource inevitably increases the hardware resource overhead of an image processor, and therefore, how to implement a window mirror function without increasing the hardware resource overhead is a problem that needs to be solved at present.
Disclosure of Invention
Therefore, to overcome the defects and shortcomings in the prior art, embodiments of the present invention provide an image processing method, an image processing apparatus, and an image processing system, so as to implement a window mirroring function without increasing hardware resource overhead.
In one aspect, an image processing method provided in an embodiment of the present invention includes: acquiring a target input source; performing input zooming processing on the target input source to obtain a processed input source, and storing the processed input source; reading at least a part of image data of the processed input source according to the image output parameters to obtain target image data; carrying out first output scaling processing on the target image data by using scaling processing resources to obtain a target output image, and outputting the target output image; adjusting the arrangement sequence of the pixel points in the target image data to obtain image data after mirror image processing; and performing second output scaling processing on the image data subjected to the mirror image processing by using idle scaling processing resources to obtain a target mirror image output image, and outputting the target mirror image output image.
In the scheme, a processed input source is obtained by performing input scaling processing on the target input source, the processed input source is stored, at least part of image data of the stored processed input source is read according to image output parameters to obtain target image data, first output scaling processing is performed on the target image data by using scaling processing resources to obtain a target output image, and the target output image is output; adjusting the arrangement sequence of the pixel points in the target image data to obtain image data after mirror image processing; and performing second output scaling processing on the image data subjected to mirror image processing by using idle scaling processing resources to obtain a target mirror image output image, and outputting the target mirror image output image, so that the target output image and the target mirror image output image in mirror image with the target output image are obtained under the condition of not increasing hardware resource overhead.
In an embodiment of the present invention, the performing the input scaling processing on the target input source to obtain the processed input source includes: performing reduction processing on the target input source to obtain the processed input source; the obtaining of the target output image by performing the first output scaling processing on the target image data by using the scaling processing resource includes: performing first amplification processing on the target image data to obtain a target output image; the second output scaling processing is performed on the image data after the mirror image processing to obtain a target mirror image output image, and the method comprises the following steps: and carrying out second amplification processing on the image data subjected to mirror image processing to obtain the target mirror image output image.
In one embodiment of the invention, the image output parameters include: and the initial position information, the image width information and the height information of the target image data are stored.
In an embodiment of the present invention, the adjusting the arrangement order of the pixel points in the target image data to obtain image data after mirror image processing includes: and adjusting the arrangement sequence of the pixel points in the target image data, and keeping the arrangement sequence of each pixel row in the target image data unchanged.
In an embodiment of the present invention, the adjusting the arrangement order of the pixel points in the target image data to obtain the image data after the mirror image processing specifically includes: reversing the arrangement sequence of each pixel unit of each pixel row in the target image data to obtain reversed image data; performing data bit reverse order on each pixel point component in each pixel unit of each pixel row in the reversed image data to obtain image data after the reverse order; and reforming each pixel point in each pixel unit of each pixel row in the image data after the reverse order to obtain the image data after the mirror image processing.
In one embodiment of the present invention, the pixel unit is determined based on memory read-write parameters, wherein the memory read-write parameters include: memory bit width, number of memory parallels, and number of pre-read addresses.
In another aspect, an embodiment of the present invention provides an image processing apparatus, including: the input source acquisition module is used for acquiring a target input source; the processing and storing module is used for carrying out input zooming processing on the target input source to obtain a processed input source and storing the processed input source; the data reading module is used for reading at least part of image data of the processed input source according to the image output parameters to obtain target image data; the first output module is used for performing first output scaling processing on the target image data by using scaling processing resources to obtain a target output image and outputting the target output image; the mirror image processing module is used for adjusting the arrangement sequence of the pixel points in the target image data to obtain image data after mirror image processing; and the second output module is used for carrying out second output zooming processing on the image data after the mirror image processing by using idle zooming processing resources to obtain a target mirror image output image and outputting the target mirror image output image.
In the scheme, a target input source is acquired through an input source acquisition module; the processing and storing module is used for carrying out input zooming processing on the target input source to obtain a processed input source and storing the processed input source, the data reading module is used for reading at least part of image data of the stored processed input source according to image output parameters to obtain target image data, the first output module is used for carrying out first output zooming processing on the target image data to obtain a target output image and outputting the target output image, and the mirror image processing module is used for adjusting the arrangement sequence of pixel points in the target image data to obtain mirror image processed image data; and the second output module performs second output scaling processing on the mirrored image data by using idle scaling processing resources to obtain a target mirrored output image, and outputs the target mirrored output image, thereby obtaining the target output image and the target mirrored output image which is mirrored with the target output image without increasing hardware resource overhead.
In one embodiment of the present invention, the mirroring processing module includes: the sequence reversing unit is used for reversing the arrangement sequence of each pixel unit of each pixel row in the target image data to obtain reversed image data; a data bit reverse order unit, configured to perform data bit reverse order on each pixel component in each pixel unit of each pixel row in the reversed image data, so as to obtain image data after reverse order; and the pixel point reforming unit is used for reforming each pixel point in each pixel unit of each pixel row in the image data after the reverse sequence to obtain the image data after the mirror image processing.
In one embodiment of the present invention, the pixel unit is determined based on memory read-write parameters, wherein the memory read-write parameters include: memory bit width, number of memory parallels, and number of pre-read addresses.
In another aspect, an embodiment of the present invention provides an image processing system, including: a memory and a processor coupled to the memory; the memory stores a computer program, and the processor executes any one of the image processing methods when running the computer program.
In yet another aspect, an embodiment of the present invention provides a computer storage medium storing computer-executable instructions for performing any one of the image processing methods described above.
One or more of the above technical solutions may have the following advantages or beneficial effects: obtaining a processed input source by performing input zooming processing on the target input source, storing the processed input source, reading at least part of image data of the stored processed input source according to image output parameters to obtain target image data, performing first output zooming processing on the target image data by using zooming processing resources to obtain a target output image, and outputting the target output image; adjusting the arrangement sequence of the pixel points in the target image data to obtain image data after mirror image processing; and performing second output scaling processing on the image data subjected to mirror image processing by using idle scaling processing resources to obtain a target mirror image output image, and outputting the target mirror image output image, so that the target output image and the target mirror image output image in mirror image with the target output image are obtained under the condition of not increasing hardware resource overhead.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic flowchart of an image processing method according to a first embodiment of the present invention.
FIG. 2 is a diagram illustrating an architecture of an image processor according to a first embodiment of the present invention.
Fig. 3 is a schematic diagram of a data flow for executing the image processing method according to the first embodiment of the present invention.
Fig. 4 is a schematic process diagram of step S110 in the image processing method according to the first embodiment of the present invention.
Fig. 5A is a block diagram of an image processing apparatus according to a second embodiment of the present invention.
Fig. 5B is a schematic diagram illustrating a specific unit structure of the mirror processing module 310 in fig. 5A.
Fig. 6 is a schematic structural diagram of an image processing system according to a third embodiment of the present invention.
Fig. 7 is a schematic structural diagram of a computer storage medium according to a fourth embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.
[ first embodiment ] A
Referring to fig. 1, an image processing method of a first embodiment of the present invention is shown. The image processing method includes, for example, the steps of:
s102, acquiring a target input source;
s104, performing input zooming processing on the target input source to obtain a processed input source, and storing the processed input source;
s106, reading at least a part of image data of the processed input source according to the image output parameters to obtain target image data;
s108, performing first output scaling processing on the target image data by using scaling processing resources to obtain a target output image, and outputting the target output image;
s110, adjusting the arrangement sequence of the pixel points in the target image data to obtain image data after mirror image processing; and
and S112, performing second output scaling processing on the image data subjected to the mirror image processing by using idle scaling processing resources to obtain a target mirror image output image, and outputting the target mirror image output image.
For the convenience of understanding of the present embodiment, the image processing method of the present embodiment will be described in detail below with reference to fig. 2 to 4. Specifically, the image processing method will be described in detail by taking as an example that the image processor 200 shown in fig. 2 executes the image processing method according to the embodiment of the present invention.
Fig. 2 is a schematic diagram of an image processor 200, wherein the image processor 200 includes an input interface 202, a microprocessor 204, a programmable logic device 206, a non-volatile memory 208, a volatile memory 210, and an output interface 212. The input interface 202 is electrically connected to the programmable logic device 206. The microprocessor 204 is electrically connected to a non-volatile memory 208 and a programmable logic device 206. The programmable logic device 206 is electrically connected to the non-volatile memory 208, the volatile memory 210, and the output interface 212.
As mentioned above, the input Interface 202 may be, for example, an HDMI (High Definition Multimedia Interface) Interface, a DP (display Interface) Interface or a DVI (Digital Visual Interface) Interface; the microprocessor 204 may be, for example, an MCU (Micro controller Unit); the Programmable logic device 206 may be, for example, an FPGA (Field-Programmable Gate Array); the nonvolatile memory 208 may be, for example, an EMMC (Embedded MultiMedia Card); the volatile memory 210 may be, for example, a DDR (Double Data Rate); the output Interface 212 may be, for example, an HDMI (High Definition Multimedia Interface) Interface, a DVI (Digital Visual Interface) Interface, but the invention is not limited thereto. The programmable logic device 206 receives an input video source, i.e., a target input source, through the input interface 202, and in response to receiving configuration parameters, such as resolutions of an input image and an output image, sent by the microprocessor 204, such as an MCU (Micro controller Unit), the programmable logic device 206 processes the target input source to obtain a target output image and a target mirrored output image, and outputs the target output image and the target mirrored output image through the output interface 212.
In particular, the programmable logic device 206, such as an FPGA, implements the image mirroring function by executing image processing software thereon, which may, for example, include an input scaling module, a mirroring processing module, and a plurality of output scaling modules, divided by functional modules. An image processing method according to an embodiment of the present invention is described below with reference to fig. 3.
First, the programmable logic device 206 obtains a video source, for example, a target input source, then, an input scaling module of the programmable logic device 206 performs input scaling processing on the target input source to obtain a processed input source, and stores the processed input source in the volatile memory 210, for example, a DDR, and then the programmable logic device 206 reads at least a part of image data of the stored processed input source according to an image output parameter sent by the microprocessor 204, for example, an MCU, to obtain target image data, where the image output parameter may be, for example, start position information, image width information, and height information of the target image data stored in the DDR. Although there is only one output scaling module corresponding to the target output image and the target mirror output image in fig. 3, in practical applications, the number of output scaling modules corresponding to the target output image and the target mirror output image may also be multiple, and is not limited herein. It is worth mentioning that, if the target image data is output by being scaled by the plurality of output scaling modules, the image output parameters include start position information, image width information, and height information, which are specifically stored in the DDR, of the corresponding portion of the target image data that is processed by each output scaling module. Then, the output scaling module of the programmable logic device 206 performs a first output scaling process on the target image data according to the configuration parameters sent by the microprocessor 204 to obtain a target output image, and outputs the target output image.
The programmable logic device 206 further adjusts the arrangement order of the pixels in the target image data through the mirror image processing module to obtain the image data after mirror image processing, and a specific process of obtaining the image data after mirror image processing is shown in fig. 4. Fig. 4 shows a process of performing horizontal mirroring on target image data, which is to adjust an arrangement order of pixel points in the target image data and keep the arrangement order of each pixel row in the target image data unchanged. Further, the horizontal mirroring process specifically includes: reversing the arrangement sequence of each pixel unit of each pixel row in the target image data to obtain reversed image data; performing data bit reverse order on each pixel point component in each pixel unit of each pixel row in the reversed image data to obtain image data after reverse order; and reforming each pixel point in each pixel unit of each pixel row in the image data after the reverse order to obtain the image data after the mirror image processing. In connection with fig. 4, the resolution of the target image data is 1080p, i.e. the target image data comprises 1080 × 1920 pixels, i.e. each line of the target image data has 1920 pixels. First, the bit number of the pixel unit is determined according to the read/write parameters of the volatile memory, such as DDR, e.g., memory bit width, memory parallel number, and read-ahead address number, for example, the bit width of the DDR used in the embodiment of the present invention is 16 bit width, i.e., the memory bit width is 16, the DDR used in the embodiment of the present invention is 4 DDR used in parallel, i.e., the memory parallel number is 4, and 8 addresses are prefetched when one DDR reads an address, i.e., the number of the prefetched addresses is 8, so that when the programmable logic device 206 accesses the DDR, the target image data stored in the DDR is read with 16 × 4 × 8=512bit as one pixel unit, and thus, because each pixel point has three pixel components, namely a red (R) component, a green (G) component and a blue (B) component, and each pixel component needs 8 bits when stored, one pixel row, namely 1920pixel =1920 × 3 × 8bit =90 × 512bit, so that it can be obtained that each pixel row has 90 pixel units, and when horizontal mirroring is performed, firstly, address inversion is performed on each row of pixel units by using the pixel units as a unit, that is, the arrangement sequence of each pixel unit of each pixel row in the target image data is reversed, that is, the overall arrangement sequence of the pixel units in the first row of pixels in fig. 4 is subjected to reverse order processing, that is, the overall reverse order of 90 pixel units is arranged, so as to obtain image data after reversal; then, performing data bit reverse order on each pixel point component in each pixel unit of each pixel row in the reversed image data to obtain image data after the reverse order; finally, reforming each pixel point in each pixel unit of each pixel row in the image data after the reverse order, that is, arranging pixel point components corresponding to each pixel point in each row according to the sequence of R, G, and B to obtain the image data after the mirror image processing, for example, as shown in fig. 4, the storage sequence of the pixel point components B1, G1, and R1 is adjusted to R1, G1, and B1.
After performing horizontal mirroring on the target image data, the programmable logic device 206 performs second output scaling on the mirrored image data by using an idle scaling resource, that is, an output scaling module that is not used during the first scaling to obtain a target mirrored output image, and outputs the target mirrored output image. Here, in order to realize that the target mirror image output image and the target output image are in a mirror image relationship, the number of output scaling modules corresponding to the target output image is the same as the number of output scaling modules corresponding to the target mirror image output image.
In a specific embodiment of the present invention, the performing input scaling processing on the target input source to obtain a processed input source includes: carrying out reduction processing on the target input source to obtain the processed input source; performing a first output scaling process on the target image data by using a scaling processing resource to obtain a target output image, including: performing first amplification processing on the target image data to obtain a target output image; the second output scaling processing is performed on the image data after the mirror image processing to obtain a target mirror image output image, and the method comprises the following steps: the image data after the mirror image processing is subjected to the second amplification processing to obtain the target mirror image output image, that is, when the programmable logic device 204 performs the scaling processing, before the DDR stores the data, the image reduction processing is performed, and then the image amplification processing is performed, so that the bandwidth of the DDR is saved, and the hardware resource of the image processor 200 is saved.
In the scheme, a processed input source is obtained by performing input scaling processing on the target input source, the processed input source is stored, at least part of image data of the stored processed input source is read according to image output parameters to obtain target image data, first output scaling processing is performed on the target image data by using scaling processing resources to obtain a target output image, and the target output image is output; adjusting the arrangement sequence of the pixel points in the target image data to obtain image data after mirror image processing; and performing second output scaling processing on the image data subjected to the mirror image processing by using idle scaling processing resources to obtain a target mirror image output image, and outputting the target mirror image output image, so that the target output image and the target mirror image output image in mirror image with the target output image are obtained under the condition of not increasing resource overhead.
[ second embodiment ]
As shown in fig. 5A, a second embodiment of the present invention provides an image processing apparatus 300. The image processing apparatus 300 includes an input source acquiring module 302, a process saving module 304, a data reading module 306, a first output module 308, a mirror processing module 310, and a second output module 312.
Specifically, the input source obtaining module 302 is configured to obtain a target input source.
The processing and saving module 304 is configured to perform input scaling processing on the target input source to obtain a processed input source, and save the processed input source.
The data reading module 306 is configured to read at least a part of the stored image data of the processed input source according to the image output parameter to obtain target image data.
The first output module 308 is configured to perform a first output scaling process on the target image data by using scaling processing resources to obtain a target output image, and output the target output image.
The mirror image processing module 310 is configured to adjust a configuration sequence of pixels in the target image data to obtain image data after mirror image processing.
The second output module 312 is configured to perform a second output scaling process on the image data after the mirror image processing by using the idle scaling processing resource to obtain a target mirror image output image, and output the target mirror image output image.
As described above, as shown in fig. 5B, the mirror processing module 310 includes a sequence reversing unit 3102, a data bit reverse unit 3104, and a pixel point rearranging unit 3108.
Specifically, the order reversing unit 3102 is configured to reverse the arrangement order of the pixel units of each pixel row in the target image data, so as to obtain reversed image data.
The data bit reversing unit 3104 is configured to reverse the data bits of the pixels in the pixel units of each pixel row in the reversed image data, so as to obtain the image data after reversing.
The pixel point reforming unit 3106 is configured to reform the pixel points in each pixel unit of each pixel row in the image data after the reverse order, so as to obtain the image data after the mirror image processing.
In one embodiment of the present invention, the pixel unit is determined based on memory read-write parameters, where the memory read-write parameters include: memory bit width, number of memory parallelism, and number of pre-read addresses.
The specific operation and technical effects between the modules in the image processing apparatus 300 in the present embodiment are described with reference to the foregoing first embodiment.
[ third embodiment ]
As shown in fig. 6, a third embodiment of the present invention provides an image processing system 400. The image processing system 400 includes a memory 410 and a processor 430 coupled to the memory 410. The memory 310 may be, for example, a non-volatile memory, on which the computer program 411 is stored. The processor 430 may, for example, comprise an embedded processor. The processor 430 executes the image processing method provided in the foregoing first embodiment when running the computer program 411.
[ fourth example ] A
As shown in FIG. 7, a fourth embodiment of the present invention provides a computer storage medium 500 having stored thereon computer-executable instructions 510. The computer-executable instructions 510 are for performing the image processing method as described in the first embodiment above. The computer storage medium 500 is, for example, a non-volatile memory, such as including: magnetic media (e.g., hard disks, floppy disks, and magnetic tape), optical media (e.g., cd ROM disks and DVDs), magneto-optical media (e.g., optical disks), and hardware devices specially constructed for storing and executing computer-executable instructions (e.g., read Only Memories (ROMs), random Access Memories (RAMs), flash memories, etc.). The computer storage medium 500 may be executable by one or more processors or processing devices to execute computer-executable instructions 510.
In addition, it should be understood that the foregoing embodiments are merely exemplary illustrations of the present invention, and the technical solutions of the embodiments can be arbitrarily combined and collocated without conflict between technical features and structural contradictions, which do not violate the purpose of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, a division of a unit is merely a division of one logic function, and an actual implementation may have another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may also be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, each functional unit/module in the embodiments of the present invention may be integrated into one processing unit/module, or each unit/module may exist alone physically, or two or more units/modules may be integrated into one unit/module. The integrated units/modules may be implemented in the form of hardware, or may be implemented in the form of hardware plus software functional units/modules.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (9)
1. An image processing method, comprising:
acquiring a target input source;
performing input zooming processing on the target input source to obtain a processed input source, and storing the processed input source;
reading at least a part of image data of the processed input source according to the image output parameters to obtain target image data;
performing first output scaling processing on the target image data by using scaling processing resources to obtain a target output image, and outputting the target output image;
adjusting the arrangement sequence of the pixel points in the target image data to obtain image data subjected to mirror image processing; and
performing second output scaling processing on the image data subjected to mirror image processing by using idle scaling processing resources to obtain a target mirror image output image, and outputting the target mirror image output image;
wherein, the performing the input scaling processing on the target input source to obtain the processed input source comprises:
carrying out reduction processing on the target input source to obtain the processed input source;
performing a first output scaling process on the target image data by using a scaling processing resource to obtain a target output image, including:
performing first amplification processing on the target image data to obtain a target output image;
the second output scaling processing is performed on the image data after the mirror image processing to obtain a target mirror image output image, and the method comprises the following steps:
and carrying out second amplification processing on the image data subjected to mirror image processing to obtain the target mirror image output image.
2. The image processing method of claim 1, wherein the image output parameters comprise: and the initial position information, the image width information and the height information of the target image data are stored.
3. The image processing method according to claim 1, wherein the adjusting the arrangement order of the pixels in the target image data to obtain the image data after the mirror image processing includes:
and adjusting the arrangement sequence of the pixel points in the target image data, and keeping the arrangement sequence of each pixel row in the target image data unchanged.
4. The image processing method according to claim 3, wherein the adjusting the arrangement order of the pixels in the target image data to obtain the image data after the mirror image processing specifically comprises:
reversing the arrangement sequence of each pixel unit of each pixel row in the target image data to obtain reversed image data;
performing data bit reverse order on each pixel point component in each pixel unit of each pixel row in the reversed image data to obtain image data after reverse order;
and reforming each pixel point in each pixel unit of each pixel row in the image data after the reverse order to obtain the image data after the mirror image processing.
5. The image processing method of claim 4, wherein the pixel unit is determined based on memory read-write parameters, wherein the memory read-write parameters comprise: memory bit width, number of memory parallels, and number of pre-read addresses.
6. An image processing apparatus characterized by comprising:
the input source acquisition module is used for acquiring a target input source;
the processing and storing module is used for performing input zooming processing on the target input source to obtain a processed input source and storing the processed input source;
the data reading module is used for reading at least part of image data of the processed input source according to the image output parameters to obtain target image data;
the first output module is used for performing first output scaling processing on the target image data by using scaling processing resources to obtain a target output image and outputting the target output image;
the mirror image processing module is used for adjusting the arrangement sequence of the pixel points in the target image data to obtain image data after mirror image processing; and
the second output module is used for carrying out second output zooming processing on the image data after the mirror image processing by using idle zooming processing resources to obtain a target mirror image output image and outputting the target mirror image output image;
the processing and storing module is further specifically configured to perform reduction processing on the target input source to obtain the processed input source;
the first output module is further specifically configured to perform first amplification processing on the target image data to obtain the target output image;
the second output module is further specifically configured to perform a second amplification process on the image data after the mirror image processing to obtain the target mirror image output image.
7. The image processing apparatus according to claim 6, wherein the mirroring processing module includes:
the sequence reversing unit is used for reversing the arrangement sequence of each pixel unit of each pixel row in the target image data to obtain reversed image data;
a data bit reverse order unit, configured to perform data bit reverse order on each pixel component in each pixel unit of each pixel row in the reversed image data, so as to obtain image data after reverse order; and
and the pixel point reforming unit is used for reforming each pixel point in each pixel unit of each pixel row in the image data after the reverse sequence to obtain the image data after the mirror image processing.
8. The image processing apparatus of claim 7, wherein the pixel unit is determined based on memory read-write parameters, wherein the memory read-write parameters comprise: memory bit width, number of memory parallels, and number of pre-read addresses.
9. An image processing system, comprising: a memory and a processor coupled to the memory; the memory stores a computer program which, when executed by the processor, performs the image processing method of any one of claims 1 to 5.
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