CN112507651A - Data processing method and device for circuit board design, electronic equipment and storage medium - Google Patents

Data processing method and device for circuit board design, electronic equipment and storage medium Download PDF

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Publication number
CN112507651A
CN112507651A CN202011372945.8A CN202011372945A CN112507651A CN 112507651 A CN112507651 A CN 112507651A CN 202011372945 A CN202011372945 A CN 202011372945A CN 112507651 A CN112507651 A CN 112507651A
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China
Prior art keywords
area
circuit board
routing
mark point
plate frame
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Chinese (zh)
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卢琳
孟丽芳
徐沙沙
于平平
程朱贝
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Shanghai Bachu Cnc Technology Co ltd
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Shanghai Bachu Cnc Technology Co ltd
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Priority to CN202011372945.8A priority Critical patent/CN112507651A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/394Routing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/12Printed circuit boards [PCB] or multi-chip modules [MCM]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The invention provides a data processing method and device for circuit board design, electronic equipment and a storage medium, wherein the data processing method for circuit board design comprises the following steps: acquiring a plate frame file; in the plate frame file, a mark point forbidden distribution area is arranged in the adjacent range of the edge of the circuit board; and detecting whether the routing or the device is arranged at the position corresponding to the mark point layout forbidding area or not during the process of designing the circuit board based on the plate frame file and/or after the design is finished.

Description

Data processing method and device for circuit board design, electronic equipment and storage medium
Technical Field
The invention relates to the field of PCB design, in particular to a data processing method and device for circuit board design, electronic equipment and a storage medium.
Background
Marking points, also known as optical locating points and also described as Mark points, can be used for solder paste printing and optical locating of component patches during the manufacturing process of Circuit boards (or PCB boards, where the PCB is specifically a Printed Circuit Board), providing a common measurable point for all steps in the assembly process, which enables each device used for assembly to accurately locate the Circuit pattern.
In the design process of the circuit board, the arrangement position of the mark points has a specific specification, for example, the mark points cannot be arranged at a position too close to the edge of the circuit board. If the mark point fails to meet the specification (e.g., is placed too close to the edge of the board), it will adversely affect the welding process after the design, for example: when the piece is pasted, the mark points are easily blocked by the track, so that the machine cannot normally judge the coordinates, and the piece cannot be pasted normally.
Disclosure of Invention
The invention provides a data processing method and device for circuit board design, electronic equipment and a storage medium, which are used for solving the problem that when a mark point is placed at a position too close to a board edge, the mark point can bring adverse influence on a welding process after the design.
According to a first aspect of the present invention, there is provided a data processing method for circuit board design, comprising:
acquiring a plate frame file; in the plate frame file, a marking point forbidden distribution area is arranged in the adjacent range of the edge of the circuit board;
and detecting whether the routing or the device is arranged at the position corresponding to the mark point layout forbidding area or not during the process of designing the circuit board based on the plate frame file and/or after the design is finished.
Optionally, the data processing method for circuit board design further includes:
if the position corresponding to the mark point forbidden arrangement area is detected to arrange the routing or the device, the following steps are carried out:
detecting target marking points which are misplaced at corresponding positions of the marking point forbidden arrangement areas, and determining misplaced positions of the target marking points;
and displaying the misplaced position in an interactive interface.
Optionally, detecting a target mark point misplaced at a position corresponding to the forbidden arrangement area of the mark point, and determining the misplaced position of the target mark point, includes:
determining a detection area near each corner point according to the position of the corner point of the plate frame in the plate frame layer;
dividing the detection area into a plurality of area units; the size of each area unit is matched with the size of a single marking point;
and if the position corresponding to any one target area unit is detected to have the circular routing, determining the position corresponding to the target area unit as the misplaced position.
Optionally, displaying the misplaced position in an interactive interface includes:
displaying the routing in the routing layer in the interactive interface, displaying the detected circular routing in a first display mode, and displaying at least part of the routing except the detected circular routing in the routing layer in a second display mode; the first display mode and the second display mode are different display modes.
Optionally, after determining the corresponding misplaced position, the method further includes:
determining a recommendation area, wherein the recommendation area is positioned outside the detection area to which the target area unit belongs;
and if the fact that the silk screen printing and the routing are not arranged at the position corresponding to the recommended area is detected, displaying the recommended area in a third display mode in the interactive interface.
Optionally, the mark point keep-out region is formed between a first boundary line and a second boundary line, the first boundary line is matched with an edge of a circuit board in the board frame file, and a distance between the second boundary line and the corresponding first boundary line is between 4.5 millimeters and 5.5 millimeters.
Optionally, the data processing method for circuit board design further includes:
if the position corresponding to the mark point forbidden arrangement area is detected to arrange the routing or the device, the following steps are carried out: and actively reporting errors.
According to a second aspect of the present invention, there is provided a data processing apparatus for circuit board design, comprising:
the plate frame acquisition module is used for acquiring a plate frame file; in the plate frame file, a mark point forbidden distribution area is arranged in the adjacent range of the edge of the circuit board;
and the layout forbidding area detection module is used for detecting whether the routing or the device is arranged at the position corresponding to the mark point layout forbidding area in the process of designing the circuit board based on the board frame file and/or after the design is finished.
According to a third aspect of the invention, there is provided an electronic device comprising a memory and a processor,
the memory is used for storing codes;
the processor is configured to execute the codes in the memory to implement the data processing method of the circuit board design according to the first aspect and its optional aspects.
According to a fourth aspect of the present invention, there is provided a storage medium having stored thereon a program which, when executed by a processor, implements the data processing method of the circuit board design relating to the first aspect and its alternatives.
In the data processing method, the device, the electronic equipment and the storage medium for circuit board design provided by the invention, the mark point forbidden arrangement area is arranged in the plate frame file, and the mark point forbidden arrangement area is adjacent to the edge of the circuit board, so that the mark point forbidden arrangement area can be used as a basis for the misplacement detection of the mark point. Therefore, the method and the device can find the wrong placement of the marking points timely and accurately at the design source, thereby assisting designers in standardizing the positions of the marking points at the design source.
Furthermore, in the alternative scheme of the invention, through the detection and display of the misplaced position, a designer can be helped to quickly and accurately position the misplaced mark points.
Furthermore, in the alternative scheme of the invention, the position of the mark point can be helped to be changed quickly and reasonably by the designer through the positioning and display of the recommended area.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a first flowchart illustrating a data processing method for circuit board design according to an embodiment of the present invention;
FIGS. 2a and 2b are schematic diagrams of a marker-forbidden region according to two embodiments of the present invention;
FIG. 3 is a second flowchart illustrating a data processing method for circuit board design according to an embodiment of the present invention;
FIG. 4a is a first flowchart illustrating steps S15 and S16 according to an embodiment of the present invention;
FIG. 4b is a flowchart illustrating a second step of S15 and S16 according to an embodiment of the present invention;
FIG. 5 is a third schematic flow chart illustrating a data processing method for circuit board design according to an embodiment of the present invention;
FIG. 6 is a first schematic diagram of program modules of a data extraction apparatus for circuit board design according to an embodiment of the present invention;
FIG. 7 is a second schematic diagram of a program module of a data extracting apparatus for circuit board design according to an embodiment of the present invention;
FIG. 8 is a third schematic diagram of a program module of a data extracting apparatus for circuit board design according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of an electronic device in an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Moreover, the terms "comprises," "comprising," and any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The technical solution of the present invention will be described in detail below with specific examples. These particular embodiments may be combined with each other below, and details of the same or similar concepts or processes may not be repeated in some embodiments.
The data processing method for circuit board design according to the embodiment of the present invention may be applied to an electronic device for designing a circuit board, such as a computer, a tablet computer, a server, a client, and the like, wherein corresponding software for circuit board design, such as allogiro software, Mentor WG software, and the like, may be configured, but is not limited to the software exemplified herein, and as long as the concept of the embodiment of the present invention is implemented, no matter what kind of software or hardware is implemented, the scope of the embodiment of the present invention is not departing from.
The circuit board may be a rectangular circuit board.
In the embodiment of the present invention, referring to fig. 1, a data processing method for circuit board design includes:
s11: acquiring a plate frame file;
s12: and detecting whether the routing or the device is arranged at the position corresponding to the mark point layout forbidding area or not during the process of designing the circuit board based on the plate frame file and/or after the design is finished.
In the plate frame file, a mark point distribution prohibiting area is arranged in the adjacent range of the edge of the circuit board; the proximity range may refer to any range in which the distance from the edge of the circuit board is smaller than a preset distance threshold. Meanwhile, the selection of the adjacent range can be configured based on the design specification of the circuit board.
The process of acquiring the sheet frame file may be understood as a process of creating and forming the sheet frame file, may also be understood as a process of importing the created sheet frame file into the circuit board design software, and may also be understood as a process of creating and forming the sheet frame file and importing the sheet frame file into the circuit board design software, but is not limited thereto, and as long as the sheet frame file having the mark point distribution prohibition area can be acquired by the electronic device and can be designed based on the acquired sheet frame file, the scope of the embodiment of the present invention is not limited.
In one embodiment, when the mark points are placed on the single board, at least three mark points may be placed, for example, the mark points may be distributed in an L shape, wherein two mark points at opposite corners may be asymmetric with respect to the center. In the design process of the circuit board, if the TOP surface and the Bottom surface both have the components of the paster, marking points need to be placed on each surface, and if the TOP surface and the Bottom surface do not have the components of the paster, the marking points do not need to be placed. Of course, the scene to which the embodiment of the present invention is applied is not limited to the mark point placement manner.
According to one design specification of the circuit board, the distance between the center of the mark point and the edge of the circuit board is not less than 5.0 mm. If less than 5.0 mm, then: when the piece is pasted, the mark point is blocked by the track, so that the machine cannot normally judge the coordinate, and the piece cannot be pasted normally.
Therefore, in one embodiment, the mark-point keep-out region is formed between a first boundary line and a second boundary line, the first boundary line is matched with an edge of the circuit board in the board-frame file (for example, the two lines are partially or completely overlapped), and a distance between the second boundary line and the corresponding first boundary line (i.e., the aforementioned distance threshold) is between 4.5 mm and 5.5 mm, for example, 4.5 mm, 4.75 mm, 5 mm, 5.25 mm, and 5.5 mm.
In some examples, as shown in fig. 2a, the mark-point keep-out areas 100 may be in a ring shape (e.g., a rectangular ring shape) and distributed on one circle of the circuit board; in this case, there may be a ring-shaped first boundary line 101 and a ring-shaped second boundary line 102, and the distance between the two boundary lines may be determined based on the design specification (e.g. 4.5 mm, 5 mm, etc. as mentioned above), in which case the first boundary line 101 completely coincides with the edge of the circuit board.
In another example, as shown in fig. 2b, the number of the mark forbidden arrangement regions 100 may also be at least one, each mark forbidden arrangement region 100 is correspondingly disposed at one corner of the circuit board, for example, for a single corner, the corresponding mark forbidden arrangement region is rectangular (further may be square), and has two first boundary lines 101 and two second boundary lines 102, and at this time, the mark forbidden arrangement region 100 may be formed as a rectangle by half-surrounding the corresponding corner. For a single corner point, two first boundary lines 101 are perpendicular to each other and coincide with two circuit board edges forming the corner point, each first boundary line 101 is parallel to a corresponding second boundary line 102, wherein a distance between the corresponding (i.e. parallel) first boundary line 101 and the second boundary line 102 may be determined based on design specifications (e.g. 4.5 mm, 5 mm, etc. as mentioned above).
In various examples, the design of the mark point exclusion area and the boundary line therein may be changed arbitrarily without departing from the scope of the embodiments of the present invention, as long as it is associated with the design specification of the mark point and can help detect the mark point that does not meet the specification.
In the above scheme of using the mark point forbidden arrangement region, the mark point forbidden arrangement region is arranged in the plate frame file, and the mark point forbidden arrangement region is adjacent to the edge of the circuit board, so that a basis can be provided for the misplacement detection of the mark point through the mark point forbidden arrangement region. Therefore, the embodiment of the invention can find the wrong placement of the marking points timely and accurately at the design source, thereby assisting designers to standardize the positions of the marking points at the design source.
In one embodiment, referring to fig. 3, the data processing method for circuit board design further includes:
s13: whether the routing or the device is arranged at the position corresponding to the mark point forbidden arrangement area is detected;
if the determination result in the step S13 is yes, the step S14 may be implemented: and actively reporting errors.
The active error reporting mode can display corresponding information of error reporting through a man-machine interaction interface, can broadcast corresponding information of error reporting through modes such as voice and the like, and can send corresponding information of error reporting through modes such as sending mails and information to the outside.
The corresponding information of the error report may be, for example, any information related to the circuit board, and further may or may not indicate the error report caused by which mark point prohibited area.
Regardless of the error reporting method and the specific error reporting information, the error reporting is based on the detection in step S12, and thus does not depart from the scope of the above embodiments.
In addition, in some schemes, error reporting may not be implemented, for example: if the interaction and feedback are performed in steps such as step S15, an error may or may not be reported.
In one embodiment, the data processing method for circuit board design further includes:
if the determination result of step S13 is yes, the following steps may be performed:
s15: detecting target marking points which are misplaced at corresponding positions of the marking point forbidden arrangement areas, and determining misplaced positions of the target marking points;
s16: and displaying the misplaced position in an interactive interface.
The misplacement can be understood as placing the mark points in the mark point forbidden region.
The misplaced position of the target mark point can be positioned through the detection of the target mark point, so that the misplaced position can be displayed according to the misplaced position, and furthermore, through the detection and the display of the misplaced position, a designer can be helped to quickly and accurately position the misplaced mark point.
The positioning and displaying of the misplaced positions will be exemplified below with reference to fig. 5, but the means for implementing steps S15 and S16 are not limited thereto.
Referring to fig. 5, in an example, step S15 may include:
s151: determining a detection area near each corner point according to the position of the corner point of the plate frame in the plate frame layer;
s152: dividing the detection area into a plurality of area units; the size of each area unit is matched with the size of a single marking point;
s153: whether the position corresponding to any one target area unit is detected to have circular routing or not is detected;
if the determination result in step S153 is yes, step S154 may be implemented: and determining the position corresponding to the target area unit as the misplaced position.
Correspondingly, step S16 may include:
s161: displaying the routing in the routing layer in the interactive interface, displaying the detected circular routing in a first display mode, and displaying at least part of the routing except the detected circular routing in the routing layer in a second display mode; the first display mode and the second display mode are different display modes.
At least some of the traces may be, for example: all other tracks in the track layer, except the detected circular track. The number of the target area units and the target mark points may be one or more.
In a specific example, before step S151, according to different stacking attributes, a Conductor attribute may be defined as a routing layer, and an Outline attribute may be defined as a frame layer; the interactive interface may be, for example, a pop-up window, and all wiring layers and board frames of the circuit board (i.e., PCB board) may be displayed in the pop-up window.
The angular points may be understood as four corners of a plate frame rectangle, the detection area may be understood as any area near the angular point, and the size value of the detection area may be arbitrarily configured with reference to the specification of the marker point, for example, for each angular point, a range where the distance from the angular point is less than (5.5-x) mm may be selected as the detection area, at this time, the detection area may be a circular area, and for each angular point, a detection area of a rectangle (further may be a square) may be formed, one vertex of the rectangle is the angular point, and the side length of each side is less than (5.5-x) mm. In any case, the detection region in the above embodiments can be used.
In addition, x mentioned above is greater than or equal to zero, and a smaller value may be selected as much as possible.
Furthermore, in steps S151 to S153, after the detection area is set, it can be detected in a loop to determine whether there is a mark point in the area (i.e. the process of step S153 is repeatedly performed).
If four sides of the plate frame are described by the position relationship of up, down, left and right, respectively, and the coordinate system is XY coordinate system, and the left and right directions correspond to the X-axis direction of the XY coordinate system, and the up and down directions correspond to the Y-axis direction of the XY coordinate system, then: in steps S152, S153, and S154, the specific implementation process for a single corner point may be, for example:
in the area of the lower left corner (5.5-X) of the plate frame, the detection area is divided into small copper sheets with the length and width of 1 mm or smaller than the size according to the coordinate interval S along the directions of an X axis and a Y axis, wherein the area of each small copper sheet is the area unit mentioned above, and S can be as small as possible;
then, whether a circular trace with the diameter of 1 mm exists on each small copper sheet is judged (the circular trace can be understood as a target mark point). It can be seen that the circular trace in step S153 may further be a circular trace with a diameter of 1 mm.
And for other corner points, the steps can be repeated to finish the detection of the remaining three detection areas.
The detection of each detection region may be performed sequentially or in parallel. The size, shape, and the like of each detection region may be the same or different, and the size, shape, and the like of the region units divided in different detection regions may be the same or different.
In step S161, the first display mode and the second display mode may be understood as any display mode different from each other in a user-defined manner, in one example, the circular trace may be displayed as a highlight, and other traces may be displayed as non-highlights, at this time, the highlight display mode is the first display mode, and the non-highlight display mode is the second display mode, in another example, the circular trace may be displayed as a non-highlight, and other traces may be displayed as highlights, at this time, the highlight display mode is the second display mode, and the non-highlight display mode is the first display mode.
In addition, the first display mode and the second display mode may also include other factors without limitation to whether the display is highlighted or not, such as thickness of lines, line type, color, and the like.
In a specific example, since the traces and the frame are already displayed in the pop-up window before step S151, all the traces on the trace layer can be highlighted at the same time; then, after step S154, that is, after the misplacement position is determined (that is, the target area unit is determined), the traces on the copper sheet which are not 1 mm in diameter can be brightened; the highlighted portion is left as the target mark point (i.e. the detected circular trace). As can be seen, the above example uses an inverse highlight method to display the target mark point (i.e. the detected circular trace), so as to display the misplaced position.
In other embodiments, the target area cell may be specifically displayed in a certain display mode so as to be distinguished from other area cells, and the target area cell may be displayed in green (or another color), for example. Meanwhile, the means for displaying the target area unit in particular and the means for displaying the circular trace in the first display mode may be implemented alternatively or simultaneously.
Based on the specific means of the steps S15 and S16, the target mark point that is misplaced can be accurately and timely detected, so that a basis is provided for further design (for example, the position of the mark point is changed) of a designer, and workload caused by the fact that the designer finds the misplaced mark point by himself/herself is avoided.
In a further aspect, please refer to fig. 5, after determining the corresponding misplaced position, the method may further include:
s17: determining a recommendation area, wherein the recommendation area is positioned at the outer side of the detection area to which the target area unit belongs;
s18: whether silk screen printing or routing is arranged at a position corresponding to the recommended area is detected;
if the determination result in the step S18 is negative, that is, it is detected that the position corresponding to the recommended area is not provided with the silk screen and the routing, the step S19 may be implemented: and displaying the recommended area in a third display mode in the interactive interface.
Before the steps are implemented, according to different stacking attributes, the Conductor attribute is defined as a routing layer, the out attribute is defined as a plate frame layer, and the Silk layer attribute is defined as a screen printing layer.
The recommended region may be, for example, a part of the region outside the detection region in the range of (x + y) mm. With reference to a corner point, in one example, the detection region may be a region within (5.5-x) mm from the corner point, and the recommendation region may be a region within (5.5-x) mm to (5.5+ y) mm from the corner point. Wherein y is more than or equal to 0.
The shape of the recommendation area may be a shape suitable for being semi-enclosed outside the detection area, such as: if the detection area is rectangular, the recommended area may be in a shape of L-shape half-enclosed outside the detection area, for example: if the detection area is fan-shaped, the recommended area may be in the shape of a fan ring (e.g., a shape formed between two parallel arcs).
The third display mode may be any means for displaying the region, and specifically, may be specially configured for at least one of the following factors of the recommended region: the color, pattern, line type of area outline, color, thickness, etc. filled in the recommended area.
In addition, the recommended area is displayed on the basis of misplacement, and if the misplacement does not occur any more (for example, the misplacement does not occur after the designer adjusts the mark point), the recommended area can not be displayed any more.
For example, assuming that the third display mode is to mark the recommended area red, and the target mark point is displayed in a highlighted manner in step S16, then: when the designer adjusts the mark point to the red area (i.e. the recommendation area), the recommendation area can be kept displayed as the red area until the highlight display of the mark point is not performed, and at the moment, the distance between the mark point and the plate edge meets the requirement and the mark point is not misplaced any more.
Furthermore, the misplaced position of the feedback, which is located in steps S15 and S16, and/or the recommended region of the feedback, which is determined in steps S17 and S19, may be varied as the designer adjusts the marking points.
In the scheme, the position of the marking point can be changed quickly and reasonably by the designer through the positioning and display of the recommended area.
Referring to fig. 6, an embodiment of the present invention further provides a data processing apparatus 2 for circuit board design, including:
a frame acquisition module 21, configured to acquire a frame file; in the plate frame file, a mark point forbidden distribution area is arranged in the adjacent range of the edge of the circuit board;
and the forbidden layout area detection module 22 is configured to detect whether a trace or a device is arranged at a position corresponding to the mark point forbidden layout area during and/or after the design of the circuit board based on the board frame file.
Optionally, referring to fig. 7, the data processing apparatus 2 designed by the circuit board further includes:
the active error reporting module 23 is configured to, if it is detected that a trace or a device is arranged at a position corresponding to the mark point distribution prohibition area: and actively reporting errors.
Optionally, referring to fig. 8, the data processing apparatus 2 designed by the circuit board further includes:
a misplacement detection module 24 for: if detecting that the routing or the device is arranged at the position corresponding to the mark point forbidden arrangement area, detecting a target mark point misplaced at the position corresponding to the mark point forbidden arrangement area, and determining the misplaced position of the target mark point;
and a misplacing display module 25, configured to display the misplaced position in the interactive interface.
Optionally, the misplacement detecting module 24 is specifically configured to:
determining a detection area near each corner point according to the position of the corner point of the plate frame in the plate frame layer;
dividing the detection area into a plurality of area units; the size of each area unit is matched with the size of a single marking point;
and if the position corresponding to any one target area unit is detected to have the circular routing, determining the position corresponding to the target area unit as the misplaced position.
Optionally, the misplaced display module 25 is specifically configured to:
displaying the routing in the routing layer in the interactive interface, displaying the detected circular routing in a first display mode, and displaying at least part of the routing except the detected circular routing in the routing layer in a second display mode; the first display mode and the second display mode are different display modes.
Optionally, referring to fig. 8, the data processing apparatus 2 designed by the circuit board further includes:
a recommendation region determining module 26, configured to determine a recommendation region, where the recommendation region is located outside the detection region to which the target region unit belongs;
and a recommendation display module 27, configured to display the recommendation area in a third display manner in the interactive interface if it is detected that the position corresponding to the recommendation area is not provided with the silk screen and the routing.
Optionally, the mark point keep-out area is formed between a first boundary line and a second boundary line, the first boundary line is matched with an edge of a circuit board in the board frame file, and a distance between the second boundary line and the corresponding first boundary line is greater than or equal to 5 mm.
In summary, in the data processing method and apparatus for circuit board design provided in the embodiments of the present invention, the mark point forbidden arrangement region is set in the board frame file, and the mark point forbidden arrangement region is adjacent to the edge of the circuit board, and the mark point forbidden arrangement region can be used as a basis for the misplacement detection of the mark point. Therefore, the embodiment of the invention can find the wrong placement of the marking points in time and accurately at the design source head, thereby assisting designers to standardize the positions of the marking points at the design source head.
Referring to fig. 9, an embodiment of the invention provides an electronic device 3, including:
a processor 31; and the number of the first and second groups,
a memory 32 for storing executable instructions of the processor;
wherein the processor 31 is configured to perform the above-mentioned method via execution of the executable instructions.
The processor 31 is capable of communicating with the memory 32 via a bus 33.
Embodiments of the present invention also provide a computer-readable storage medium, on which a computer program is stored, which when executed by a processor implements the above-mentioned method.
Those of ordinary skill in the art will understand that: all or a portion of the steps for implementing the above-described method embodiments may be performed by hardware associated with program instructions. The foregoing program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (10)

1. A data processing method for circuit board design is characterized by comprising the following steps:
acquiring a plate frame file; in the plate frame file, a mark point forbidden distribution area is arranged in the adjacent range of the edge of the circuit board;
and detecting whether the routing or the device is arranged at the position corresponding to the mark point layout forbidding area or not during the process of designing the circuit board based on the plate frame file and/or after the design is finished.
2. The method for processing circuit board design data according to claim 1, further comprising:
if the position corresponding to the mark point forbidden arrangement area is detected to arrange the routing or the device, the following steps are carried out:
detecting target mark points which are misplaced at corresponding positions of mark point forbidden arrangement areas, and determining misplaced positions of the target mark points;
and displaying the misplaced position in an interactive interface.
3. The method for processing the data of the circuit board design according to claim 2, wherein detecting the target mark point misplaced at the position corresponding to the forbidden arrangement area of the mark point, and determining the misplaced position of the target mark point comprises:
determining a detection area near each corner point according to the position of the corner point of the plate frame in the plate frame layer;
dividing the detection area into a plurality of area units; the size of each area unit is matched with the size of a single marking point;
and if the position corresponding to any one target area unit is detected to have the circular routing, determining the position corresponding to the target area unit as the misplaced position.
4. The method of claim 3, wherein displaying the misplaced locations in an interactive interface comprises:
displaying the routing in the routing layer in the interactive interface, displaying the detected circular routing in a first display mode, and displaying at least part of the routing except the detected circular routing in the routing layer in a second display mode; the first display mode and the second display mode are different display modes.
5. The method of claim 4, wherein after determining the corresponding misplacement position, further comprising:
determining a recommendation area, wherein the recommendation area is positioned at the outer side of the detection area to which the target area unit belongs;
and if the fact that silk screen printing and routing are not arranged at the position corresponding to the recommended area is detected, displaying the recommended area in a third display mode in the interactive interface.
6. The method as claimed in any one of claims 1 to 5, wherein the mark exclusion area is formed between a first boundary line and a second boundary line, the first boundary line is matched with an edge of the circuit board in the board frame file, and the distance between the second boundary line and the corresponding first boundary line is between 4.5 mm and 5.5 mm.
7. The circuit board designed data processing method according to any one of claims 1 to 5, further comprising:
if the position corresponding to the mark point forbidden arrangement area is detected to arrange the routing or the device, the following steps are carried out: and actively reporting errors.
8. A circuit board designed data processing apparatus, comprising:
the plate frame acquisition module is used for acquiring a plate frame file; in the plate frame file, a mark point forbidden distribution area is arranged in the adjacent range of the edge of the circuit board;
and the layout forbidding area detection module is used for detecting whether the routing or the device is arranged at the position corresponding to the mark point layout forbidding area in the process of designing the circuit board based on the board frame file and/or after the design is finished.
9. An electronic device, comprising a memory and a processor,
the memory is used for storing codes;
the processor is used for executing the codes in the memory to realize the data processing method of the circuit board design in any one of claims 1 to 7.
10. A storage medium on which a program is stored, characterized in that the program, when executed by a processor, implements the data processing method of the circuit board design according to any one of claims 1 to 7.
CN202011372945.8A 2020-11-30 2020-11-30 Data processing method and device for circuit board design, electronic equipment and storage medium Pending CN112507651A (en)

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CN202011372945.8A CN112507651A (en) 2020-11-30 2020-11-30 Data processing method and device for circuit board design, electronic equipment and storage medium

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Application Number Priority Date Filing Date Title
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200903287A (en) * 2007-07-06 2009-01-16 United Microelectronics Corp Method for arranging virtual patterns
CN101424706A (en) * 2008-11-28 2009-05-06 深圳华为通信技术有限公司 Test anchor point making method and test anchor point and veneer
CN101625997A (en) * 2008-05-08 2010-01-13 台湾积体电路制造股份有限公司 Dummy pattern design for reducing device performance drift
CN208300121U (en) * 2018-06-28 2018-12-28 昆山万源通电子科技有限公司 PCB with anti-Mark point deformation function
CN109446626A (en) * 2018-10-22 2019-03-08 郑州云海信息技术有限公司 A kind of the matching impedance method and relevant apparatus of difference wire pin
WO2019179314A1 (en) * 2018-03-22 2019-09-26 腾讯科技(深圳)有限公司 Method for displaying marker point position, electronic device, and computer readable storage medium
CN110489830A (en) * 2019-07-31 2019-11-22 苏州浪潮智能科技有限公司 The design detection method and computer storage medium of pcb board card

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200903287A (en) * 2007-07-06 2009-01-16 United Microelectronics Corp Method for arranging virtual patterns
CN101625997A (en) * 2008-05-08 2010-01-13 台湾积体电路制造股份有限公司 Dummy pattern design for reducing device performance drift
CN101424706A (en) * 2008-11-28 2009-05-06 深圳华为通信技术有限公司 Test anchor point making method and test anchor point and veneer
WO2019179314A1 (en) * 2018-03-22 2019-09-26 腾讯科技(深圳)有限公司 Method for displaying marker point position, electronic device, and computer readable storage medium
CN208300121U (en) * 2018-06-28 2018-12-28 昆山万源通电子科技有限公司 PCB with anti-Mark point deformation function
CN109446626A (en) * 2018-10-22 2019-03-08 郑州云海信息技术有限公司 A kind of the matching impedance method and relevant apparatus of difference wire pin
CN110489830A (en) * 2019-07-31 2019-11-22 苏州浪潮智能科技有限公司 The design detection method and computer storage medium of pcb board card

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Application publication date: 20210316