Disclosure of Invention
The technical problem to be solved by the embodiments of the present invention is to provide a method and an apparatus for quickly constructing a digital twin workshop system, which solve the problem of twin system delayed mapping caused by a large amount of operation data in the digital twin workshop system by reasonably allocating resources occupied by geometric model data and dynamic logic data and by performing parallel computation on the geometric model data and the dynamic logic data by using a CPU and a GPU.
In order to solve the above technical problem, an embodiment of the present invention provides a method for quickly configuring a digital twin workshop system, including the following steps:
s1, forming a process file with a workshop production logic and a manufacturing procedure according to the extracted dynamic process data of the manufacturing workshop, and constructing a logic data model of the workshop according to the process file; acquiring geometric model data of a manufacturing workshop through an embedded data controller and the like to complete geometric data modeling of the digital twin workshop;
s2, transferring the geometric model data from the CPU memory to a pre-allocation cache area of the GPU based on a shader coding mode, and presetting coordinate transformation of the geometric model in a twin space through matrix transformation;
s3, the CPU sends a graphic rendering instruction to the GPU while calculating the dynamic logic data, so that the GPU and the geometric model data of the pre-allocation cache area interact in multiple batches, parallel calculation of the geometric model data is completed, and a rendered digital twin workshop is obtained.
The geometric model data of the manufacturing workshop is acquired by matching various tools such as an embedded data controller, a sensor network, a data acquisition card, an industrial camera and the like.
The dynamic process data of the workshop comprise workshop production logic, manufacturing process and the like. The geometric model data includes texture, position, size, and size data of the plant model.
Wherein, the step S3 specifically includes:
and the CPU sends a graphic rendering instruction to the GPU while calculating the dynamic logic data, after the GPU obtains the CPU graphic calling rendering instruction, the GPU performs multi-batch interaction with the geometric model data of the pre-allocation cache region, reads vertex data and rendering states of the geometric model data in the pre-allocation cache region in batches, and completes multi-batch rendering of the model. Determining the size and the position of the rendered model of each batch through corresponding matrix operation;
the embodiment of the invention also provides a rapid architecture device of a digital twin workshop system, which comprises:
the data modeling module is used for forming a process file with workshop production logic and manufacturing procedures according to the extracted dynamic process data of the manufacturing workshop and constructing a logic data model of the workshop; and acquiring geometric model data of the manufacturing workshop through an embedded data controller and the like to complete the geometric data modeling of the digital twin workshop.
The data transfer module transfers geometric model data, including vertex patches and other data, from a CPU memory to a pre-allocation cache region of the GPU based on a shader coding mode, and determines the size and the position of a rendered geometric model through matrix operation in the pre-allocation cache region of the GPU;
and the parallel computing module is used for sending a graphic rendering instruction to the GPU while the CPU computes the dynamic logic data, so that the GPU and the geometric model data of the pre-allocation cache area are interacted in multiple batches, and the vertex data and the rendering state of the geometric model data in the pre-allocation cache area are read in batches to finish the multiple-batch rendering of the model. Determining the size and the position of the rendered model of each batch through corresponding matrix operation;
the geometric model data of the manufacturing workshop is acquired by matching various tools such as an embedded data controller, a sensor network, a data acquisition card, an industrial camera and the like.
The dynamic process data of the workshop comprise workshop production logic, manufacturing process and the like. The geometric model data comprises the texture, position, size and other data of the workshop model.
The embodiment of the invention has the following beneficial effects:
according to the method, the pre-allocation cache area is established in the GPU, geometric model data operation in the digital twin workshop is divided from the CPU, so that frequent interaction between the CPU and the GPU caused by a large number of model rendering works is converted into data communication between the GPU and the pre-allocation cache area, the computing resources of the CPU are saved, the CPU can intensively process logic data (namely dynamic logic data) in the digital twin workshop, parallel computing of the twin workshop data by the CPU and the GPU is realized, reasonable distribution of resources occupied by the geometric model data and the dynamic logic data is realized, parallel computing of the twin workshop data by the CPU and the GPU is realized, and the problem of twin system delayed mapping caused by large amount of system operation data of the digital twin workshop is solved.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings.
As shown in fig. 1, a proposed method for quickly configuring a digital twin workshop system in an embodiment of the present invention includes the following steps:
step S1, forming a process file with workshop production logic and manufacturing procedures according to the extracted dynamic process data of the manufacturing workshop, and constructing a logic data model of the workshop; and acquiring geometric model data of the manufacturing workshop through an embedded data controller and the like to complete the geometric data modeling of the digital twin workshop.
The specific process is that the workshop environment and the production process of a common industrial manufacturing workshop are complex, the parts in the workshop are numerous, the production flow is complicated, and in order to build a digital twin workshop in a virtual environment, the physical geometric information of the manufacturing workshop needs to be accurately modeled and faithfully mapped.
Firstly, acquiring geometric model data and dynamic process data of a workshop by matching various tools such as an embedded data controller, a sensor network, a data acquisition card and an industrial camera, forming a process file and constructing a logic data model of the workshop; the geometric model data of the workshop comprise but are not limited to the texture, position, size and the like of a workshop global model, and the information data are static model data; the production logic information includes, but is not limited to, production processes and steps of a workshop dynamic production line, and the production logic information data is dynamic logic data.
Secondly, constructing a digital twin workshop based on the information model. For example, the geometric information of the information model, including geometric model data and dynamic process data of a workshop, is collected, a twin geometric model (namely a digital twin workshop) is constructed in a virtual environment, and meanwhile, the model is subjected to mesh merging optimization processing to prepare for constructing a scene.
Step S2 is to transfer the geometric model data from the CPU memory to the pre-allocation buffer of the GPU based on the shader encoding, and to preset the coordinate transformation of the geometric model in the twin space by matrix transformation.
The specific process is that the architecture of the digital twin plant depends on a large number of geometric models and logic model support with dynamic attributes, and a computer needs to give enough CPU resources to dynamic logic data with high complexity so as to realize high coupling between model logic behaviors.
In a traditional digital twin workshop based on CPU operation, a CPU needs to process a large amount of geometric model data and logic data simultaneously, so that the problems of high system memory pressure, too heavy CPU load and delayed mapping of a digital twin body are easily caused.
In view of the fact that the GPU internally comprises hundreds of stream processors and is suitable for parallel data calculation, a pre-allocation cache area is established in the GPU, and static model operation of a workshop is divided from the CPU (namely model data mapped in the digital twin workshop is transferred to the GPU pre-allocation cache area), so that frequent interaction between the CPU and the GPU is converted into data communication between the GPU and the pre-allocation cache area, and resource consumption of the CPU is avoided. Meanwhile, logic planning is carried out based on an actual manufacturing process and a process flow, constraint rules and dynamic logic data of production behaviors are established, the CPU can process the logic data in a centralized mode, parallel calculation of the CPU and the GPU on twin workshop data is achieved, and calculation efficiency is improved.
And step S3, the CPU sends a graphic rendering instruction to the GPU while calculating the dynamic logic data, so that the GPU and the geometric model data of the pre-allocation cache area interact in multiple batches, the parallel calculation of the geometric model data is completed, and the rendered digital twin workshop is obtained.
The method comprises the specific steps that a CPU sends a graphic rendering instruction to a GPU while calculating dynamic logic data, after the GPU obtains a CPU graphic call rendering instruction, the GPU and geometric model data of a pre-allocation cache area perform multi-batch interactive calculation, vertex data and rendering states of the geometric model data in the pre-allocation cache area are read in batches, and multi-batch rendering of the model is completed. Determining the size and the position of the rendered model of each batch through corresponding matrix operation;
in the embodiment of the invention, the process flow and the production logic of the manufacturing workshop are mainly calculated by a CPU, and the specific implementation mode comprises a state machine, collision detection and the like. In addition, the CPU also requires processing and calculation of geometric model data. As shown in fig. 2, all the dynamic logic data for implementing the dynamic production line are loaded into the memory from the disk, and then transmitted to the video memory of the GPU for storage. And the GPU reads the vertex data and the rendering state in the pre-allocation cache region in multiple batches according to the received CPU rendering command, and reads the size and the position of the preset model in the virtual space through the matrix transformation in the cache region. And finally, dynamically rendering the production logic picture of the workshop production line on a user interface.
Considering that the geometric model data of the workshop accords with the data characteristics of parallel computation, a large amount of model computation work is separated to the GPU for being carried out in a shader coding mode, a part of cache regions are pre-distributed in a GPU video memory for the GPU to read and write, and the CPU only needs to be responsible for informing the GPU of data interaction with the pre-distributed cache regions. As shown in fig. 3, for the CPU end to transmit geometric model DATA, a large amount of geometric model DATA (DATA2) in the digital twin plant is loaded from a disk to a memory, and then transferred to a pre-allocation buffer by means of transmission, storage, and the like, where DATA2 includes vertex information and rendering state of the geometric model.
As shown in fig. 4, in order to process the geometric model data by the GPU side, the CPU stores the data information of the geometric model in the pre-allocation cache region of the GPU, and when the GPU receives a graphics rendering instruction called by the CPU, reads vertex data and rendering states in the pre-allocation cache region in multiple batches, determines the size, position, and the like of a rendering model in the rendering batch through corresponding matrix operation, and implements parallel processing of logic and model data, thereby completing construction of a digital twin plant, as shown in fig. 5.
It should be noted that there are three main transformations of world coordinates (i.e., vertex transformations) of a twin in virtual space: the method comprises the steps of translating, zooming and rotating, wherein a workshop model with dynamic logic attributes can preset a motion track in a memory of a CPU.
Using homogeneous coordinate representation, an arbitrary vector (x, y, z) in a scene can be translated (t) in space on each coordinate axis, as shown in equation (1)x,ty,tz) Distance.
Assume that the scaling factor is (k)x,ky,kz) If all three scaling factors k are equal, called uniform scaling, otherwise non-uniform scaling, which stretches or squeezes the model, changes the angle and scale associated with the model, and generally does not select non-uniform scaling in order to maintain the realism of the model in the scene.
Also as shown in equation (2), the arbitrary vector (x, y, z) is scaled in space by (k)x,ky,kz) And (4) doubling.
Also as shown in equation (3), using rotation about axis X, Y, Z, a matrix of rotation along any one axis can be derived, for vector (x, y, z) about any direction vector (R)
x,R
y,R
z) Rotate
And (4) an angle.
As shown in fig. 6, an application scenario of the digital twin plant system rapid architecture method in the embodiment of the present invention is further described:
in order to verify the result, a batch circuit breaker manufacturing workshop is taken as an object, and the provided digital twin workshop rapid architecture method is verified and compared. The circuit breaker is commonly used in distribution and power distribution networks, is an electrical device for protecting the safety of terminal electricity utilization, and has a annual demand as high as billions.
The geometric structure of the miniature circuit breaker comprises a handle, a magnetic system and other parts, and takes a miniature circuit breaker manufacturing workshop with the daily output of more than 10 ten thousand poles as an example, the workshop system comprises 6 complete production lines, a single production line comprises 24 equipment sets, 144 manufacturing units in total, 4860 assembling actions and 4548 detecting actions are involved, the manufacturing process comprises 18 process flows of automatic assembly, multi-stage riveting, laser marking and the like, the number of twin workshop geometric models of corresponding numbers is up to 47415, and the twin workshop geometric models comprise 6.39 multiplied by 107A vertex sum of 6.71 x 107And each patch has a large demand on computing resources.
The circuit breaker digital twin workshop comprises a workshop storage model, a circuit breaker production line, corresponding production line equipment and other mapping models, geometric model data of the circuit breaker workshop is collected through an embedded data controller and the like, and geometric data modeling of the digital twin workshop is completed through a geometric modeling method. And analyzing the model of the breaker workshop according to the acquired model information, and calculating to realize the dynamic production logic of the production line through a state machine, collision detection and operation logic control codes, thereby realizing the three-dimensional reconstruction of the breaker digital twin workshop.
A twin workshop visualization platform is developed in a software development environment, and the content comprises a frequently displayed workshop operation condition interface and a popup window type unit operation condition interface. The workshop operation condition interface comprises the following production data: equipment operation state, planned assembly quantity, planned achievement rate, once-through rate, each unit OEE (equipment integrated efficiency), equipment energy consumption, system real-time and the like; the operation interface comprises the following data: unit name, equipment running state, yield, qualification rate, unqualified quantity, equipment comprehensive efficiency and the like. When a certain process of the physical workshop breaks down, the twin workshop immediately interrupts user operation through the sending and receiving of signals, the twin workshop automatically jumps to a fault unit, the fault unit stops the production process, and the true mapping with a workshop physical system is realized. When the signal is recovered to normal, the system stops warning and recovers to normal operation state synchronously with the physical breaker workshop.
In order to compare and verify the performance of the built digital twin workshop system, the invention verifies the proposed digital twin workshop rapid architecture method based on the Intel (R) core (TM) i7-10510U CPU @1.80GHz 2.30GHz hardware environment. Table 1 records the processing results of the units such as automatic pad printing, multi-stage riveting, automatic nail penetration, automatic detection, and laser marking, which are compared with the method based on the prior serial CPU computation and the method based on the parallel logic and model data computation proposed by the present invention under the above hardware conditions.
TABLE 1
Four indexes of Frame Per Second (FPS), Batches, CPU utilization rate and GPU utilization rate are respectively compared, the FPS is the frequency of updating pictures per second when a scene is drawn, the pictures are more smooth and vivid when the frame rate is higher, the frame rate is generally required to reach an interactive frame rate (30FPS), and human eyes cannot perceive the change of the frame rate when the frame rate reaches 75 FPS. The process of calling the graphics rendering API by the CPU is called Batch, and the drawing of each primitive needs to be called by a drawing function, so that the quantity of Batch is increased progressively, and the drawing efficiency is seriously influenced by a large amount of model drawing operations. As can be seen from table 1, CPU-based rendering has been difficult to meet the rendering requirements when rendering 10302 the number of models. However, in the framework method proposed herein, under more logic process conditions, the number of FPS is increased from 10.3 to 392 when the number of models reaches 40032, which is much higher than the frame rate perceived by human eyes, thereby improving the execution efficiency. In addition, because the CPU calling frequency pressure is released, the corresponding quantity of the latches is reduced from 4810 to 10, the use efficiency of the GPU is improved by the parallel framework method, the use efficiency is improved from 65% to 97%, and the calculation pressure of the CPU is greatly reduced.
In fig. 6, for comparison of the operation effect of the whole circuit breaker digital twin workshop, it can be seen from the comparison result that, due to the adoption of the parallel processing method, the GPU usage efficiency is improved, the calculation burden of the CPU is released, the capability of processing dynamic logic data is improved, the operation frame rate of the circuit breaker digital twin workshop is increased to 387fps which is far higher than the requirement of the interactive frame rate, the CPU utilization rate is decreased by 31%, the GPU utilization rate is increased by 21%, the batchs is decreased to 261 from the original 6898, and the optimization effect is obvious.
As shown in fig. 7, in an embodiment of the present invention, a digital twin workshop system fast configuration apparatus is provided, including:
the data modeling module is used for forming a process file with workshop production logic and manufacturing procedures according to the extracted dynamic process data of the manufacturing workshop and constructing a logic data model of the workshop; and acquiring geometric model data of the manufacturing workshop through an embedded data controller and the like to complete the geometric data modeling of the digital twin workshop.
The data transfer module transfers geometric model data, including vertex patches and other data, from a CPU memory to a pre-allocation cache region of the GPU based on a shader coding mode, and determines the size and the position of a rendered geometric model through matrix operation in the pre-allocation cache region of the GPU;
and the parallel computing module is used for sending a graphic rendering instruction to the GPU while the CPU computes the dynamic logic data, so that the GPU and the geometric model data of the pre-allocation cache area are interacted in multiple batches, and the vertex data and the rendering state of the geometric model data in the pre-allocation cache area are read in batches to finish the multiple-batch rendering of the model. Determining the size and the position of the rendered model of each batch through corresponding matrix operation;
the geometric model data of the manufacturing workshop is acquired by matching various tools such as an embedded data controller, a sensor network, a data acquisition card, an industrial camera and the like.
The dynamic process data of the workshop comprise workshop production logic, manufacturing process and the like. The geometric model data comprises the texture, position, size and other data of the workshop model. The embodiment of the invention has the following beneficial effects:
according to the method, the pre-allocation cache area is established in the GPU, geometric model data operation in the digital twin workshop is divided from the CPU, so that frequent interaction between the CPU and the GPU is converted into data communication between the GPU and the pre-allocation cache area, the computing resources of the CPU are saved, meanwhile, the CPU can intensively process logic data (namely dynamic logic data) in the digital twin workshop, parallel computing of the CPU and the GPU on the twin workshop data is realized, reasonable allocation of resources occupied by the geometric model data and the dynamic logic data is realized, parallel computing of the CPU and the GPU on the twin workshop data is realized, and the problem of twin system delayed mapping caused by large amount of system operation data of the digital twin workshop is solved.
It should be noted that, in the above system embodiment, each included unit is only divided according to functional logic, but is not limited to the above division as long as the corresponding function can be implemented; in addition, specific names of the functional units are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention.
It will be understood by those skilled in the art that all or part of the steps in the method for implementing the above embodiments may be implemented by relevant hardware instructed by a program, and the program may be stored in a computer-readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc.
While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not to be limited to the disclosed embodiment, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.