CN112486238B - Large-swing output voltage high-precision current source - Google Patents
Large-swing output voltage high-precision current source Download PDFInfo
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- CN112486238B CN112486238B CN202011504499.1A CN202011504499A CN112486238B CN 112486238 B CN112486238 B CN 112486238B CN 202011504499 A CN202011504499 A CN 202011504499A CN 112486238 B CN112486238 B CN 112486238B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Abstract
The invention discloses a large-swing output voltage high-precision current source, which comprises: the current mirror unit comprises a first MOS (metal oxide semiconductor) tube and a plurality of second MOS tubes which are arranged in a cascode mode; an input unit for providing an input currentI IN Comprises a third MOS tube connected with the first MOS tube, a resistor R and an input current source I IN (ii) a An output unit for providing an output current I OUT The fourth MOS tube is connected with the second MOS tube; a gain increasing unit for increasing the output impedance r of the current source out The current mirror unit comprises an operational amplifier connected with a current mirror unit, a third MOS tube and a fourth MOS tube. The current source can improve the output impedance of the current source, stabilize the output current of the current source, and has high output current precision and low change rate.
Description
Technical Field
The invention belongs to the technical field of current source design, and particularly relates to a large-swing output voltage high-precision current source.
Background
Referring to fig. 1, a cascode current source commonly used in the prior art is shown, which includes an input unit 10 ' and 3 groups of output units 20 ' arranged in parallel, wherein the input unit 10 ' includes a voltage source V connected to a power supply voltage DD And an input current source I between GND IN The resistor R and the MOS transistors M0 and MC0, 3 groups of output units 20' respectively comprise a resistor connected with a power voltage V DD MOS transistor M1 and MOS transistor MC1 connected to GND and connected to power supply voltage V DD MOS transistor M2 and MOS transistor MC2 connected to GND and connected to power supply voltage V DD And a MOS transistor M3 and a MOS transistor MC3 between GND. MOS transistor M0 and MOS transistor M1, MOS transistor M2 and MOS transistor M3 are arranged in a cascode mode and respectively form a current mirror, MOS transistor MC0 and MOS transistor MC1, MOS transistor MC2 and MOS transistor MC3 are arranged in a cascode mode, 2 MOS transistors in 3 groups of output units 20 'are respectively arranged in series, and the on or off of each group of output units 20' is controlled through switches S1, S2 and S3 respectively so as to support output currents I of different gears OUT 。
Cascode structure current source in prior art has higher input impedance r out If only switch S1 is turned on, the output impedance of the current source is: r is out ＝g mc1 *r mc1 *r m1 Wherein g is mc1 Is transconductance r of MOS transistor MC1 mc1 Is the output impedance of the MOS transistor MC1, r m1 Is the output impedance of the MOS transistor M1. At but at the output voltage V OUT When lifted too high (e.g. V) DD within-0.5V), a cascode tube (MOS tube M1) enters a linear region, and the output impedance r out Attenuation acceleration, output current I OUT The attenuation is accelerated, the change rate is higher than 0.1 percent, and the output voltage V of the current source is required under certain special application conditions OUT In the range of 0 to V DD within-0.4V, current I OUT Current rate of change of<0.1%, the traditional cascode structure current source can not meet the requirement.
Therefore, in order to solve the above technical problems, it is necessary to provide a high-swing output voltage high-precision current source.
Disclosure of Invention
The invention aims to provide a large-swing output voltage high-precision current source to improve the output impedance of the current source and stabilize the output current of the current source.
In order to achieve the above object, an embodiment of the present invention provides the following technical solutions:
a large-swing output voltage high accuracy current source, the current source comprising:
the current mirror unit comprises a first MOS (metal oxide semiconductor) tube and a plurality of second MOS tubes which are arranged in a cascode mode;
an input unit for providing an input current I IN Comprises a third MOS tube connected with the first MOS tube, a resistor R and an input current source I IN ；
An output unit for providing an output current I OUT The fourth MOS tube is connected with the second MOS tube;
a gain increasing unit for increasing the output impedance r of the current source out The current mirror unit comprises an operational amplifier connected with a current mirror unit, a third MOS tube and a fourth MOS tube.
In an embodiment, the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor are all PMOS transistors.
In one embodiment, in the current mirror unit, a gate of the first MOS transistor is connected to a gate of the second MOS transistor, and a source of the first MOS transistor and a source of the second MOS transistor are both connected to a power supply voltage V DD And the drain electrode of the first MOS tube is connected with the source electrode of the third MOS tube, and the drain electrode of the second MOS tube is connected with the source electrode of the fourth MOS tube.
In an embodiment, the current mirror unit further includes a plurality of switch control units for controlling the on or off state of the second MOS transistor.
In one embodiment, the switch control unit includes a first switch connected between the gate of the first MOS transistor and the gate of the second MOS transistor, and a power supply voltage V connected between the gate of the second MOS transistor and the gate of the second MOS transistor DD And the on/off states of the first switch and the second switch are opposite.
In one embodiment, the current mirror unit includes a plurality of second MOS transistors connected in parallel, and a plurality of switch control units, where each switch control unit is configured to control a conducting state or a closing state of a corresponding second MOS transistor.
In one embodiment, the operational amplifier has a first input terminal connected to the drain of the first MOS transistor, a second input terminal connected to the drain of the second MOS transistor, and is further configured to clamp a first voltage at the drain terminal of the first MOS transistor and a second voltage at the drain terminal of the second MOS transistor.
In one embodiment, the gate of the third MOS transistor, the second end of the resistor R, and the input current source I IN And the source electrode is connected with the drain electrode of the first MOS tube and the first input end of the operational amplifier, and the drain electrode is connected with the first end of the resistor R.
In an embodiment, the gate of the fourth MOS transistor is connected to the output terminal of the operational amplifier, the source is connected to the drain of the second MOS transistor and the second input terminal of the operational amplifier, and the drain is used as the output terminal of the current source.
In one embodiment, the operational amplifier comprises:
the gates of the PMOS transistor PM1 and the PMOS transistor PM2, the gates of the PM1 and the PM2 are connected, the sources of the PM1 and the PM2 are connected with a power supply, and the gate of the PM1 is connected with the drain of the PM 1;
the gates of the NMOS transistor NM1 and the NMOS transistors NM2, NM1 and NM2 are respectively a first input end and a second input end of the operational amplifier, the drain of NM1 is connected with the drain of PM1, the drain of NM2 is connected with the drain of PM2, the source of NM1 and the source of NM2 are respectively connected with the current source I SS Are connected.
Compared with the prior art, the invention has the following advantages:
the current source can improve the output impedance of the current source, stabilize the output current of the current source, and has high output current precision and low change rate;
the current source can support the output current of different gears, the output voltage swing is large, the MOS tube is combined through the design of the switch, the chip area is greatly reduced, the path loss in the circuit is reduced, and the output range of the output voltage is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a circuit diagram of a cascode-structured current source in the prior art;
FIG. 2 is a circuit diagram of a current source according to an embodiment of the present invention;
FIG. 3 is a circuit diagram of an operational amplifier according to an embodiment of the present invention.
Detailed Description
The present invention will be described in detail below with reference to embodiments shown in the drawings. The embodiments are not intended to limit the present invention, and structural, methodological, or functional changes made by those skilled in the art according to the embodiments are included in the scope of the present invention.
The invention discloses a large-swing output voltage high-precision current source, which comprises:
the current mirror unit comprises a first MOS (metal oxide semiconductor) tube and a plurality of second MOS tubes which are arranged in a cascode mode;
an input unit for providing an input current I IN Comprises a third MOS tube connected with the first MOS tube, a resistor R and an input current source I IN ；
An output unit for providing an output current I OUT The fourth MOS tube is connected with the second MOS tube;
a gain increasing unit for increasing the output impedance r of the current source out The current mirror unit comprises an operational amplifier connected with a current mirror unit, a third MOS tube and a fourth MOS tube.
The current mirror of the present invention is further described below with reference to specific embodiments.
Referring to fig. 2, in an embodiment of the present invention, a large swing output voltage high precision current source is disclosed, which includes:
the current mirror unit 10 comprises a first MOS transistor M0 and a plurality of second MOS transistors M1-M3, wherein the first MOS transistor M0 and the second MOS transistors M1-M3 are arranged in a cascode mode;
an input unit 20 for providing an input current I IN The circuit comprises a third MOS tube MC0 connected with the first MOS tube M0, a resistor R and an input current source I IN ；
An output unit 30 for providing an output current I OUT The MOS transistor comprises a fourth MOS transistor MC1 connected with the second MOS transistors M1-M3;
a gain increasing unit 40 for increasing the output impedance r of the current source out The current mirror unit comprises an operational amplifier OP connected with a current mirror unit, a third MOS tube and a fourth MOS tube.
The first MOS transistor M0, the second MOS transistors M1-M3, the third MOS transistor MC0 and the fourth MOS transistor MC1 are all PMOS transistors.
Specifically, in the current mirror unit, the gate of the first MOS transistor M0 is connected to the gates of the second MOS transistors M1 to M3, and the source of the first MOS transistor M0 and the sources of the second MOS transistors M1 to M3 are both connected to the power supply voltage V DD The drain of the first MOS transistor M0 is connected to the source of the third MOS transistor MC0, and the drains of the second MOS transistors M1 to M3 are connected to the source of the fourth MOS transistor MC 1.
In addition, the current mirror unit in this embodiment further includes a plurality of switch control units for controlling the on/off states of the second MOS transistors M1-M3.
Specifically, the switch control unit comprises first switches S1-S3 connected between the grid electrode of the first MOS tube and the grid electrode of the second MOS tube, and a power supply voltage V connected between the grid electrode of the second MOS tube and the grid electrode of the second MOS tube DD Second switch therebetween
And first switches S1-S3 and second switches
Are in opposite on/off states, e.g. first switch S1 and second switch
To control the switch control unit of the second MOS transistor M1, when the first switch S1 is in a conducting state, the corresponding second switch
In the off state.
In this embodiment, the first input terminal of the operational amplifier OP is connected to the drain of the first MOS transistor M0, the second input terminal is connected to the drains of the second MOS transistors M1 to M3, and the operational amplifier OP is further configured to clamp a first voltage V1 at the drain of the first MOS transistor M0 and a second voltage V2 at the drain of the second MOS transistors M1 to M3.
In addition, the gate of the third MOS transistor MC1, the second end of the resistor R, and the input current source I IN The source is connected with the drain of the first MOS transistor M0 and the first input terminal of the operational amplifier OP, and the drain is connected with the first terminal of the resistor R.
The grid electrode of the fourth MOS tube MC1 is connected with the output end of the operational amplifier OP, the source electrode is connected with the drain electrodes of the second MOS tubes M1-M3 and the second input end of the operational amplifier OP, and the drain electrode is used as the output end of the current source.
Fig. 3 is a circuit diagram of an operational amplifier according to an embodiment of the invention, which includes:
the gates of the PMOS transistor PM1 and the PMOS transistor PM2, the gates of the PM1 and the PM2 are connected, the sources of the PM1 and the PM2 are connected with a power supply, and the gate of the PM1 is connected with the drain of the PM 1;
the gates of the NMOS transistor NM1 and the NMOS transistors NM2, NM1 and NM2 are respectively a first input end V + and a second input end V-of the operational amplifier, the drain of the NM1 is connected with the drain of the PM1, the drain of the NM2 is connected with the drain of the PM2, the source of the NM1 and the source of the NM2 are respectively connected with the current source I SS Are connected.
In the embodiment, the cascode transistor in the current mirror unit is controlled by the single-stage operational amplifier OP, so that on one hand, the voltages of V1 and V2 can be clamped, the drain-source voltages Vds of the main mirror transistor (the first MOS transistor M0) and other mirror transistors (the second MOS transistors M1 to M3) are ensured to be consistent, and the influence of the communication modulation effect is reduced; in addition, the operational amplifier OP can provide a suitable Gain of Av (Av > 1), further increasing the output impedance r of the current source out 。
For example, when the switch S1 is turned on and the switches S2 and S3 are turned off, the output impedance is:
r out ＝g mc1 *r mc1 *r m1 *Av；
wherein, g mc1 Is transconductance r of MOS transistor MC1 mc1 Is the output impedance of the MOS transistor MC1, r m1 The output impedance of the MOS transistor M1 is Av, which is the gain of the operational amplifier OP.
After gain enhancement by the operational amplifier OP, when the cascode enters the linear region, r out The attenuation is not too fast, so that the output current I can be further stabilized OUT 。
Through the setting of switch control unit, can merge the MOS pipe among the prior art, only need a fourth MOS pipe MC1 to realize, reduced chip area greatly.
The current mirror unit is controlled by the switch, and is no longer placed in a current path, so that the path loss in the circuit can be reduced, and the output voltage V is increased OUT The output range of (1).
The current source in this embodiment supports output currents I of different gears OUT Precision up to 1%, output voltage V OUT The range of 0 to V DD -0.4V, output current I OUT Current rate of change of<0.1％
It should be understood that the embodiment is exemplified by 3 second MOS transistors M1-M3, and the on/off states of the respective MOS transistors are controlled by respective switch control units, so as to realize the output current I of different gears OUT In other embodiments, the number of the second MOS transistors is not required, and may be according to the gearIt is required to provide different numbers of second MOS transistors, and the description is not given here by way of example.
According to the technical scheme, the invention has the following beneficial effects:
the current source can improve the output impedance of the current source, stabilize the output current of the current source, and has high output current precision and low change rate;
the current source can support the output current of different gears, the output voltage swing is large, the MOS tube is combined through the design of the switch, the chip area is greatly reduced, the path loss in the circuit is reduced, and the output range of the output voltage is improved.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (8)
1. A large-swing output voltage high-precision current source, comprising:
the current mirror unit comprises a first MOS (metal oxide semiconductor) tube and a plurality of second MOS tubes which are arranged in a cascode mode;
an input unit for providing an input current I IN Comprises a third M connected with the first MOS tubeOS tube, resistor R and input current source I IN ；
An output unit for providing an output current I OUT The fourth MOS tube is connected with the second MOS tube;
a gain increasing unit for increasing the output impedance r of the current source out The operational amplifier is connected with the current mirror unit, the third MOS tube and the fourth MOS tube;
the current mirror unit also comprises a plurality of switch control units for controlling the on or off state of the second MOS tube;
the switch control unit comprises a first switch connected between the grid electrode of the first MOS tube and the grid electrode of the second MOS tube, and a second switch connected between the grid electrode of the second MOS tube and a power supply voltage V DD And the on/off states of the first switch and the second switch are opposite.
2. The large-swing output voltage high-precision current source according to claim 1, wherein the first MOS transistor, the second MOS transistor, the third MOS transistor and the fourth MOS transistor are PMOS transistors.
3. The large-swing output voltage high-precision current source according to claim 2, wherein in the current mirror unit, the gate of the first MOS transistor is connected to the gate of the second MOS transistor, and the source of the first MOS transistor and the source of the second MOS transistor are both connected to the supply voltage V DD And the drain electrode of the first MOS tube is connected with the source electrode of the third MOS tube, and the drain electrode of the second MOS tube is connected with the source electrode of the fourth MOS tube.
4. The large-swing output voltage high-precision current source according to claim 1, wherein the current mirror unit comprises a plurality of second MOS transistors connected in parallel, and a plurality of switch control units, each switch control unit is configured to control a conducting or a closing state of a corresponding second MOS transistor.
5. The large-swing output voltage high-precision current source according to claim 2, wherein the operational amplifier has a first input terminal connected to the drain of the first MOS transistor and a second input terminal connected to the drain of the second MOS transistor, and is further configured to clamp a first voltage at the drain terminal of the first MOS transistor and a second voltage at the drain terminal of the second MOS transistor.
6. The large-swing-output-voltage high-precision current source according to claim 5, wherein the gate of the third MOS transistor, the second terminal of the resistor R, and the input current source I IN And the source electrode is connected with the drain electrode of the first MOS tube and the first input end of the operational amplifier, and the drain electrode is connected with the first end of the resistor R.
7. The wide-swing output voltage high-precision current source according to claim 5, wherein the gate of the fourth MOS transistor is connected to the output terminal of the operational amplifier, the source is connected to the drain of the second MOS transistor and the second input terminal of the operational amplifier, and the drain is used as the output terminal of the current source.
8. The wide-swing output voltage high-precision current source according to claim 5, wherein the operational amplifier comprises:
the gates of the PMOS transistor PM1 and the PMOS transistor PM2, the gates of the PM1 and the PM2 are connected, the sources of the PM1 and the PM2 are connected with a power supply, and the gate of the PM1 is connected with the drain of the PM 1;
the gates of the NMOS transistor NM1 and the NMOS transistors NM2, NM1 and NM2 are respectively a first input end and a second input end of the operational amplifier, the drain of NM1 is connected with the drain of PM1, the drain of NM2 is connected with the drain of PM2, the source of NM1 and the source of NM2 are respectively connected with the current source I SS Are connected.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011504499.1A CN112486238B (en) | 2020-12-18 | 2020-12-18 | Large-swing output voltage high-precision current source |
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| CN202011504499.1A CN112486238B (en) | 2020-12-18 | 2020-12-18 | Large-swing output voltage high-precision current source |
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| CN112486238B true CN112486238B (en) | 2022-08-02 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP4104012B2 (en) * | 2005-03-10 | 2008-06-18 | 株式会社半導体理工学研究センター | Current mirror circuit |
| CN101498950A (en) * | 2008-12-25 | 2009-08-05 | 四川登巅微电子有限公司 | Current mirror circuit with feedback regulation and method thereof |
| CN101630175A (en) * | 2008-12-31 | 2010-01-20 | 曹先国 | Matching current mirror |
| CN102331809A (en) * | 2011-07-14 | 2012-01-25 | 复旦大学 | Current mirror circuit with grid leakage compensating function |
| CN109947172B (en) * | 2019-04-11 | 2024-01-26 | 苏州大学 | Mirror current source circuit with low voltage drop and high output resistance |
| TWI679842B (en) * | 2019-05-24 | 2019-12-11 | 盛群半導體股份有限公司 | Operational Amplifier |
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