CN112485697A - High-voltage power supply ripple measurement and analysis system based on phase-locked amplification algorithm - Google Patents

Abstract

The invention discloses a high-voltage power supply ripple measurement and analysis system based on a phase-locked amplification algorithm, comprising a high-voltage input circuit, a DC-blocking amplifier circuit, a filter gain compensation circuit, an analog-to-digital conversion circuit, and a digital signal processing circuit; the high-voltage input circuit The circuit is used to connect the signal of the high-voltage power supply to be tested and provide different loads for the high-voltage power supply; the DC isolation amplifier circuit is used to isolate the DC high voltage and amplify the AC ripple; the filter gain compensation circuit , used to limit the frequency band of the analog ripple signal collected by the amplified AC ripple; the analog-to-digital conversion circuit is used to convert the analog ripple signal collected by the filter gain compensation circuit into a digital signal; the The digital signal processing circuit adopts the lock-in amplification algorithm to collect and process the obtained digital signal. The invention can accurately analyze the ripple condition of the precision high-voltage voltage source, and provides a measurement basis for the design and improvement of the precise high-voltage voltage source.

Description

A High Voltage Power Supply Ripple Measurement and Analysis System Based on Lock-in Amplification Algorithm

technical field

The invention relates to the technical field of precision power supply testing, and more particularly, to a high-voltage power supply ripple measurement and analysis system based on a phase-locked amplification algorithm.

Background technique

The power supply is a very important part in the electronic system. For precision electronic systems, the ripple of the power supply must be controlled within the range that does not affect the normal operation of the circuit. Therefore, when designing the power supply, we need to accurately measure its ripple. and evaluation.

The main sources of power supply ripple mainly include the following: First, the periodic switching noise generated by the switching tube switching that may exist in the power supply. The charging and discharging of the capacitor and inductance under the action of the switching tube will produce periodic output voltage fluctuations. ; The second is the power frequency noise that may be introduced by the front stage, which is due to the noise that may be introduced by the high-intensity power frequency electromagnetic field in the room, or it may directly enter the circuit of the latter stage through the rectifier circuit of the previous stage; The third is the voltage and current feedback The loop may introduce ripple at a specific frequency, which is related to the response speed of the feedback loop, and the frequency is not too high.

To summarize the above-mentioned main switching power supply ripple generation mechanisms, we need to limit the measurement bandwidth to low frequency -20MHz through analog filtering and digital filtering for the ripple measurement system. When it is possible to restore the information of the ripple, the interference of the electromagnetic noise emitted in the space to the measurement system is reduced, so as to restore the ripple of the power supply as accurately as possible.

In the design of precision high-voltage power supplies, the requirements for ripple are higher. At a relatively high operating voltage, the ripple should be much smaller than that of a traditional power supply (the peak-to-peak value of the ripple is less than or equal to 1mV), for such high-voltage and high-precision switching power supplies. For example, Chinese Patent Publication No.: CN 108549039 A, publication date: 2018.09.18, discloses a switching power supply ripple measurement circuit, the invention relates to a switching power supply ripple measurement circuit, which uses a high-speed comparator and a high-precision DAC to achieve In order to achieve high-precision ripple measurement under high frequency conditions, the controller determines the relationship between the output value of the DAC and the peak or valley value of the ripple signal by detecting the presence and width of the output pulse signal from the high-speed comparator, and adjusts the DAC output value accordingly. Output, when the controller just cannot detect the pulse signal of the comparator, the peak or valley value of the ripple signal is obtained, and the ripple voltage value is obtained by subtracting the two.

Traditional detection methods are difficult to meet the measurement requirements of ripple, and the waveform characteristics of ripple can reflect the shortcomings in power supply design to a certain extent. Therefore, a system for measuring and analyzing high-voltage and low-amplitude ripple is constructed. , to a large extent, it can guide the improvement direction of precision power supply design in the opposite direction.

SUMMARY OF THE INVENTION

In order to solve the problem that the traditional detection method is difficult to meet the measurement requirements of the ripple, the present invention provides a high-voltage power supply ripple measurement and analysis system based on the lock-in amplification algorithm, which can accurately measure the ripple of the precision high-voltage voltage source. Analysis, so as to provide measurement basis for the design and improvement of precision high voltage voltage source.

In order to achieve the above purpose of the present invention, the technical scheme adopted is as follows: a high-voltage power supply ripple measurement and analysis system based on a phase-locked amplification algorithm, the high-voltage power supply ripple analysis system includes a high-voltage input circuit, a DC-blocking amplifier circuit, and a filter gain. Compensation circuit, analog-to-digital conversion circuit, digital signal processing circuit; wherein,

The high-voltage input circuit is used to connect the signal of the high-voltage power supply to be measured, and provide different loads for the high-voltage power supply, so as to realize the measurement of the ripple characteristics under different loads;

The DC blocking amplifying circuit is used to isolate the DC high voltage and amplify the AC ripple;

The filter gain compensation circuit is used to limit the frequency band of the analog ripple signal obtained by the amplified AC ripple collection;

The analog-to-digital conversion circuit is used to convert the analog ripple signal collected by the filter gain compensation circuit into a digital signal;

The digital signal processing circuit adopts a phase-locked amplification algorithm to collect and process the obtained digital signal, and further limits the frequency band of the collected digital signal.

Preferably, the high-voltage power supply ripple analysis system further includes a host computer ripple analysis device, and the host computer ripple analysis device further analyzes the results processed by the digital signal processing circuit; and displays the waveform of the collected ripple signal .

Further, the high-voltage input circuit includes a high-voltage input connector with protection, and an adjustable load circuit formed by connecting multiple switches and power resistors in series;

After the high-voltage input connector with protection is connected to the high-voltage power supply, the DC-blocking amplifier circuit is input through the adjustable load circuit, and the ripple characteristics under different loads are measured by gating the multi-way switch.

Still further, the multi-way switch adopts several single-pole double-throw relays in series to realize multi-way selection.

Still further, the DC blocking amplifier circuit includes a second-order high-pass filter circuit for filtering out high-voltage DC signals, an operational amplifier A1 for amplifying the AC ripple, and a single-pole double-throw relay for preventing over-surfing from damaging the operational amplifier. , grounding resistance, first proportional amplification resistance, second proportional amplification resistance;

The input end of the second-order high-pass filter circuit is connected to the output end of the high-voltage input circuit; the output end of the second-order high-pass filter circuit is connected to a gate end of the SPDT relay;

The other end of the single-pole double-throw relay is grounded through a grounding resistor;

The center port of the SPDT relay is connected to the positive input end of the operational amplifier A1;

The first proportional amplifying resistor and the second proportional amplifying resistor are sequentially connected in series to the output end of the operational amplifier A1;

The negative input terminal of the operational amplifier A1 is connected between the first proportional amplification resistor and the second proportional amplification resistor;

The output end of the operational amplifier A1 transmits the amplified AC ripple signal to the filter gain compensation circuit.

Still further, the filter gain compensation circuit includes an active high-pass filter circuit and a passive low-pass filter circuit in series; the output end of the operational amplifier A1 is connected to the input end of the active high-pass filter circuit; the The output end of the passive low-pass filter circuit is connected with the input end of the analog-to-digital conversion circuit.

Still further, the described active high-pass filter circuit adopts the 10th-order Butterworth filter, and the described 10th-order Butterworth filter adopts the 5-stage Sallen-Key circuit structure, and the Sallen-Key circuit structure described in each stage is Including an independent gain compensation circuit to ensure that the amplitude ratio of the output analog signal to the input analog signal is 10:1.

Still further, the Sallen-Key circuit structure includes a capacitor, a positive feedback resistor, a grounding resistor, an amplifier, and a resistor;

One end of the capacitor is connected to the output end of the operational amplifier A1; the other end of the capacitor is connected to the positive input end of the capacitor and the amplifier in turn;

One end of the positive feedback resistor is connected between the capacitor and the capacitor; the other end of the positive feedback resistor is connected to the output end of the amplifier;

One end of the grounding resistance is connected between the capacitor and the positive input end of the amplifier;

The output end of the amplifier is connected with the output end of the Sallen-Key circuit structure of the next stage; at the same time, the output end of the amplifier is grounded through the resistance and the resistance in turn;

The negative input end of the amplifier is connected between the resistor and the resistor.

Still further, the passive low-pass filter circuit adopts a 14th-order ellipse filter, and the characteristic impedance of the passive low-pass filter circuit is 50Ω.

Still further, the analog-to-digital conversion circuit includes an impedance matching network, a fully differential operational amplifier, a feedback resistor, a filter network, a reference voltage source, and an analog-to-digital converter;

The positive input end of the fully differential operational amplifier is sequentially connected with the impedance matching network and the output end of the passive low-pass filter circuit;

The negative input end of the fully differential operational amplifier is grounded through an impedance matching network;

The negative output end and the positive output end of the fully differential operational amplifier are connected to the analog-to-digital converter through a filter network;

One end of the feedback resistor is connected to the positive input end of the fully differential operational amplifier, and the other end of the feedback resistor is connected to the negative output end of the fully differential operational amplifier;

One end of the feedback resistor is connected to the negative input end of the fully differential operational amplifier, and the other end of the feedback resistor is connected to the positive output end of the fully differential operational amplifier;

The reference voltage source is input to the analog-to-digital converter.

Still further, the digital signal processing circuit includes a main control chip and a storage unit;

The main control chip reads the sampling data of the analog-to-digital converter through 16-bit parallel differential LVDS; the main control chip reads and writes the control word of the analog-to-digital converter using the SPI interface protocol for transmission; The control chip has a built-in lock-in amplification algorithm for analyzing the ripple frequency domain characteristics, and realizes the processing of the received data;

The storage unit is used to store the data uploaded by the analog-to-digital converter and the data processed by the main control chip.

The beneficial effects of the present invention are as follows:

The principle of the present invention is to process the high-voltage power supply signal through a DC-blocking amplifier circuit and a filter gain compensation circuit, and use a high-speed and high-resolution analog-to-digital conversion circuit and a built-in digital signal processing circuit with a phase-locked amplification algorithm. The wave can be collected and analyzed, and the spectral amplitude information of the ripple can be accurately analyzed. The invention can realize the measurement and analysis of the tiny ripple in the precision power supply with higher direct current voltage, and is suitable for the ripple detection scene of the precision high-voltage power supply. At the same time, the present invention can realize testing the ripple characteristics of the high-voltage power supply under different load conditions.

Description of drawings

FIG. 1 is a principle block diagram of the high-voltage power supply ripple analysis system described in this embodiment.

FIG. 2 is a circuit connection diagram of the high-voltage input circuit according to this embodiment.

FIG. 3 is a circuit connection diagram of the DC blocking amplifier circuit described in this embodiment.

FIG. 4 is a circuit connection diagram of the active high-pass filter circuit according to this embodiment.

FIG. 5 is a circuit connection diagram of the passive low-pass filter circuit described in this embodiment.

FIG. 6 is a circuit connection diagram of the digital-to-analog conversion circuit described in this embodiment.

FIG. 7 is a circuit connection diagram of the digital processing circuit according to this embodiment.

FIG. 8 is a schematic diagram of the principle of the lock-in amplification algorithm described in this embodiment.

Detailed ways

The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

Example 1

As shown in Figure 1, a high-voltage power supply ripple measurement and analysis system based on a lock-in amplification algorithm, the high-voltage power supply ripple analysis system includes a high-voltage input circuit, a DC-blocking amplifier circuit, a filter gain compensation circuit, and an analog-to-digital conversion circuit. , digital signal processing circuit; among them,

The high-voltage input circuit is used to connect the signal of the high-voltage power supply to be measured, and provide different loads for the high-voltage power supply, so as to realize the measurement of the ripple characteristics under different loads;

The DC blocking amplifying circuit is used to isolate the DC high voltage and amplify the AC ripple;

The filter gain compensation circuit is used to limit the frequency band of the analog ripple signal obtained by the amplified AC ripple collection;

The analog-to-digital conversion circuit is used to convert the analog ripple signal collected by the filter gain compensation circuit into a digital signal;

The digital signal processing circuit adopts a phase-locked amplification algorithm to collect and process the obtained digital signal, and further limits the frequency band of the collected digital signal.

In a specific embodiment, the high-voltage power supply ripple analysis system further includes a host computer ripple analysis device, and the host computer ripple analysis device further analyzes the processing results of the digital signal processing circuit; and displays the collected data. The waveform of the ripple signal.

In a specific embodiment, as shown in the circuit structure in FIG. 2 , the high-voltage input circuit includes a high-voltage input connector with protection, and an adjustable load circuit formed by connecting multiple switches and power resistors in series; the The protected high-voltage input connector 202 includes one of several types of triaxial interfaces with the outer casing connected to the protective ground, and a dual coaxial interface with the outer casing connected to the protective ground. The protected high-voltage input connector 202 connects the high-voltage power supply signal 201 to be measured into the high-voltage power supply ripple analysis system. After the high-voltage power supply to be measured enters the high-voltage power supply ripple analysis system, an adjustable load circuit 203 is formed by connecting a multi-channel switch and a power resistor in series. This embodiment can test the ripple characteristics of the high-voltage power supply under different load conditions. In a specific embodiment, the gating of the multiplexer is controlled by a digital signal processing circuit. The withstand voltage of the dual coaxial interface described in this embodiment is usually about 1500V, and the multi-way switch should select single-pole double-throw relays in series to realize the function of multi-way selection. To meet the requirements of high voltage input withstand voltage, two-stage SPDT switches can be connected in series to realize a four-way multiplexer switch, and the withstand voltage value is 600V×2=1200V. In the multi-way switch, the highest resistance value should be selected during power-on to prevent overload damage to the power supply to be tested during power-on.

In a specific embodiment, as shown in FIG. 3 , the DC-blocking amplifier circuit includes a second-order high-pass filter circuit composed of a second-order RC circuit, an operational amplifier A1 for amplifying the AC ripple, and preventing over-surfing surges. The SPDT relay 308, the grounding resistor 305, the first proportional amplifying resistor 306, and the second proportional amplifying resistor 307 that damage the operational amplifier; the function of the second-order high-pass filter circuit is to filter out the high-voltage DC signal. The characteristic is that the admitted signal bandwidth is limited to 10Hz-20MHz, and the -3dB frequency point of the second-order high-pass filter circuit in the DC-blocking amplifier circuit will be set to 10Hz.

The input end of the second-order high-pass filter circuit is connected to the output end of the high-voltage input circuit; the output end of the second-order high-pass filter circuit is connected to a gate end of the SPDT relay 308;

The other end gating end of the SPDT relay 308 is grounded through the grounding resistor 305;

The central port of the SPDT relay 308 is connected to the positive input end of the operational amplifier A1;

The first proportional amplifying resistor 306 and the second proportional amplifying resistor 307 are sequentially connected in series to the output end of the operational amplifier A1;

The negative input terminal of the operational amplifier A1 is connected between the first proportional amplifying resistor 306 and the second proportional amplifying resistor 307;

The output end of the operational amplifier A1 transmits the amplified AC ripple signal to the filter gain compensation circuit.

When the single-pole double-throw relay 308 is input with an external high voltage, one end of the grounding resistor 305 should be gated in order to prevent over-surfing from damaging the operational amplifier 309 . The withstand voltage of the single-pole double-throw relay 308 should be greater than the maximum value of the input voltage. When the surge is stabilized when the power is turned on, the port of the second-order high-pass filter circuit should be connected to the positive input of the operational amplifier 309. For this reason, the first-order high-pass filter circuit should be connected to the positive input terminal of the operational amplifier 309 about 0.5-1s after power-on. The first proportional amplifying resistor 306 and the second proportional amplifying resistor 307 will determine the amplification factor of the isolation amplifying circuit. The resistance value of the first proportional amplifying resistor 306 is R1, and the resistance value of the second proportional amplifying resistor 307 is R2, so the amplification factor is:

The operational amplifier 309 selected in the DC-blocking amplifier circuit should be an operational amplifier with low voltage noise, and the magnification should be as large as possible within the range allowed by the bandwidth. The selection of the operational amplifier 309 should focus on referring to the parameter of the gain-bandwidth product. , in this embodiment, the signal within 20M needs to be amplified by 100 times, so the gain-bandwidth product needs to reach at least 2GHz. The ultra-low distortion high-speed operational amplifier AD8099 from ADI can be used, and its gain-bandwidth product can reach 3.8GHz, 20MHz gain About 45dB, slightly more than 100 times, to meet the design requirements. The signal amplified by the DC blocking amplifying circuit will enter the post-stage filtering gain compensation circuit to limit the signal bandwidth more accurately. As shown in Figure 3, the parameters of the two-stage RC filter in the second-order high-pass filter circuit are: capacitor 301 is 15.7uF, resistor 302 is 1kΩ, capacitor 303 is 15.7uF, and resistor 304 is 1kΩ.

In a specific embodiment, as shown in FIG. 4 and FIG. 5 , in this embodiment, a filter gain compensation circuit of 10Hz-20MHz needs to be constructed, because factors such as the complexity of the hardware structure and the characteristics of the filter are considered. The filter gain compensation circuit includes an active high-pass filter circuit and a passive low-pass filter circuit in series; the output end of the operational amplifier A1 is connected to the input end of the active high-pass filter circuit; the passive low-pass filter circuit is connected in series. The output end of the pass filter circuit is connected with the input end of the analog-to-digital conversion circuit.

As shown in Figure 4, the active high-pass filter circuit will use a 10th-order Butterworth filter. The 10th-order Butterworth filter is characterized by a small passband ripple, and at the same time, its steep drop is 6dB Therefore, when the frequency point of -3dB in the passband is set to 10Hz, and the frequency point of -60dB in the stopband is set to 5Hz, it is easy to estimate that the filter order is 10th order. The 10th-order Butterworth filter will use a five-stage Sallen-Key circuit structure, and each stage of the Sallen-Key circuit structure includes an independent gain compensation circuit to compensate for the influence of the unideal device on the filtered waveform, Ensure that the amplitude ratio of the output analog signal to the input analog signal is 10:1.

In a specific embodiment, taking the first stage as an example, as shown in FIG. 4 , the Sallen-Key circuit structure includes a capacitor 401 , a capacitor 403 , a positive feedback resistor 402 , a grounding resistor 404 , an amplifier 405 , and a resistor 406 , resistor 407;

One end of the capacitor 401 is connected to the output end of the operational amplifier A1; the other end of the capacitor 401 is connected to the positive input end of the capacitor 403 and the amplifier 405 in turn;

One end of the positive feedback resistor 402 is connected between the capacitor 401 and the capacitor 403; the other end of the positive feedback resistor 402 is connected to the output end of the amplifier 405;

One end of the grounding resistor 404 is connected between the capacitor 403 and the positive input end of the amplifier 405;

The output end of the amplifier 405 is connected with the output end of the Sallen-Key circuit structure of the next stage; at the same time, the output end of the amplifier 405 is grounded through the resistor 406 and the resistor 407 in turn;

The negative input terminal of the amplifier 405 is connected between the resistor 406 and the resistor 407 .

In addition, the resistor 406 and the resistor 407 are the proportional amplification resistors of the operational amplifier, which determine the amplification factor of the operational amplifier 405. For example, the structure of the first-stage Sallen-Key active high-pass filter has a total of five stages, and its circuit structure is exactly the same. But the selected device parameters are different. Preferably, the ideal parameters of the device selected in the active high-pass filter circuit are shown in Table 1, and should be adjusted according to the actual situation of the waveform in use:

Table 1 Parameter table of active high-pass filter circuit

In a specific embodiment, the passive low-pass filter circuit uses a 14th-order elliptic filter, the passband -3dB frequency is set to 20MHz, and the stopband -60dB frequency is set to 20.5MHz. Due to Butterworth filtering The steep drop of the filter is small, and the set attenuation index cannot be achieved with a small number of orders, so the elliptic filter, the filter with the largest steep drop, is finally used to realize the structure of the low-pass filter. Among them, the structure of the whole circuit can be regarded as a multi-stage passive device filtering network in which the parallel structure of the inductor and the capacitor and the capacitor are connected in series, as shown in the structure of FIG. 5 . The resistor 501 is an impedance matching resistor, the characteristic impedance of the passive low-pass filter circuit is 50 Ω, and the high-speed high-resolution analog-to-digital conversion circuit of the latter stage also needs an impedance matching network to match the output impedance of 50 Ω, reducing the output impedance of 50 Ω. reflections of small signals. The parameters of the 14th-order ellipse filter are shown in Table 2:

Table 2 Parameter table of 14th order elliptic filter circuit

label Device Type parameter or model 501 resistance 50Ω 502 inductance 312.2nH 503 capacitance 169.9pF 504 inductance 399.5nH 505 capacitance 94.18pF 506 capacitance 127.4pF 507 inductance 212.2nH 508 capacitance 267.9pF 509 capacitance 71.77pF 510 inductance 134nH 511 capacitance 453.4pF 512 capacitance 61.15pF 513 inductance 158.3nH 514 capacitance 377.1pF 515 capacitance 95.54pF 516 inductance 291.1nH 517 capacitance 173.1pF 518 capacitance 169.7pF 519 inductance 458.7nH 520 capacitance 38.95pF 521 capacitance 90.91pF

In a specific embodiment, as shown in FIG. 6 , the bandwidth of the ripple signal measured in this embodiment is designed to be 10Hz-20MHz. In order to fully ensure the authenticity of the restored signal content, the signal at the highest frequency is required, 10 points must be collected in one cycle, that is, the sampling rate f _S = 20MHz*10 = 200MSPS, the high-speed and high-precision analog-to-digital converter 607 in Figure 6, according to the calculation results, can use ADI's integrated high-speed high-speed Precision pipeline analog-to-digital converter LTC2107, the precision of the analog-to-digital converter 607 is 16bit, and the sampling speed is the pre-stage of the analog-to-digital converter 607, which requires a high-precision single-ended to differential structure. The end-to-ground waveform is converted into a differential input, and its core structure is a fully differential operational amplifier 605. According to the required signal bandwidth of 20MHz, the fully differential operational amplifier 605 will use the ADA4945-1 of Analog Devices, whose -3dB bandwidth is 60MHz, It can be used normally if it is greater than the set signal frequency upper limit of 20MHz.

The analog-to-digital conversion circuit described in this embodiment includes an impedance matching network 601 , an impedance matching network 602 , a fully differential operational amplifier 605 , a feedback resistor 603 , a feedback resistor 604 , a filter network 606 , a reference voltage source 608 , and an analog-to-digital converter 607 ;

The positive input terminal of the fully differential operational amplifier 605 is sequentially connected to the impedance matching network 601 and the output terminal of the passive low-pass filter circuit;

The negative input terminal of the fully differential operational amplifier 605 is grounded through the impedance matching network 602;

The negative output terminal and the positive output terminal of the fully differential operational amplifier 605 are connected to the analog-to-digital converter 607 through the filter network 606;

One end of the feedback resistor 603 is connected to the positive input end of the fully differential operational amplifier 605, and the other end of the feedback resistor 603 is connected to the negative output end of the fully differential operational amplifier 605;

One end of the feedback resistor 604 is connected to the negative input end of the fully differential operational amplifier 605, and the other end of the feedback resistor 604 is connected to the positive output end of the fully differential operational amplifier 605;

The reference voltage source 608 is input to the analog-to-digital converter 607 .

The functions of the feedback resistor 603 and the feedback resistor 604 are to match the amplification factor of the differential transmission, and the matching amplification factor is 2 according to the input impedance. The filtering network 606 is a low-pass filter composed of resistors and capacitors, and its function is to limit the bandwidth of the input signal, and its bandwidth is limited to 20MHz. The reference voltage source 608 is required to be a reference voltage source with low temperature drift. In order to limit its noise, a filter network can be connected before it is input to the analog-to-digital converter, which is beneficial to further reduce the noise of the reference voltage source.

In a specific embodiment, the digital signal processing circuit includes a main control chip and a storage unit; the main control chip has a built-in lock-in amplification algorithm for analyzing the ripple frequency domain characteristics, so as to realize the processing of the received data. processing; as shown in the circuit structure in Figure 7, the main control chip used in the digital signal processing circuit of this embodiment is a high-end FPGA chip, and the FPGA chip is very suitable for high-speed digital due to its rich interface and hardware resources and easy implementation of parallel instructions. Signal reading and writing and processing. This embodiment adopts the ZYNQ-7000 series FPGA chip, which contains a hardware processing structure in which the FPGA and the ARM cooperate. According to the selection of the analog-to-digital converter of the previous stage, the sampling data of the analog-to-digital converter 607 and the main control chip will be realized by 16-bit parallel differential LVDS, and the control word of the main control chip to read and write the analog-to-digital converter will use SPI interface protocol. The storage unit is used to store the data uploaded by the analog-to-digital converter and the data processed by the main control chip. After the data enters the storage unit in the FPGA chip, the data is stored in two pieces of 1GB, 1033MHz DDR3 memory 704. However, after the upper computer ripple analysis device communicates with the main control chip 702, the data stored in DDR3 will be sent to the upper computer ripple analysis device through the high-speed bus.

The power supply and clock of the high-voltage power supply ripple analysis system described in this embodiment are provided by a special circuit 703. For the power supply, it is required to meet the current requirement under the highest computing power of the chip, and the power supply ripple is required to not affect the normal operation of the digital circuit. Function. For the clock circuit, the parameters such as clock jitter and skew are required to be as small as possible. A temperature-compensated crystal oscillator can be used as an external clock source, and the frequency is multiplied by the internal phase-locked loop of the FPGA and distributed to the high-voltage power supply ripple analysis system.

In a specific embodiment, as shown in FIG. 8 , the most important digital algorithm for ripple characteristic analysis in this embodiment is the lock-in amplification algorithm, and its mathematical principle is the product sum difference formula of trigonometric functions, namely:

The principle of the lock-in amplification algorithm is to multiply the digital signal of the high-voltage power supply signal to be measured with the digital sine signal and digital cosine signal of the set reference voltage source, assuming that the signal to be measured has the following signals at the reference frequency. Quantity:

S(t)=A _i sin(ωt+φ)

Among them, ω is the signal component of the same frequency as the reference signal in the signal to be tested, φ is the phase difference between the signal and the reference signal, A _i is the amplitude of the signal of the same frequency as the reference signal in the signal to be tested. The digital sine signal and reference cosine signal of the voltage source are as follows:

S_REF_0=A _r cos(ωt)

S_REF_1=A _r sin(ωt)

According to the product sum-difference formula deduced above, when the signal to be tested is multiplied by the reference signal, the following formula can be obtained. In Figure 8, 802 and 805 are digital multipliers, which can multiply the digital sinusoidal signal by the signal to be tested:

In the formula, the signal containing 2ωt is a high-frequency signal, which can be filtered out by a digital low-pass filter 803 and 806. The filtered signals are assumed to be S_OUT_0 and S_OUT_1, which are respectively equal to:

Then the filtered signal only contains the values related to the amplitude and phase, and the amplitude and phase information of the signal to be measured can be known by using the calculation formula of the sum of squares and the arc tangent:

In the measurement process, the frequency sweeping method of the reference signal can be used to solve the amplitude of different frequency points in the ripple signal, so as to realize the accurate analysis of the frequency domain information of the ripple signal. At the same time, this method can greatly improve the accuracy of the measurement. Because the correlation between signals of other frequencies and the reference signal is extremely weak except for the same frequency signal, we need to introduce the concept of cross-correlation function R ₁₂ , and the definition of R ₁₂ is:

Assuming that the reference signal and the sinusoidal signal to be measured are not of the same frequency, the reference signal and the sinusoidal signal to be measured are respectively:

S _i (t)=A _i sin(ω ₁ t+φ ₁ )

S _r (t)=A _r sin(ω ₂ t+φ ₂ )

Combining the above two sets of formulas can get:

It can be seen from the above formula that when ω ₁ =ω ₂ , the limit of the integral value of the above formula is not 0. Substitute the principle of the lock-in amplification algorithm before, and calculate the accumulation of values within a period of time. Its essence is a low-pass filter. Therefore, when the reference signal and the sinusoidal signal to be measured have the same frequency, the correlation is the highest, and the correlation coefficient is not 0. , so that the product of the signal to be measured and the reference signal is summed for a period of time, the information of other frequency bands can be filtered out, and only the amplitude and phase information of the frequency point that needs to be measured are retained. The above is the core content of the lock-in amplification algorithm.

After the digital signal processing circuit has collected the digital signal output by the analog-to-digital conversion structure, it needs to timely transmit the sampled signal to the upper computer ripple analysis device 705 according to the instruction of the upper computer ripple analysis device, and perform further mathematical statistical processing. At the same time, due to the huge amount of data transmitted in a short period of time, the communication between the main control chip and the upper computer ripple analysis device needs to use high-speed communication protocols such as PCIe, Ethernet, and USB. The host computer ripple analysis device in this embodiment needs to be able to display and make statistics on the transmitted signal in real time, and the statistics include parameters such as the maximum and minimum values of ripple (peak-to-peak value), RMS ripple, and ripple frequency within a period of time. At the same time, the host computer ripple analysis device can call the phase-lock amplification algorithm of the hardware circuit main control chip to calculate the ripple spectrum information in real time, and the host computer ripple analysis device can also display the waveform of the collected ripple signal.

According to the above high-voltage power supply ripple analysis system, the total amplification factor is 2000 times. If the amplitude of the input ripple signal is assumed to be 1mV, the final ripple signal entering the analog-to-digital converter is about 2V. The SNR is about 80dB, then its ENOB=(80-1.76)/6.02≈13bit, then the AD resolution is 2.5V/2^13≈305uV, which is equivalent to the real resolution of the ripple is 305uV/2000≈152.6nV . The above resolution can better present the waveform of 10uV-1mV ripple.

Obviously, the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, rather than limiting the embodiments of the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the claims of the present invention.

Claims (11)

1. The utility model provides a high voltage power supply ripple measures analytic system based on lock-in amplification algorithm which characterized in that: the high-voltage power supply ripple analysis system comprises a high-voltage input circuit, a blocking amplification circuit, a filtering gain compensation circuit, an analog-to-digital conversion circuit and a digital signal processing circuit; wherein,

the high-voltage input circuit is used for accessing a signal of a high-voltage power supply to be tested and providing different loads for the high-voltage power supply so as to realize ripple characteristic measurement under different loads;

the DC blocking amplifying circuit is used for isolating DC high voltage and amplifying AC ripples;

the filter gain compensation circuit is used for carrying out frequency band limitation on an analog ripple signal acquired by the amplified alternating current ripple;

the analog-to-digital conversion circuit is used for converting the analog ripple wave signal collected by the filter gain compensation circuit into a digital signal;

the digital signal processing circuit collects and processes the obtained digital signal by adopting a phase-locked amplification algorithm and further limits the frequency band of the collected digital signal.

2. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 1, wherein: the high-voltage power supply ripple analysis system also comprises an upper computer ripple analysis device, and the upper computer ripple analysis device further analyzes the result processed by the digital signal processing circuit; and displaying the waveform of the collected ripple signal.

3. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 2, wherein: the high-voltage input circuit comprises a high-voltage input joint with protection and an adjustable load circuit formed by connecting a multi-way switch and a power resistor in series;

after the high-voltage input joint with the protection is connected with a high-voltage power supply, the high-voltage input joint is input into the blocking amplification circuit through the adjustable load circuit, and the ripple characteristics under different loads are measured through gating the multi-way switch.

4. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 3, wherein: the multi-way switch realizes multi-way selection by connecting a plurality of single-pole double-throw relays in series.

5. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 4, wherein: the blocking amplification circuit comprises a second-order high-pass filter circuit for filtering high-voltage direct-current signals, an operational amplifier A1 for amplifying alternating-current ripples, a single-pole double-throw relay for preventing overshoot surge from damaging the operational amplifier, a ground resistor (305), a first proportional amplification resistor (306) and a second proportional amplification resistor (307);

the input end of the second-order high-pass filter circuit is connected to the output end of the high-voltage input circuit; the output end of the second-order high-pass filter circuit is connected with one gating end of the single-pole double-throw relay;

the gating end at the other end of the single-pole double-throw relay is grounded through a grounding resistor (305);

the central port of the single-pole double-throw relay is connected with the positive input end of an operational amplifier A1;

the first proportional amplifying resistor (306) and the second proportional amplifying resistor (307) are sequentially connected in series to the output end of the operational amplifier A1;

the negative input end of the operational amplifier A1 is connected between the first proportional amplifying resistor (306) and the second proportional amplifying resistor (307);

the output end of the operational amplifier A1 transmits the amplified AC ripple signal to the filter gain compensation circuit.

6. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 5, wherein: the filter gain compensation circuit comprises an active high-pass filter circuit and a passive low-pass filter circuit which are sequentially connected in series; the output end of the operational amplifier A1 is connected with the input end of the active high-pass filter circuit; the output end of the passive low-pass filter circuit is connected with the input end of the analog-to-digital conversion circuit.

7. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 6, wherein: the active high-pass filter circuit adopts a 10-order Butterworth filter, the 10-order Butterworth filter adopts a 5-level Sallen-Key circuit structure, each level of Sallen-Key circuit structure comprises an independent gain compensation circuit, and the amplitude ratio of an output analog signal to an input analog signal is guaranteed to be 10: 1.

8. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 7, wherein: the Sallen-Key circuit structure comprises capacitors (401, 403), a positive feedback resistor (402), a grounding resistor (404), an amplifier (405) and resistors (406, 407);

one end of the capacitor (401) is connected with the output end of the operational amplifier A1; the other end of the capacitor (401) is sequentially connected with the positive input end of the capacitor (403) and the positive input end of the amplifier (405);

one end of the positive feedback resistor (402) is connected between the capacitor (401) and the capacitor (403); the other end of the positive feedback resistor (402) is connected with the output end of the amplifier (405);

one end of the grounding resistor (404) is connected between the capacitor (403) and the positive input end of the amplifier (405);

the output end of the amplifier (405) is connected with the output end of the Sallen-Key circuit structure of the next stage; meanwhile, the output end of the amplifier (405) is grounded through a resistor (406) and a resistor (407) in sequence;

the negative input end of the amplifier (405) is connected between the resistor (406) and the resistor (407).

9. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 8, wherein: the passive low-pass filter circuit adopts a 14-order elliptic filter, and the characteristic impedance of the passive low-pass filter circuit is 50 omega.

10. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 9, wherein: the analog-to-digital conversion circuit comprises impedance matching networks (601, 602), a fully differential operational amplifier (605), feedback resistors (603, 604), a filter network (606), a reference voltage source (608) and an analog-to-digital converter (607);

the positive input end of the fully differential operational amplifier (605) is connected with the output ends of the impedance matching network (601) and the passive low-pass filter circuit in sequence;

the negative input end of the fully differential operational amplifier (605) is grounded through an impedance matching network (602);

the negative output end and the positive output end of the fully differential operational amplifier (605) are connected with an analog-to-digital converter (607) through a filter network (606);

one end of the feedback resistor (603) is connected with the positive input end of the fully differential operational amplifier (605), and the other end of the feedback resistor (603) is connected with the negative output end of the fully differential operational amplifier (605);

one end of the feedback resistor (604) is connected with the negative input end of the fully differential operational amplifier (605), and the other end of the feedback resistor (604) is connected with the positive output end of the fully differential operational amplifier (605);

the reference voltage source (608) is input into the analog-to-digital converter (607).

11. The system for measuring and analyzing the ripple of the high-voltage power supply based on the phase-locked amplification algorithm according to claim 10, wherein: the digital signal processing circuit comprises a main control chip and a storage unit;

the reading of the sampling data of the analog-to-digital converter by the main control chip is realized by 16-bit parallel differential LVDS; the control word of the main control chip read-write analog-digital converter is transmitted by adopting an SPI (serial peripheral interface) protocol; the main control chip is internally provided with a phase-locked amplification algorithm for analyzing the ripple frequency domain characteristics, so that the received data is processed;

and the storage unit is used for storing the data uploaded by the analog-to-digital converter and the data processed by the main control chip.

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