CN112463475A - Disk detection system, method, device and storage medium - Google Patents
Disk detection system, method, device and storage medium Download PDFInfo
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- 238000001514 detection method Methods 0.000 title claims abstract description 35
- 238000004590 computer program Methods 0.000 claims description 8
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- 238000013461 design Methods 0.000 abstract description 7
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
Abstract
The invention provides a disk detection system, a method, equipment and a storage medium, relating to the technical field of information storage, wherein the disk detection system comprises a BMC, a hard disk connector, a CPU and a CPLD, wherein the BMC and the CPLD are connected through an I2C cable, the CPU is connected with the hard disk connector through a hard disk cable, the BMC is connected with the CPLD through a VPP cable, the BMC is used for acquiring the hard disk sequence information of the whole system according to the sequence of the hard disks corresponding to the cable, the CPU is used for receiving the cable connection state and controlling to light an indicator lamp of the corresponding hard disk, the CPLD is used for analyzing the corresponding hard disk information in the VPP according to the hard disk sequence information and then transmitting the hard disk information to a mainboard BMC, and the disk detection system, the method, the equipment and the storage medium can reduce the number of pins used in the cable, reduce the design complexity and the cost, are easy to manage and maintain, and can improve the expandability of, and the method is not limited by the number of hard disks and the number of physical pins in the cable.
Description
Technical Field
The present invention relates to the field of information storage technologies, and in particular, to a disk detection system, method, device, and storage medium.
Background
With the intellectualization and the datamation of the social development, the data volume needing to be stored and analyzed is increased sharply, various data puts higher requirements on the storage service of a storage server system, the capacity of a single hard disk and the number of hard disks of a server are increased, and meanwhile, the storage configurations of the server are increased due to the requirements of various application scenes on different storage configurations of the server, which puts higher requirements on the design, the production and the configuration management of the storage system of the server.
The hard disks in the storage system generally transmit the lighting information of the hard disks through the SGPIO or VPP, wherein the status information of each hard disk is sequentially transmitted on the SGPIO or VPP in a serial mode, and the hard disk backboard lights the error and positioning indicator lamps of each hard disk by analyzing the information in the SGPIO or VPP. However, since the information in the SGPIO or the VPP is information in which all the hard disks are sequentially arranged, the backplane is required to identify and find out the corresponding hard disk information for lighting. The current general method is to transmit the position information of the connected hard disk by adding a plurality of Address pins on a high-speed cable connected with a backboard, and a CPLD on the backboard analyzes the Address to analyze the corresponding hard disk information from an SGPIO or VPP for lighting. This approach requires adding multiple address pins to each cable, which may crowd the available pin resources in the cable, occupy the limited number of pins in the standard cable, and when there are multiple hard disk controllers in the system, there is not enough pins available in the cable, so that the lighting information cannot be transmitted.
Specifically, as shown in fig. 1, fig. 1 is a method for lighting up a hard disk under a current multi-controller (taking a CPU directly connected to an NVME hard disk system as an example), a motherboard and a hard disk backplane in the system are interconnected through a cable, wherein an I2C cable is used for connecting the motherboard BMC and the backplane CPLD, and the motherboard BMC can read information such as the in-place status of the hard disk of the backplane through I2C; the VPP cable is used for connecting a mainboard hard disk Controller (CPU) and a CPLD of the backboard and transmitting the lighting information of each hard disk to the CPLD of the backboard by the mainboard CPU; the hard disk cable is used for connecting the mainboard CPU and the backboard hard disk, is an actual hard disk high-speed signal and is used for transmitting data of the hard disk; the VPP cable and the hard disk cable are both connected to the BMC through an in-place signal BP _ Present and used for the BMC to detect whether the corresponding cables are connected; each hard disk cable has n address signals for transmitting which hard disk is connected to the corresponding hard disk connector. In the design, all the hard disks in the system are subjected to unified address coding, the more the hard disks in the system are, the larger n is required, the more pins in a cable are occupied, the design is complex, the number of the supported hard disks is limited, the system is high in cost and not easy to maintain and manage, and the maintainability of the system is reduced.
Disclosure of Invention
The invention aims to provide a disk detection system, a disk detection method, disk detection equipment and a disk detection storage medium, which are used for solving the technical problems that a multi-hard-disk controller in a server is complex in lighting design, is difficult to manage and maintain and is limited in the number of supported hard disks.
In a first aspect, the present invention provides a disk detection system, including: the system comprises a BMC, a hard disk connector, a CPU and a CPLD, wherein the BMC is connected with the CPLD through an I2C cable, the CPU is connected with the hard disk connector through a hard disk cable, and the BMC is connected with the CPLD through a VPP cable;
the BMC is used for acquiring the hard disk sequence information of the whole system according to the hard disk sequence corresponding to the cable;
the CPU is used for receiving the cable connection state and controlling to light an indicator lamp of the corresponding hard disk;
and the CPLD is used for analyzing the corresponding hard disk information in the VPP according to the hard disk sequence information and transmitting the hard disk information to the mainboard BMC.
Furthermore, each cable is connected with only one pin BP _ Present for the BMC to detect the connection state of the cable.
Further, when the hard disk connector on the CPU is connected to the hard disk backplane through the cable, the BP _ Present signal is at a low level, and when the hard disk connector on the CPU is not connected to the hard disk backplane, the BP _ Present signal is at a high level.
In a second aspect, the present invention further provides a detection method for a disk detection system, which is applied to the disk detection system, and the method includes:
detecting the in-place states of the I2C cable, the VPP cable and the hard disk cable by using the BMC;
transmitting the hard disk address corresponding to the connected cable to the back panel CPLD through the I2C bus;
and the back plate CPLD analyzes the lighting information of the corresponding hard disk in the VPP according to the corresponding address and lights.
Furthermore, the main board is preset with the hard disk sequence position information corresponding to each hard disk connector.
Furthermore, only one pin BP _ Present is connected in each cable and used for BMC to detect the connection state of the cable;
the step of detecting the in-place state of the I2C cable, the VPP cable and the hard disk cable by using the BMC comprises the following steps:
the BMC determines whether the cable is connected according to the state of the signal of the pin BP _ Present.
Further, when the hard disk connector on the motherboard is connected to the hard disk backplane through the cable, the BP _ Present signal is at a low level, and when the hard disk connector on the motherboard is not connected to the hard disk backplane, the BP _ Present signal is at a high level.
Further, the step of transferring the hard disk address corresponding to the connected cable to the backplane CPLD through the I2C bus includes:
when each BP _ Present signal is at a low level, the BMC can know the position of the hard disk connected to the backplane after acquiring the cable connection state, and sequentially arrange the hard disk addresses through the I2C bus to transmit to the backplane CPLD.
In a third aspect, the present invention further provides an electronic device, which includes a memory and a processor, where the memory stores a computer program operable on the processor, and the processor implements the steps of the detection method of the disk detection system when executing the computer program.
In a fourth aspect, a computer readable storage medium stores machine executable instructions that, when invoked and executed by a processor, cause the processor to execute a detection method of the disk detection system.
The disk detection system provided by the invention can reduce the number of pins used in the cable, reduce the design complexity and cost, and is easy to manage and maintain, and can improve the expansibility of the system without being restricted by the number of hard disks and the number of physical pins in the cable.
Accordingly, the detection method, the detection device and the computer-readable storage medium of the disk detection system provided by the embodiment of the invention also have the technical effects.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a lighting block diagram of a conventional NVME hard disk;
FIG. 2 is a lighting block diagram of an improved NVME hard disk according to an embodiment of the present invention;
FIG. 3 is a flowchart of a detection method of a disk detection system according to an embodiment of the present invention;
fig. 4 is a block diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without any creative effort, shall fall within the protection scope of the present invention.
The terms "comprising" and "having" and any variations thereof as referred to in embodiments of the invention are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements but may alternatively include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Referring to fig. 2, a disk detection system according to an embodiment of the present invention includes: the system comprises a BMC, a hard disk connector, a CPU and a CPLD, wherein the BMC is connected with the CPLD through an I2C cable, the CPU is connected with the hard disk connector through a hard disk cable, and the BMC is connected with the CPLD through a VPP cable;
the BMC is used for acquiring the hard disk sequence information of the whole system according to the hard disk sequence corresponding to the cable;
the CPU is used for receiving the cable connection state and controlling to light the indicator lamp of the corresponding hard disk;
and the CPLD is used for analyzing the corresponding hard disk information in the VPP according to the hard disk sequence information and transmitting the hard disk information to the mainboard BMC.
Each cable is connected with only one pin BP _ Present and is used for the BMC to detect the connection state of the cable.
When the hard disk connector on the CPU is connected with the hard disk backboard through the cable, the BP _ Present signal is at a low level, and when the hard disk connector on the CPU is not connected with the hard disk backboard, the BP _ Present signal is at a high level.
As shown in fig. 2, the I2C cable, the VPP cable, and the hard disk cables are all connected to the BMC of the motherboard, and the motherboard BMC can detect the connection status of each cable, and predict the sequential location information of the hard disk corresponding to each hard disk connector when the motherboard is designed, and connect the corresponding hard disk cables according to the sequential arrangement of the hard disks when the system is produced and assembled, so that the BMC of the motherboard can know which cables are connected to the backplane; meanwhile, when the system is designed, the hard disks are generally required to be arranged in sequence on the back plate, so that the BMC of the mainboard can acquire the sequence information of the hard disks of the whole system from the detected sequence of the hard disks corresponding to the cables, and simultaneously, the BMC transmits the information to the CPLD of the back plate through the I2C cable, and the CPLD of the back plate analyzes the corresponding hard disk information in the VPP to light the corresponding hard disk indicator lamp according to the sequence information of the hard disks. In the method, only one pin BP _ Present is needed in each cable for the BMC to detect the connection state of the cable, the BMC judges whether the cable is connected with the backplane according to the state of the signal, when the hard disk connector on the mainboard is connected with the hard disk backplane through the cable, the BP _ Present is low, and when the hard disk connector on the mainboard is not connected with the hard disk backplane, the signal is high. After acquiring the cable connection state, the BMC can know which hard disks at the positions are connected with the backplane, and then arranges the addresses of the hard disks in sequence and transmits the addresses to the backplane CPLD.
The method utilizes the BMC to detect the in-place signal in each cable, combines the hard disk position information corresponding to each hard disk connector predicted in the system, and transmits the hard disk position information to the back board CPLD through the I2C, thereby reducing the hard disk address pins in the cable, reducing the design complexity, avoiding the problem of increased physical pins used in the cable caused by more hard disks and hard disk controllers, improving the expandability and flexibility of the system, and reducing the system cost.
In addition, referring to fig. 3, an embodiment of the present invention further provides a detection method of a disk detection system, which is applied to the disk detection system, and the method includes:
s1, detecting the in-place states of the I2C cable, the VPP cable and the hard disk cable by using BMC;
s2, transmitting the hard disk address corresponding to the connected cable to the back panel CPLD through the I2C bus;
s3, the back plate CPLD analyzes the lighting information of the corresponding hard disk in the VPP according to the corresponding address and lights.
Meanwhile, the main board is preset with the hard disk sequence position information corresponding to each hard disk connector.
In addition, only one pin BP _ Present is connected in each cable and used for BMC to detect the connection state of the cable;
the step of detecting the in-place state of the I2C cable, the VPP cable and the hard disk cable by using the BMC comprises the following steps:
the BMC determines whether the cable is connected according to the state of the signal of the pin BP _ Present.
When the hard disk connector on the mainboard is connected with the hard disk backboard through the cable, the BP _ Present signal is at a low level, and when the hard disk connector on the mainboard is not connected with the hard disk backboard, the BP _ Present signal is at a high level.
The step of transferring the hard disk address corresponding to the connected cable to the backplane CPLD through the I2C bus includes:
when each BP _ Present signal is at a low level, the BMC can know the position of the hard disk connected to the backplane after acquiring the cable connection state, and sequentially arrange the hard disk addresses through the I2C bus to transmit to the backplane CPLD.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings or the orientations or positional relationships that the products of the present invention usually place when in use, and are only used for convenience of describing the present invention and simplifying the description, but do not indicate or imply that the devices or elements referred to must have specific orientations, be constructed in specific orientations, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," "third," and the like are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should also be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly and may, for example, be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
As shown in fig. 4, an electronic device 800 according to an embodiment of the present invention includes a memory 801 and a processor 802, where the memory stores a computer program that is executable on the processor, and the processor executes the computer program to implement the steps of the method according to the above-mentioned embodiment.
As shown in fig. 4, the electronic device further includes: a bus 803 and a communication interface 804, the processor 802, the communication interface 804, and the memory 801 being connected by the bus 803; the processor 802 is used to execute executable modules, such as computer programs, stored in the memory 801.
The Memory 801 may include a high-speed Random Access Memory (RAM), and may also include a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. The communication connection between the network element of the system and at least one other network element is implemented through at least one communication interface 804 (which may be wired or wireless), and an internet, a wide area network, a local network, a metropolitan area network, and the like may be used.
The bus 803 may be an ISA bus, PCI bus, EISA bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one bi-directional arrow is shown in FIG. 4, but that does not indicate only one bus or one type of bus.
The memory 801 is used for storing a program, the processor 802 executes the program after receiving an execution instruction, and the method performed by the apparatus defined by the process disclosed in any of the foregoing embodiments of the present invention may be applied to the processor 802, or implemented by the processor 802.
The processor 802 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 802. The Processor 802 may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the device can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), other Programmable logic devices, discrete Gate or transistor logic devices, and discrete hardware components. The various methods, steps and logic blocks disclosed in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software modules may be located in ram, flash memory, rom, prom, or eprom, registers, among other storage media as is well known in the art. The storage medium is located in the memory 801, and the processor 802 reads the information in the memory 801 and completes the steps of the method in combination with the hardware thereof.
In accordance with the above method, embodiments of the present invention also provide a computer readable storage medium storing machine executable instructions, which when invoked and executed by a processor, cause the processor to perform the steps of the above method.
The apparatus provided by the embodiment of the present invention may be specific hardware on the device, or software or firmware installed on the device, etc. The device provided by the embodiment of the present invention has the same implementation principle and technical effect as the method embodiments, and for the sake of brief description, no mention is made in the device embodiments, and reference may be made to the corresponding contents in the method embodiments. It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the foregoing systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative, and for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
As another example, the division of the elements into only one logical division may be implemented in a different manner, as multiple elements or components may be combined or integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may also be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, each functional unit in the embodiments provided by the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in a figure, it need not be further defined or explained in subsequent figures, and moreover, the terms "first," "second," "third," etc. are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.
Finally, it should be noted that: the above-mentioned embodiments are merely specific embodiments of the present invention, which are used for illustrating the technical solutions of the present invention and not for limiting the same, and the scope of the present invention is not limited thereto, although the present invention is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: those skilled in the art can still make modifications or changes to the technical solutions described in the foregoing embodiments or make equivalent substitutions for some technical features within the technical scope of the present disclosure; and the modifications, changes or substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention. Are intended to be covered by the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A disk inspection system, comprising: the system comprises a BMC, a hard disk connector, a CPU and a CPLD, wherein the BMC is connected with the CPLD through an I2C cable, the CPU is connected with the hard disk connector through a hard disk cable, and the BMC is connected with the CPLD through a VPP cable;
the BMC is used for acquiring the hard disk sequence information of the whole system according to the hard disk sequence corresponding to the cable;
the CPU is used for receiving the cable connection state and controlling to light an indicator lamp of the corresponding hard disk;
and the CPLD is used for analyzing the corresponding hard disk information in the VPP according to the hard disk sequence information and transmitting the hard disk information to the mainboard BMC.
2. The disk detection system according to claim 1, wherein each cable is connected to only one pin BP _ Present for the BMC to detect the connection status of the cable.
3. The system of claim 2, wherein the BP _ Present signal is low when the hard disk connector of the CPU is connected to the hard disk backplane via the cable, and the BP _ Present signal is high when the hard disk connector of the CPU is not connected to the hard disk backplane.
4. A detection method of a disk detection system, applied to the disk detection system according to claim 1, the method comprising:
detecting the in-place states of the I2C cable, the VPP cable and the hard disk cable by using the BMC;
transmitting the hard disk address corresponding to the connected cable to the back panel CPLD through the I2C bus;
and the back plate CPLD analyzes the lighting information of the corresponding hard disk in the VPP according to the corresponding address and lights.
5. The detection method according to claim 4, wherein the main board is preset with the sequential position information of the hard disks corresponding to the hard disk connectors.
6. The method according to claim 5, wherein only one pin BP _ Present is connected to each cable for BMC to detect the connection status of the cable;
the method for detecting the in-place states of the I2C cable, the VPP cable and the hard disk cable by using the BMC comprises the following steps:
the BMC determines whether the cable is connected according to the state of the signal of the pin BP _ Present.
7. The disk detection method according to claim 6, wherein the BP _ Present signal is at a low level when the hard disk connector on the motherboard is connected to the hard disk backplane via the cable, and the BP _ Present signal is at a high level when the hard disk connector on the motherboard is not connected to the hard disk backplane.
8. The disc detection method according to claim 7, wherein the step of transferring the hard disc address corresponding to the connected cable to the back plane CPLD through the I2C bus comprises:
when each BP _ Present signal is at a low level, the BMC can know the position of the hard disk connected to the backplane after acquiring the cable connection state, and sequentially arrange the hard disk addresses through the I2C bus to transmit to the backplane CPLD.
9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program operable on the processor, and wherein the processor implements the steps of the method according to any of the preceding claims 4 to 8 when executing the computer program.
10. A computer readable storage medium having stored thereon machine executable instructions which, when invoked and executed by a processor, cause the processor to execute the method of any of claims 4 to 8.
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| CN113204510A (en) * | 2021-04-29 | 2021-08-03 | 山东英信计算机技术有限公司 | Server management architecture and server |
| CN113360437A (en) * | 2021-04-21 | 2021-09-07 | 山东英信计算机技术有限公司 | Disk sequence adjusting device, method, equipment and storage medium of hard disk |
| CN113868054A (en) * | 2021-09-27 | 2021-12-31 | 苏州浪潮智能科技有限公司 | Hard disk slot positioning method, system, equipment and medium for hard disk backboard |
| CN114625213A (en) * | 2022-01-24 | 2022-06-14 | 苏州浪潮智能科技有限公司 | Storage equipment adapter card, storage equipment testing system and method |
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Application publication date: 20210309 |