CN112448715B - Method and system for calibrating HIRC by using PES (PES) signal - Google Patents
Method and system for calibrating HIRC by using PES (PES) signal Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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- H—ELECTRICITY
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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- H—ELECTRICITY
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
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Abstract
The application relates to a method and a system for calibrating HIRC by using PES signals, wherein the method comprises the following steps: triggering a peripheral event system to generate periodic peripheral event system pulses through a real-time counter; acquiring n groups of peripheral event system pulses through an enhanced timer; counting the occurrence times of the rising edge and the falling edge of the system pulse of each group of peripheral events respectively; calculating the actual value of the cycle number of the peripheral event system pulse according to the times of the rising edge and the falling edge; and adjusting the clock frequency of the embedded high-speed resistance-capacitance oscillator according to the actual value of the period number of the peripheral event system pulses and the standard value of the period number of the peripheral event system pulses. According to the technical scheme provided by the application, the clock frequency of the HIRC is calibrated through the mutual communication of the modules such as the real-time counter, the peripheral event system and the enhanced timer in the MCU, no external equipment is required to be added, the cost is reduced, and the whole process is realized by software completely, so that the clock frequency is adjusted more independently and flexibly.
Description
Technical Field
The application relates to the technical field of computers, in particular to a method and a system for calibrating HIRC by using PES signals.
Background
The HIRC (High speed Internal RC oscillator, embedded high speed rc oscillator) of the MCU (Microcontroller Unit, micro control unit) is subject to process level limitations and environmental factors (e.g., temperature, voltage, etc.), as well as external parasitic capacitance in the PCB (Printed Circuit Board ), with low clock accuracy.
In the prior art, an external ceramic oscillator is generally used for improving the clock precision of the HIRC, and the method improves the clock precision but greatly increases the cost.
Therefore, it is desirable to provide a method and system for calibrating the HIRC using the PES (peripheral event system ) signal to solve the problem of insufficient HIRC accuracy.
Disclosure of Invention
In order to solve the problem of insufficient HIRC precision in the prior art, the application provides a method and a system for calibrating HIRC by using PES signals.
The application provides a method for calibrating HIRC by using PES signals, which comprises the following steps:
triggering a peripheral event system to generate periodic peripheral event system pulses through a real-time counter;
acquiring n groups of peripheral event system pulses through an enhanced timer;
counting the occurrence times of the rising edge and the falling edge of the system pulse of each group of peripheral events respectively;
calculating the actual value of the cycle number of the peripheral event system pulse according to the times of the rising edge and the falling edge;
according to the actual value of the period number of the peripheral event system pulses and the standard value of the period number of the peripheral event system pulses, the clock frequency of the embedded high-speed resistance-capacitance oscillator is adjusted, and the period number of the peripheral event system pulses in unit time is the clock frequency of the embedded high-speed resistance-capacitance oscillator.
Further, the counting the number of times of the rising edge and the falling edge of each group of peripheral event system pulse respectively comprises the following steps:
generating a rising edge or falling edge interrupt on the enhanced timer when the enhanced timer receives the peripheral event system pulse;
and counting the occurrence times of the rising edge and the falling edge of each group of peripheral event system pulses according to the number of rising edge or falling edge interrupts.
Further, counting the number of occurrence times of rising edges and falling edges of system pulses of each group of peripheral events according to the number of rising edges or falling edge interrupts, including:
counting the occurrence times of the rising edges of the system pulses of each group of peripheral events according to the number of rising edge interrupts;
and counting the occurrence times of the falling edge in each group of peripheral event system pulses according to the number of the falling edge interrupts.
Further, calculating an actual value of the number of periods of the peripheral event system pulse according to the times of the rising edge and the falling edge, including:
calculating the value of the period number of n groups of peripheral event system pulses according to the times of the rising edge and the falling edge;
and calculating the average value of the period number of the peripheral event system pulses according to the value of the period number of the n groups of peripheral event system pulses, wherein the average value is the actual value of the period number of the peripheral event system pulses.
Further, according to the actual value of the period number of the peripheral event system pulse and the standard value of the period number of the peripheral event system pulse, adjusting the clock frequency of the embedded high-speed resistance-capacitance oscillator, including:
comparing the actual value of the period number of the peripheral event system pulse with the standard value of the period number of the peripheral event system pulse;
if the actual value of the period number of the peripheral event system pulse is larger than the standard value of the period number of the peripheral event system pulse, increasing the clock frequency of the embedded high-speed resistance-capacitance oscillator;
and if the actual value of the period number of the peripheral event system pulse is smaller than the standard value of the period number of the peripheral event system pulse, reducing the clock frequency of the embedded high-speed resistance-capacitance oscillator.
The application also provides a system for calibrating the HIRC by using the PES signal, which comprises:
the triggering module is used for triggering the peripheral event system to generate periodic peripheral event system pulses through the real-time counter;
the acquisition module is used for acquiring n groups of peripheral event system pulses through the enhanced timer;
the statistics module is used for respectively counting the occurrence times of the rising edge and the falling edge of the system pulse of each group of peripheral events;
the calculation module is used for calculating the actual value of the cycle number of the peripheral event system pulse according to the times of the rising edge and the falling edge;
and the calibration module is used for adjusting the clock frequency of the embedded high-speed resistance-capacitance oscillator according to the actual value of the period number of the peripheral event system pulses and the standard value of the period number of the peripheral event system pulses, wherein the period number of the peripheral event system pulses in unit time is the clock frequency of the embedded high-speed resistance-capacitance oscillator.
Further, the statistics module includes:
a generation sub-module for generating a rising edge or falling edge interrupt on the enhanced timer when the enhanced timer receives the peripheral event system pulse;
and the statistics sub-module is used for counting the occurrence times of the rising edge and the falling edge of each group of peripheral event system pulse according to the number of the rising edge or the falling edge interruption.
Further, the statistics sub-module is used for,
counting the occurrence times of the rising edges of the system pulses of each group of peripheral events according to the number of rising edge interrupts;
and counting the occurrence times of the falling edge in each group of peripheral event system pulses according to the number of the falling edge interrupts.
Further, the computing module includes:
the first calculating submodule is used for calculating the value of the cycle number of the n groups of peripheral event system pulses according to the times of the rising edge and the falling edge;
and the second calculation sub-module is used for calculating the average value of the period number of the peripheral event system pulses according to the value of the period number of the n groups of peripheral event system pulses, wherein the average value is the actual value of the period number of the peripheral event system pulses.
Further, the calibration module includes:
comparing the actual value of the period number of the peripheral event system pulse with the standard value of the period number of the peripheral event system pulse;
if the actual value of the period number of the peripheral event system pulse is larger than the standard value of the period number of the peripheral event system pulse, increasing the clock frequency of the embedded high-speed resistance-capacitance oscillator;
and if the actual value of the period number of the peripheral event system pulse is smaller than or equal to the standard value of the period number of the peripheral event system pulse, reducing the clock frequency of the embedded high-speed resistance-capacitance oscillator.
Compared with the closest prior art, the technical scheme of the application has the following advantages:
the technical scheme provided by the application is that the peripheral event system is triggered by the real-time counter to generate periodic peripheral event system pulses, then the peripheral event system pulses with n periods are obtained by the enhanced timer, the occurrence times of rising edges and falling edges of the peripheral event system pulses with each period are counted, the actual value of the period of the peripheral event system pulse is calculated according to the occurrence times, and finally the clock frequency of the embedded high-speed resistance-capacitance oscillator is adjusted according to the actual value. According to the technical scheme, the real-time counter, the peripheral event system, the enhanced timer and other modules in the MCU are mutually communicated, the peripheral event system is triggered periodically by the real-time counter to send pulses, the enhanced timer is used for capturing the pulses of the peripheral event system of the capturer, and a clock calibration value is calculated to calibrate the clock frequency of the embedded high-speed resistance-capacitance oscillator. Compared with the prior art that external equipment is needed to calibrate the clock frequency, the clock frequency calibration method does not need to be added, and reduces cost. The whole process is completely realized by software, so that the clock frequency is adjusted more autonomously and flexibly.
Drawings
FIG. 1 is a flow chart of a method for calibrating an HIRC using PES signals according to an embodiment of the present application;
fig. 2 is a block diagram of a system for calibrating an HIRC using a PES signal according to an embodiment of the present application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
As shown in FIG. 1, an embodiment of the present application provides a method for calibrating an HIRC using a PES signal. As shown in fig. 2, a block diagram of a system for calibrating an HIRC using a PES signal according to the present application may include:
triggering a peripheral event system to generate periodic peripheral event system pulses through a real-time counter;
acquiring n groups of peripheral event system pulses through an enhanced timer;
counting the occurrence times of the rising edge and the falling edge of the system pulse of each group of peripheral events respectively;
calculating the actual value of the cycle number of the peripheral event system pulse according to the times of the rising edge and the falling edge;
according to the actual value of the period number of the peripheral event system pulses and the standard value of the period number of the peripheral event system pulses, the clock frequency of the embedded high-speed resistance-capacitance oscillator is adjusted, and the period number of the peripheral event system pulses in unit time is the clock frequency of the embedded high-speed resistance-capacitance oscillator.
In the embodiment of the application, an RTC (Real-Time Clock Real-Time counter) in the MCU triggers a PES (peripheral event system ) to generate periodic peripheral event pulses, n sets of peripheral event system pulses are obtained through an ETM channel of an ETM (Enhanced timer), the occurrence times of rising edges and falling edges of each set of peripheral event system pulses are counted, the actual value of the cycle number of peripheral Time system pulses is calculated according to the occurrence times of the rising edges and the falling edges, and finally the Clock frequency of the HIRC (High speed Internal RC oscillator, embedded high-speed resistive-capacitive oscillator) is adjusted according to the actual value of the cycle number of peripheral event system pulses and the standard value of the cycle number of peripheral event system pulses.
According to the embodiment of the application, through the mutual communication of the modules such as the real-time counter, the peripheral event system, the enhanced timer and the like in the MCU, the peripheral event system is periodically triggered by the real-time counter to send pulses, the pulse of the peripheral event system of the capturer is carried out by using the enhanced timer, and the clock calibration value is calculated to calibrate the clock frequency of the embedded high-speed resistance-capacitance oscillator. Compared with the prior art that external equipment is needed to calibrate the clock frequency, the clock frequency calibration method does not need to be added, and reduces cost. The whole process is completely realized by software, so that the clock frequency is adjusted more autonomously and flexibly.
In one possible embodiment of the present application, counting the number of occurrences of rising and falling edges of each set of peripheral event system pulses, respectively, specifically includes:
generating a rising edge or falling edge interrupt on the enhanced timer when the enhanced timer receives the peripheral event system pulse;
and counting the occurrence times of the rising edge and the falling edge of each group of peripheral event system pulses according to the number of rising edge or falling edge interrupts.
In an embodiment of the present application, the ETM generates a rising edge or falling edge break according to the PES pulses, and then counts the number of rising and falling edges occurring in each group of PES pulses according to the number of rising and falling edge breaks.
Specifically, the ETM generates a rising edge or a falling edge interrupt according to the PES pulse, generates an interrupt when the low level is changed to the high level at the start PES pulse, records the count value N of the point, generates the count value N1 when the PES pulse is changed to the low level from the high level, and records the count value N2 when the PES pulse is changed to the high level from the low level.
In one possible embodiment of the present application, counting the number of occurrences of rising and falling edges of each set of peripheral event system pulses according to the number of rising or falling edge interrupts specifically includes:
counting the occurrence times of the rising edges of the system pulses of each group of peripheral events according to the number of rising edge interrupts;
and counting the occurrence times of the falling edge in each group of peripheral event system pulses according to the number of the falling edge interrupts.
Specifically, the number of times a rising edge in a PES pulse occurs is recorded once when a rising edge interrupt is generated, and the number of times a falling edge in a PES pulse occurs is recorded once when a falling edge interrupt is generated. That is, the occurrence of an interrupt records the number of rising/falling edges.
In one possible embodiment of the present application, calculating the actual value of the number of cycles of the peripheral event system pulse according to the number of rising and falling edges includes:
calculating the value of the period number of n groups of peripheral event system pulses according to the times of the rising edge and the falling edge;
and calculating the average value of the period number of the peripheral event system pulses according to the value of the period number of the n groups of peripheral event system pulses, wherein the average value is the actual value of the period number of the peripheral event system pulses.
In the embodiment of the present application, the number of occurrences of the rising edges and the falling edges of the n groups of PES pulses is counted according to the manner of recording the number of occurrences of the rising edges and the falling edges of the group in the above embodiment, so as to obtain the value of the number of periods of the n groups of PES pulses, and then an average value of the number of periods of the PES pulses is calculated according to the value of the number of periods of the PES pulses, where the average value is an actual value of the number of periods of the PES pulses.
Specifically, the value of the cycle number of a group of PES pulses is calculated according to N, N1, N2 obtained in the above embodiment, namely (N1-N) + (N2-N1). And then calculating the total value of the period number of the n groups of PES pulses, and dividing the total value by n to obtain the average value of the period number of the PES pulses, namely the actual value of the period number of the PES pulses.
In one possible implementation manner of the present application, according to the actual value of the period number of the peripheral event system pulses and the standard value of the period number of the peripheral event system pulses, the clock frequency of the embedded high-speed rc oscillator is adjusted, which specifically includes:
comparing the actual value of the period number of the peripheral event system pulse with the standard value of the period number of the peripheral event system pulse;
if the actual value of the period number of the peripheral event system pulse is larger than the standard value of the period number of the peripheral event system pulse, increasing the clock frequency of the embedded high-speed resistance-capacitance oscillator;
and if the actual value of the period number of the peripheral event system pulse is smaller than the standard value of the period number of the peripheral event system pulse, reducing the clock frequency of the embedded high-speed resistance-capacitance oscillator.
In the embodiment of the application, comparing the actual value of the period number of the PES pulses obtained in the embodiment with the standard value of the period number of the PES pulses, if the actual value of the period number of the PES pulses is larger than the standard value of the period number of the PES pulses, the clock frequency of the HIRC is lower, and the clock frequency of the HIRC needs to be increased; if the actual value of the period number of the PES pulses is smaller than the standard value of the period number of the PES pulses, the clock frequency of the HIRC is higher, and the clock frequency of the HIRC needs to be reduced; if the actual value of the number of periods of the PES pulse is equal to the standard value of the number of periods of the PES pulse, it is indicated that the clock frequency of the HIRC is the standard frequency, and no adjustment of the clock frequency of the HIRC is required. Different MCU's HIRC calibration scale is different, adopts different algorithm to calculate its value, writes in HIRC calibration register. The HIRC calibration is turned on as needed.
The present application also provides a system for calibrating an HIRC using a PES signal based on the same inventive concept, as shown in fig. 2, the system comprising:
the triggering module is used for triggering the peripheral event system to generate periodic peripheral event system pulses through the real-time counter;
the acquisition module is used for acquiring n groups of peripheral event system pulses through the enhanced timer;
the statistics module is used for respectively counting the occurrence times of the rising edge and the falling edge of the system pulse of each group of peripheral events;
the calculation module is used for calculating the actual value of the cycle number of the peripheral event system pulse according to the times of the rising edge and the falling edge;
and the calibration module is used for adjusting the clock frequency of the embedded high-speed resistance-capacitance oscillator according to the actual value of the period number of the peripheral event system pulses and the standard value of the period number of the peripheral event system pulses, wherein the period number of the peripheral event system pulses in unit time is the clock frequency of the embedded high-speed resistance-capacitance oscillator.
Optionally, the statistics module specifically includes:
a generation sub-module for generating a rising edge or falling edge interrupt on the enhanced timer when the enhanced timer receives the peripheral event system pulse;
and the statistics sub-module is used for counting the occurrence times of the rising edge and the falling edge of each group of peripheral event system pulse according to the number of the rising edge or the falling edge interruption.
Optionally, a statistics sub-module, in particular for,
counting the occurrence times of the rising edges of the system pulses of each group of peripheral events according to the number of rising edge interrupts;
and counting the occurrence times of the falling edge in each group of peripheral event system pulses according to the number of the falling edge interrupts.
Optionally, the computing module specifically includes:
the first calculating submodule is used for calculating the value of the cycle number of the n groups of peripheral event system pulses according to the times of the rising edge and the falling edge;
and the second calculation sub-module is used for calculating the average value of the period number of the peripheral event system pulses according to the value of the period number of the n groups of peripheral event system pulses, wherein the average value is the actual value of the period number of the peripheral event system pulses.
Optionally, the calibration module specifically includes:
comparing the actual value of the period number of the peripheral event system pulse with the standard value of the period number of the peripheral event system pulse;
if the actual value of the period number of the peripheral event system pulse is larger than the standard value of the period number of the peripheral event system pulse, increasing the clock frequency of the embedded high-speed resistance-capacitance oscillator;
and if the actual value of the period number of the peripheral event system pulse is smaller than or equal to the standard value of the period number of the peripheral event system pulse, reducing the clock frequency of the embedded high-speed resistance-capacitance oscillator.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
It is to be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For a hardware implementation, the processing units may be implemented within one or more application specific integrated circuits (Application Specific Integrated Circuits, ASIC), digital signal processors (Digital Signal Processing, DSP), digital signal processing devices (DSP devices, DSPD), programmable logic devices (Programmable Logic Device, PLD), field programmable gate arrays (Field-Programmable Gate Array, FPGA), general purpose processors, controllers, microcontrollers, microprocessors, other electronic units designed to perform the functions described herein, or a combination thereof.
For a software implementation, the techniques described herein may be implemented by means of units that perform the functions described herein. The software codes may be stored in a memory and executed by a processor. The memory may be implemented within the processor or external to the processor.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the embodiments of the present application may be embodied in essence or a part contributing to the prior art or a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in the embodiments of the present application. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk, etc.
It should be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims (10)
1. A method of calibrating an HIRC using a PES signal, comprising:
triggering a peripheral event system to generate periodic peripheral event system pulses through a real-time counter;
acquiring n groups of peripheral event system pulses through an enhanced timer;
counting the occurrence times of the rising edge and the falling edge of the system pulse of each group of peripheral events respectively;
calculating the actual value of the cycle number of the peripheral event system pulse according to the times of the rising edge and the falling edge;
according to the actual value of the period number of the peripheral event system pulses and the standard value of the period number of the peripheral event system pulses, the clock frequency of the embedded high-speed resistance-capacitance oscillator is adjusted, and the period number of the peripheral event system pulses in unit time is the clock frequency of the embedded high-speed resistance-capacitance oscillator.
2. A method for calibrating a HIRC using a PES signal according to claim 1, wherein counting the number of occurrences of the rising and falling edges of each set of peripheral event system pulses, respectively, comprises:
generating a rising edge or falling edge interrupt on the enhanced timer when the enhanced timer receives the peripheral event system pulse;
and counting the occurrence times of the rising edge and the falling edge of each group of peripheral event system pulses according to the number of rising edge or falling edge interrupts.
3. A method of calibrating a HIRC using a PES signal according to claim 2, wherein counting the number of occurrences of rising and falling edges per set of peripheral event system pulses based on the number of rising or falling edge interrupts comprises:
counting the occurrence times of the rising edges of the system pulses of each group of peripheral events according to the number of rising edge interrupts;
and counting the occurrence times of the falling edge in each group of peripheral event system pulses according to the number of the falling edge interrupts.
4. A method of calibrating a HIRC using a PES signal according to claim 1, wherein calculating an actual value of the number of cycles of a peripheral event system pulse based on the number of rising and falling edges comprises:
calculating the value of the period number of n groups of peripheral event system pulses according to the times of the rising edge and the falling edge;
and calculating the average value of the period number of the peripheral event system pulses according to the value of the period number of the n groups of peripheral event system pulses, wherein the average value is the actual value of the period number of the peripheral event system pulses.
5. The method of calibrating an HIRC using a PES signal according to claim 1, wherein adjusting the clock frequency of the embedded high speed rc based on the actual value of the number of cycles of the peripheral event system pulses and the standard value of the number of cycles of the peripheral event system pulses comprises:
comparing the actual value of the period number of the peripheral event system pulse with the standard value of the period number of the peripheral event system pulse;
if the actual value of the period number of the peripheral event system pulse is larger than the standard value of the period number of the peripheral event system pulse, increasing the clock frequency of the embedded high-speed resistance-capacitance oscillator;
and if the actual value of the period number of the peripheral event system pulse is smaller than the standard value of the period number of the peripheral event system pulse, reducing the clock frequency of the embedded high-speed resistance-capacitance oscillator.
6. A system for calibrating an HIRC using a PES signal, comprising:
the triggering module is used for triggering the peripheral event system to generate periodic peripheral event system pulses through the real-time counter;
the acquisition module is used for acquiring n groups of peripheral event system pulses through the enhanced timer;
the statistics module is used for respectively counting the occurrence times of the rising edge and the falling edge of the system pulse of each group of peripheral events;
the calculation module is used for calculating the actual value of the cycle number of the peripheral event system pulse according to the times of the rising edge and the falling edge;
and the calibration module is used for adjusting the clock frequency of the embedded high-speed resistance-capacitance oscillator according to the actual value of the period number of the peripheral event system pulses and the standard value of the period number of the peripheral event system pulses, wherein the period number of the peripheral event system pulses in unit time is the clock frequency of the embedded high-speed resistance-capacitance oscillator.
7. The system for calibrating an HIRC using a PES signal of claim 6 wherein said statistics module comprises:
a generation sub-module for generating a rising edge or falling edge interrupt on the enhanced timer when the enhanced timer receives the peripheral event system pulse;
and the statistics sub-module is used for counting the occurrence times of the rising edge and the falling edge of each group of peripheral event system pulse according to the number of the rising edge or the falling edge interruption.
8. The system for calibrating an HIRC using a PES signal as in claim 7 wherein said statistics sub-module is configured to,
counting the occurrence times of the rising edges of the system pulses of each group of peripheral events according to the number of rising edge interrupts;
and counting the occurrence times of the falling edge in each group of peripheral event system pulses according to the number of the falling edge interrupts.
9. The system for calibrating an HIRC using a PES signal of claim 6 wherein said computing module comprises:
the first calculating submodule is used for calculating the value of the cycle number of the n groups of peripheral event system pulses according to the times of the rising edge and the falling edge;
and the second calculation sub-module is used for calculating the average value of the period number of the peripheral event system pulses according to the value of the period number of the n groups of peripheral event system pulses, wherein the average value is the actual value of the period number of the peripheral event system pulses.
10. The system for calibrating an HIRC using a PES signal of claim 6, wherein said calibration module comprises:
comparing the actual value of the period number of the peripheral event system pulse with the standard value of the period number of the peripheral event system pulse;
if the actual value of the period number of the peripheral event system pulse is larger than the standard value of the period number of the peripheral event system pulse, increasing the clock frequency of the embedded high-speed resistance-capacitance oscillator;
and if the actual value of the period number of the peripheral event system pulse is smaller than or equal to the standard value of the period number of the peripheral event system pulse, reducing the clock frequency of the embedded high-speed resistance-capacitance oscillator.
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Inventor after: Chang Mingtao Inventor after: Chen Weinan Inventor before: Chang Mingtao |