CN112422955A

CN112422955A - ADC intrinsic noise analysis method for CMOS image sensor

Info

Publication number: CN112422955A
Application number: CN202011166168.1A
Authority: CN
Inventors: 李婷; 何杰; 崔双韬; 张先娆; 徐晚成; 张曼; 曹天骄; 袁昕; 李倩敏; 时光
Original assignee: Xian Microelectronics Technology Institute
Current assignee: Xian Microelectronics Technology Institute
Priority date: 2020-10-27
Filing date: 2020-10-27
Publication date: 2021-02-26
Anticipated expiration: 2040-10-27
Also published as: CN112422955B

Abstract

The invention discloses an ADC intrinsic noise analysis method for a CMOS image sensor, and belongs to the field of simulation analysis. An ADC intrinsic noise analysis method for a CMOS image sensor, comprising the steps of: 1) carrying out simulation analysis on the turnover of the ADC comparator to obtain the deflection of a turnover interval; 2) calculating the probability of the turnover interval offset distribution in one clock period of an ADC counter and the probability of spanning multiple clock periods, and calculating the noise voltage of the CMOS image sensor caused by the turnover interval offset distribution; 3) and multiplying the CMOS image sensor noise voltage by the corresponding probability to obtain a calculated value of the CMOS image sensor noise caused by the ADC intrinsic noise. The analysis method of the invention determines the whole noise of the CMOS image sensor caused by the inherent noise of the ADC, is beneficial to determining whether the design value meets the design requirement or not in the design stage, and provides a basis for improving the noise design.

Description

ADC intrinsic noise analysis method for CMOS image sensor

Technical Field

The invention belongs to the field of simulation analysis, and particularly relates to an ADC intrinsic noise analysis method for a CMOS image sensor.

Background

In low-brightness scenes or video applications, noise severely affects the quality of the captured image or video. Noise broadly refers to other forms of disturbance in addition to signals. There are many types of noise in CMOS sensor circuits, which can be broadly classified into device electronic noise and "ambient" noise depending on the cause of the noise. The electronic noise of the device is caused by the physical properties of the device, and generally comprises thermal noise, shot noise, flicker noise and dark current in the CMOS visible light image sensor; "ambient" noise refers to random interference of the circuit from power, ground, substrate, etc., or ambient temperature variations, clock jitter, electromagnetic interference, etc. Various noises are coupled to the sensor array through peripheral circuitry that impair image sensor performance. Wherein "ambient" noise can be well suppressed by the circuit design without significant impact on the performance of the sensor. For example, in the layout design process of the image sensor, a protection ring is added to increase the anti-interference capability of the chip on power supply fluctuation; designers may also use low phase noise clocks to reduce the impact of clock jitter on image sensor performance. Meanwhile, the noise inherent in the device is difficult to suppress, and thus the noise becomes the most basic limiting factor for the performance of the CMOS visible light image sensor.

The ADC integrated in the CMOS image sensor is used for converting photoelectric signals into digital signals, and the noise performance of the whole CMOS image sensor is seriously restricted by the inherent noise of the ADC, so that the analysis of the noise influence of the inherent noise of the ADC on the whole CMOS image sensor plays a crucial role. Fig. 1 shows a structural block diagram of an ADC and a conversion process, where the ADC includes an ADC comparator 10 and an ADC counter 11, the input of the ADC comparator 10 is an analog to-be-converted signal Vin and a Ramp reference Ramp, when an inverted signal appears during first comparison, the counter starts counting, and when an inverted signal appears during second comparison, the counter ends counting. Due to ADC comparator noise, the flip edges are not in the same position under the same conditions, thereby causing CMOS image sensor noise. A flow chart of a conventional noise analysis method of an ADC is shown in fig. 2, in which the ADC samples a sinusoidal input signal and calculates a noise floor using fast fourier transform.

Disclosure of Invention

The invention aims to overcome the defect that the inherent noise of an ADC (analog to digital converter) used for a CMOS (complementary metal oxide semiconductor) image sensor cannot be obtained, and provides an ADC inherent noise analysis method used for the CMOS image sensor.

In order to achieve the purpose, the invention adopts the following technical scheme to realize the purpose:

an ADC intrinsic noise analysis method for a CMOS image sensor, comprising the steps of:

1) carrying out simulation analysis on the turnover of the ADC comparator to obtain the deflection of a turnover interval;

2) calculating the probability of the turnover interval offset distribution in one clock period of an ADC counter and the probability of spanning multiple clock periods, and calculating the noise voltage of the CMOS image sensor caused by the turnover interval offset distribution;

3) and carrying out weighted average on the CMOS image sensor noise voltage and the corresponding probability to obtain a calculated value of the CMOS image sensor noise caused by the ADC intrinsic noise.

Further, in the step 1), according to the noise definition of the CMOS image sensor, a noise statistical method of the CMOS image sensor is adopted to perform simulation analysis on the inversion of the ADC comparator.

Further, in step 2), if the transition interval offset is distributed within one clock cycle of the ADC counter, no noise is caused.

Further, the step 2) of calculating the noise voltage of the CMOS image sensor caused by the noise voltage is specifically as follows:

in the formula: f is an F frame image; voi is the ith output of the pixel; vo is the average of the F outputs of the pixel.

1) determining an analog voltage value corresponding to 1LSB quantized by the ADC and a time span corresponding to 1 LSB;

2) adding a device noise model, and simulating the turnover of the ADC to obtain the turnover interval offset of the ADC;

3) determining a probability of being noise free;

determining the probability of generating noise, and calculating the noise voltage corresponding to the noise;

4) multiplying the noise probability and the noise voltage value to obtain single-point noise;

and adding all the single-point noises to obtain a calculated value of the CMOS image sensor noise caused by the inherent noise of the ADC.

Further, in step 1), an analog voltage value corresponding to 1LSB quantized by the ADC is determined according to the analog signal converted by the ADC.

Further, in step 1), the time span corresponding to 1LSB is determined according to the operating frequency of the ADC counter.

Further, in step 2), calculating the probability of the ADC switching interval offset within 1LSB time clock period, and determining the probability of no noise.

Further, in step 2), calculating the probability that the ADC switching interval offset spans a plurality of LSBs, and determining the probability of generating noise.

Compared with the prior art, the invention has the following beneficial effects:

the ADC intrinsic noise analysis method for the CMOS image sensor adopts a CMOS image sensor noise statistical method to analyze the turnover deviation range of an ADC comparator caused by noise in the CMOS image sensor, finally causes the difference probability of output code values and determines the nonideal characteristic of the ADC; the ADC intrinsic noise analysis method for the CMOS image sensor determines the integral noise of the CMOS image sensor caused by the ADC intrinsic noise, is beneficial to determining whether a design value meets the design requirement or not in the design stage, and provides a basis for improving the noise design. The analysis method of the invention not only can analyze and calculate the noise of the ADC integrated in the CMOS image sensor, but also can analyze and calculate other core modules such as a programmable gain amplifier module and the like, and finally realizes the design value of the whole noise of the whole CMOS image sensor.

Drawings

FIG. 1 is a block diagram and a process diagram of an ADC used in a CMOS image sensor;

FIG. 2 is a conventional ADC intrinsic noise calculation method;

FIG. 3 is a graph of CMOS image sensor code value variation due to ADC intrinsic noise;

FIG. 4 is a graph of the flip time difference due to ADC intrinsic noise;

FIG. 5 is a schematic diagram of noise calculation due to ADC intrinsic noise;

FIG. 6 is a flowchart of an embodiment.

Detailed Description

In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

There is a difference between the noise evaluation method of the CMOS image sensor and the noise evaluation method of the monolithic ADC. According to the CCD testing method, the noise of the CMOS image sensor is represented by the difference between the digital code value output by the analog-to-digital conversion of the pixel photoelectric signal and the mean value of a plurality of frames of images which are repeatedly collected. Therefore, even if the ADC has a low bit number and images are acquired by multiple frames, the difference between the digital code value output by the pixel photoelectric signal analog-to-digital conversion and the mean value is small, and the CMOS image sensor has small noise according to the definition of the CMOS image sensor noise. Therefore, CMOS image sensor noise does not have a direct relationship with the number of bits of the ADC. However, for a monolithic ADC, the lowest value of the noise is quantization noise, and the quantization noise has a direct relationship with the number of bits of the ADC. Aiming at the fact that no relevant simulation and analysis method exists for noise of a CMOS image sensor caused by errors of an ADC (analog to digital converter), the invention provides a simulation analysis method for the noise of the CMOS image sensor caused by the errors of the ADC. As illustrated in the drawings, CMOS image sensors generally employ a single-ramp architecture, counting at clock edges (rising or falling). The multi-frame images are shot at the same gray level, and for an ideal CMOS image sensor, the ADC turnover time is consistent, so that the output code values of the multi-frame images are consistent, and the noise of the final CMOS image sensor is not caused; for the CMOS image sensor interfered by noise, the turnover time of the ADC of the CMOS image sensor has difference, if the difference is within one clock period of a clock, the output code values are the same, and the noise of the final CMOS image sensor is not caused; the difference spanning two or more clock cycles, the output code values are different, causing noise in the final CMOS image sensor. The invention provides a CMOS image sensor noise analysis method based on statistics, which realizes the quantitative calculation of the CMOS image sensor noise, provides a noise probability analysis technology aiming at the difficulty of the CMOS image sensor noise analysis, determines the noise integrated in the ADC of the CMOS image sensor and provides an important basis for improving the inherent noise design level of the ADC integrated in the CMOS image sensor.

The invention is described in further detail below with reference to the accompanying drawings:

referring to fig. 6, as shown in fig. 6, which is a flowchart of the present invention, first, an analog voltage value corresponding to 1LSB quantized by the ADC is determined according to an analog signal converted by the ADC, and a time span corresponding to 1LSB is determined according to a working frequency of the ADC counter; then, adding a device noise model to simulate the turnover of the ADC, wherein due to the noise influence of the ADC, the turnover time of the ADC is different, specifically, under the influence of transient noise, the turnover time of the ADC comparator is different under the condition that the ADC comparator outputs the same analog front end value, and if the difference value is in one clock cycle of the counter, the difference of the final counting value is not caused, so that the noise of the CMOS image sensor is not caused; on the contrary, if the difference value is not in one clock cycle of the counter, the difference of the final count value is caused, and the noise of the CMOS image sensor is caused; analyzing the proportion of the span of the ADC turnover difference in the 1LSB time clock period of the whole ADC counter, and determining the probability of no noise; analyzing the probability that the ADC flipping span spans a plurality of LSBs; multiplying the probability of the noise by the noise voltage value to obtain single-point noise; all single point noise is added to the device noise simulation analysis value caused by the inherent noise of the ADC.

The noise influence of ADC makes the same input signal, under the condition of multiple working, the output turnover signal is not in the same time, according to the regulation of "charge coupled imaging device test method" to image sensor noise, the same signal is read for several times, the F frame image value is deviated from the mean value, and defined as noise, and the noise voltage V is_NCalculated from the following formula:

According to the above equation, as shown in fig. 3, the flip interval shift due to noise is analyzed in a single clock cycle as an example. In fig. 3, (a) to (f), although noise causes the flip offset, the flip always causes no output code difference within one LSB clock period, and thus no noise is caused; while the noise of fig. 3(g) - (j) causes the flip-flop offset to cross the LSB, resulting in multiple sampling noise.

As shown in fig. 4, when the clock period is 5ns, the time span of the noise-induced flip difference is 0.8ns, which is 16% of the total clock period. As shown in table 1, a, there is a probability of 84%, the flip does not cause a difference in output code values within one clock cycle, the flip offset is noiseless, corresponding to fig. 5 (a); as shown in table 1 at B, there is a 4% probability that the ADC output code value spans 2 LSBs, including 1 low LSB and 3 high LSBs, corresponding to fig. 5 (B); as shown in table 1 at C, there is a 4% probability that the ADC output code value spans 2 LSBs, where the ADC output code value includes 2 low LSBs and 2 high LSBs, corresponding to fig. 5 (C); as indicated by D in table 1, there is a 4% probability that the ADC output code value spans 2 LSBs, where the ADC output code value includes 3 low LSBs and 1 high LSB, corresponding to fig. 5 (D); as shown by E in table 1, there is a 4% probability that the ADC output code value spans 1LSB, where the ADC output code value includes 0 low LSB and 4 high LSB, corresponding to fig. 5 (E).

TABLE 1 ADC offset induced image sensor noise calculation

In the calculation process, 1.1-2.9V is taken as the analog voltage quantization range of the ADC, and the resolution of the ADC is 2 for 12 bits¹²4096, so the analog voltage amplitude for 1LSB is 400uV, calculated as 1LSB about 400 LSBuV＝(2.9-1.1)/4096)；

B, a calculation method:

let the analog values corresponding to the four code values be 2V, 2V +400uV, respectively, and the mean value be 2V +100uV, so the difference values are 100uV,300uV, respectively, then:

c, a calculation method:

let the analog values corresponding to the four code values be 2V, 2V +400uV, and the mean value be 2V +200uV, so the difference values are 200uV, and 200uV, respectively, then:

d, a calculation method:

let the analog values corresponding to the four code values be 2V, 2V +400uV, 2V +400uV, 2V +400uV, and the mean value be 2V +300uV, so the difference values are 200uV,200uV,200uV, and 200uV, respectively, then

Simulation and theoretical calculations show that the noise introduced by the ADC is about 21.6uV, and the analog voltage amplitude corresponding to 1LSB is 400uV according to the above calculations. Thus, the noise introduced by the ADC is represented by LSB as: 21.6uV/400 uV-0.054 LSB, the number of noisy electrons is further calculated from the conversion of the output code value to electrons.

And noise analysis calculation is carried out according to the theoretical calculation method, and the result is compared with the actual circuit noise test, so that the consistency is good. The ADC intrinsic noise analysis method for the CMOS image sensor has important practical significance in guiding ADC module design, is beneficial to determining a noise range in a design stage, and reduces the whole noise level of a device through noise design improvement. The method is not limited to ADC intrinsic noise analysis integrated in the CMOS image sensor, can also be used for noise analysis of modules such as a programmable gain amplifier, a ramp generator and the like, and is beneficial to determining the whole noise level of the CMOS image sensor in the design stage and guiding design improvement.

The above-mentioned contents are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modification made on the basis of the technical idea of the present invention falls within the protection scope of the claims of the present invention.

Claims

1. An ADC intrinsic noise analysis method for a CMOS image sensor, comprising the steps of:

2. The ADC intrinsic noise analysis method for CMOS image sensor according to claim 1, wherein in step 1), simulation analysis is performed on the inversion of the ADC comparator by using CMOS image sensor noise statistical method according to CMOS image sensor noise definition.

3. The ADC intrinsic noise analysis method according to claim 1, wherein in step 2), if the flip interval offset is distributed in one clock cycle of an ADC counter, no noise is caused.

4. The ADC intrinsic noise analysis method for a CMOS image sensor according to claim 1, wherein the CMOS image sensor noise voltage caused thereby is calculated in step 2), specifically:

5. An ADC intrinsic noise analysis method for a CMOS image sensor, comprising the steps of:

3) determining a probability of being noise free;

6. The ADC intrinsic noise analysis method for a CMOS image sensor according to claim 5, wherein the analog voltage value corresponding to 1LSB quantized by the ADC is determined according to the analog signal converted by the ADC in the step 1).

7. The ADC intrinsic noise analysis method for a CMOS image sensor according to claim 5, wherein the time span corresponding to 1LSB is determined according to the working frequency of the ADC counter in step 1).

8. The ADC intrinsic noise analysis method for a CMOS image sensor according to claim 5, wherein the probability of ADC switching interval offset within 1LSB time clock period is calculated in step 2) to determine the probability of no noise.

9. The ADC intrinsic noise analysis method for a CMOS image sensor according to claim 5, wherein the probability that the ADC roll-over interval offset spans a plurality of LSBs is calculated in step 2), and the probability of generating noise is determined.