CN112420970A - Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device - Google Patents
Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device Download PDFInfo
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Abstract
The invention provides a method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro display device, which belongs to an etching method for protecting the side wall by etching back during silver wet etching, and the method can reduce the CD loss of Ag wet etching from 1 mu m to less than 0.1 mu m, greatly improve the precision of the Ag wet etching, enable the anode to adopt an Ag structure, effectively improve the reflectivity of the anode and greatly improve the luminous efficiency of the device.
Description
Technical Field
The invention belongs to the field of silicon-based Micro OLED Micro display, and particularly relates to a method for protecting and etching an anode side wall of a silicon-based Micro OLED Micro display device.
Background
In order to meet the requirement of high PPI, the anode structure of the silicon-based Micro OLED Micro display device meets the requirement of a high-precision process. The high-precision process is completed by matching photoetching with etching, and because the wet etching has larger CD loss and the precision is far worse than that of the dry etching, the current anode etching is carried out by adopting the dry etching process. In order to match with the dry etching process, the anode material needs to be a material easy to dry etch, and the anode material needs to have the properties of high work function, high reflectivity, good conductivity and the like, so the prior anode structure is preferably an ITO + Al + TiN structure. The structure is easy to dry etch, can meet the requirement of high PPI, but has slightly low reflectivity of about 91 percent, and is not an optimal structure. If Ag is adopted to replace anode Al and an ITO + Ag + ITO structure is adopted, the reflectivity can reach 98%, and the luminous efficiency of the device can be greatly improved. However, the difficulty of dry etching of Ag is high, mass production is not feasible, and the requirement of high-precision process cannot be met due to the large CD loss of wet etching.
Disclosure of Invention
The invention provides a method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro display device, which belongs to an etching method for protecting the side wall by etching back during silver wet etching, and the method can reduce the CD loss of Ag wet etching from 1 mu m to less than 0.1 mu m, greatly improve the precision of the Ag wet etching, enable the anode to adopt an Ag structure, effectively improve the reflectivity of the anode and greatly improve the luminous efficiency of the device.
The specific technical scheme of the invention is as follows:
a method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro-display device comprises the following steps:
1) photoetching the substrate 1 with the anode structure coated with ITO + Ag + ITO to perform anode graphical definition to obtain a substrate 2;
2) wet etching of the upper ITO and Ag layer is carried out on the substrate 2 to obtain a substrate 3;
3) the substrate 3 is deposited with a SiN film layer to obtain a substrate 4;
4) etching the substrate 4 by adopting a dry etching back etching process, and reserving the SiN film layer on the side wall of the anode to obtain a substrate 5;
5) and (3) carrying out wet etching on the lower layer of ITO on the substrate 5, and then removing the photoresist to obtain a substrate 6.
Further, in step 1), the substrate 1: the film layer structure is made of ITO + Ag + ITO, the thickness of the upper ITO layer and the lower ITO layer is controlled to be 100A +/-50A, the thickness of the upper ITO layer and the lower ITO layer is the same, and the thickness of the Ag film is controlled to be 1000A +/-500A;
the preparation method of the substrate 1 comprises the following steps: firstly plating an ITO layer on a substrate, then plating an Ag layer, and finally plating an ITO layer.
Further, platingThe ITO layer process parameters are selected as follows: DC sputtering power is 1000W + -200W, process pressure is 5.6mtorr + -0.5 mtorr, process gas is selected from Ar: 20 sccm. + -. 5sccm, O2: 2sccm +/-0.5 sccm; the upper and lower layers of ITO films have the same coating process.
The Ag film forming process parameters are selected as follows: DC sputtering power is 5000W +/-300W, process pressure is 5.6mtorr +/-0.5 mtorr, process gas is selected from Ar: 20 sccm. + -.3 sccm.
The photoetching in the step 1) specifically comprises the following steps: selecting I-line wet etching glue as a mask, selecting 1000rpm +/-200 rpm of gluing rotation speed, and controlling the glue thickness to be 2.5 mu m +/-0.3 mu m; the soft drying temperature is selected to be 90 +/-5 ℃, and the time is selected to be 60 +/-6 s; the exposure time is 350ms +/-50 ms, and the light intensity is 550mw/c square meter +/-50 mw/c square meter; the developing time is 60s +/-15 s, the developing solution is TMAH solution with the concentration of 2.38%, and the curing temperature is 120 +/-10 ℃.
In the step 2), wet etching is carried out, wherein etching liquid adopts nitrifying mixed acid which is mixed acid of nitric acid, phosphoric acid and acetic acid and is a commercially available product, and the upper ITO and Ag film etching is completed by utilizing the nitrifying mixed acid.
In the step 2), the etching rate of the nitrated mixed acid to ITO is 5A/s, the etching rate to Ag is 250A/s, the selection ratio is high, the etching time of the upper ITO and Ag is controlled to be 12-36s, the etching of the upper ITO and Ag can be completed, and the substrate does not etch the lowest ITO (the over etching can be controlled to be less than 10A).
Further, in the step 3), the SiN film layer is deposited by adopting a CVD (chemical vapor deposition) mode to form a film, the SiN film layer is selected as the film layer, and the thickness is controlled to be 40nm +/-10 nm.
Specifically, the CVD film forming process parameters in the step 3) are as follows: the power is 800W + -50W, the pressure is 1000mT + -10 mT, the temperature is 70 deg.C + -5 deg.C, and the gas is NH3The flow rate is 240sccm +/-15 sccm, the film forming time is controlled within 16s +/-2 s, and the thickness of the SiN film can be controlled within 40nm +/-10 nm.
In the step 4), dry etching is adopted for etching back etching process, SiN is reserved on the side wall of the anode after back etching, and the surface of the anode and the channel are free of SiN residues;
specifically, the dry etching process comprises the following steps of: the power source power is selected to be 200W +/-10W, and the Bias power is selected to be 40W +/-5w, etching gas selection CF4The flow is 20sccm +/-5 sccm, the pressure is 10mT +/-3 mT, the temperature is 25 +/-5 ℃, and the time is 20s +/-3 s, so that the anode surface and the channel SiN can be completely etched, and the SiN on the anode side wall is ensured to be reserved.
CF4The gas dry etching only etches SiN and does not damage ITO and Ag layers excessively.
In the step 5), performing ITO wet etching on the substrate 5, wherein the nitrated mixed acid is a mixed acid of nitric acid, phosphoric acid and acetic acid, and is a commercially available product, and etching of the lower layer of ITO is completed; wet etching is carried out at 25 +/-5 ℃ for 11-31 s;
when the nitrified mixed acid is used for etching the bottom ITO, the SiN is protected on the side wall of the Ag, and the nitrified mixed acid does not etch the SiN, so that the Ag layer is not etched in the process of etching the bottom ITO.
Further, in the step 5), the photoresist is removed by a wet method, the photoresist removing solution is NMP, and the photoresist is removed by spraying and soaking for 200s or 600 s. The temperature was selected to be 50 ℃. + -. 5 ℃. The photoresist can be removed.
The SiN on the side wall can not be removed, and the performance of a product device is not influenced.
Further, the side wall SiN is selectively removed, and the removal mode adopts dry etching: the power source power is selected to be 600W +/-20W, the Bias power is selected to be 15W +/-2W, and the etching gas is selected to be CF4Flow rate of 50sccm + -5 sccm, CHF3The flow is 10sccm +/-2 sccm, the pressure is 10mT +/-3 mT, the temperature is 25 +/-3 ℃, and the time is 20s +/-3 s, so that the etching of the side wall SiN can be completed without damaging the anode part.
Compared with the prior art, the substrate 6 finishes the side wall protection, when the lower layer ITO is etched, the side etching to Ag is avoided, the CD loss can be smaller than 0.1 mu m, the etching precision can be controlled, and the target pattern can be obtained.
Drawings
Fig. 1 is a schematic structural view of a substrate 1;
fig. 2 is a schematic structural view of the substrate 2;
FIG. 3 is a schematic structural diagram of a substrate 3;
FIG. 4 is a schematic structural diagram of the substrate 4;
FIG. 5 is a schematic structural diagram of the substrate 5;
FIG. 6 is a schematic structural diagram of the substrate 6;
FIG. 7 is a schematic diagram of a prior art etch;
FIG. 8 is an SEM photograph of the product of example 1;
FIG. 9 is an SEM photograph of a product of comparative example 1;
in the figure, 1-Ag layer, 2-upper ITO layer and 3-lower ITO layer; a 4-PR layer; 5-SiN layer.
Detailed Description
Example 1
A method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro-display device comprises the following steps:
1) firstly plating an ITO layer on a substrate, then plating an Ag layer, and finally plating an ITO layer; the film layer structure is made of ITO + Ag + ITO, the thickness of the upper ITO layer and the lower ITO layer is controlled to be 100A, the thickness of the Ag layer is controlled to be 1000A, and a substrate 1 is obtained; the specific coating process parameters are as follows: firstly, plating a lower layer ITO film on a substrate, wherein the DC sputtering power is 1000W, the process pressure is 5.6mtorr, and the process gas is selected from Ar: 20sccm, O2: 2 sccm; plating an Ag film, wherein the process parameters are selected as follows: the DC sputtering power is 5000W, the process pressure is 5.6mtorr, and the process gas is selected from Ar: controlling the Ag film thickness to be 1000A at 20 sccm; finally, an upper ITO film is plated, the plating process is the same as that of the lower ITO film, and the thickness is also 100A; obtaining a substrate 1, the structure schematic diagram is shown in fig. 1;
photoetching the substrate 1 coated with the ITO + Ag + ITO of the anode structure to perform anode graphical definition, selecting I-line wet etching glue as a mask, selecting 1100rpm as a glue coating rotating speed, and controlling the glue thickness to be 2.6 mu m; selecting the soft drying temperature to be 90 ℃ and the time to be 65 s; the exposure time is selected to be 320ms, and the light intensity is selected to be 550mw/c square meter; the developing time is selected to be 60s, TMAH solution with the concentration of 2.38% is selected as the developing solution, and the curing temperature is selected to be 120 ℃ to obtain the substrate 2; the structure of the substrate 2 is schematically shown in fig. 2;
2) wet etching of the upper ITO and Ag layer is carried out on the substrate 2, etching liquid is mixed nitrated acid (nitric acid, phosphoric acid and acetic acid) and is a commercially available product, etching is carried out for 24s, etching of the upper ITO and Ag film is completed, and a substrate 3 is obtained, wherein the structural schematic diagram is shown in FIG. 3;
3) the substrate 3 adopts a CVD mode to deposit the SiN film layer, and the CVD film forming technological parameters are as follows: the power is 780W, the pressure is 1000mT, the temperature is 70 ℃, and the gas is NH3The flow rate is 250sccm, the film forming time is controlled at 18s, and the SiN film thickness is controlled at 40nm, so as to obtain a substrate 4, wherein the schematic structural diagram is shown in FIG. 4;
4) and (3) carrying out back etching process by adopting dry etching to etch the substrate 4, wherein the dry etching process is selected, and the power is selected: the source power is 210W, the Bias power is 40W, and the etching gas is CF4The flow is 22sccm, the pressure is 8mT, the temperature is 25 ℃, the time is 20s, SiN is reserved on the side wall of the anode after back etching, and the surface of the anode and the channel have no SiN residue; obtaining a substrate 5, the schematic structural diagram of which is shown in fig. 5;
5) carrying out ITO wet etching on the substrate 5, selecting nitrified mixed acid (nitric acid, phosphoric acid and acetic acid) as an etching liquid, etching for 21s at 25 ℃ to finish etching the lower layer of ITO; removing the side wall SiN in a dry etching mode: the power source power is selected to be 600W, the Bias power is selected to be 15W, and the etching gas is selected to be CF4Flow rate of 50sccm, CHF3The flow is 10sccm +/-2 sccm, the pressure is 10mT, the temperature is 25 ℃, the time is 20s, and the etching of the side wall SiN can be completed without damaging the anode part. Removing the photoresist by adopting a wet method, wherein NMP is selected as a photoresist removing liquid, and spraying is adopted for 200 s; and (3) obtaining a substrate 6, namely completing the process, wherein a schematic diagram is shown in FIG. 6, the substrate 5 completes the side wall protection, when the lower layer ITO is etched in the step 5), the lateral etching to Ag is avoided, the CD loss is 0.09 mu m, and an SEM image of a product is shown in FIG. 8.
Comparative example 1
A method for etching a silicon-based Micro OLED Micro-display device comprises the following steps:
1) firstly plating an ITO layer on a substrate, then plating an Ag layer, and finally plating an ITO layer; the film layer structure is made of ITO + Ag + ITO, the thickness of the upper ITO layer and the lower ITO layer is controlled to be 100A, the thickness of the Ag layer is controlled to be 1000A, and a substrate 1 is obtained; photoetching and defining the anode structure ITO + Ag + ITO coated substrate 1 to obtain a substrate 2 by anode graphical definition, wherein the specific preparation method is the same as the step 1) of the embodiment 1;
2) and (3) carrying out wet etching on the substrate 2, wherein the etching solution is a commercial product selected from mixed nitrating acid (nitric acid, phosphoric acid and acetic acid), the etching time is 44s, the schematic diagram of the etched product is shown in FIG. 7, the SEM image of the product is shown in FIG. 9, and the CD loss is 1.1 μm.
Claims (10)
1. A method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro-display device is characterized by comprising the following steps:
1) photoetching the substrate 1 with the anode structure coated with ITO + Ag + ITO to perform anode graphical definition to obtain a substrate 2;
2) wet etching of the upper ITO and Ag layer is carried out on the substrate 2 to obtain a substrate 3;
3) the substrate 3 is deposited with a SiN film layer to obtain a substrate 4;
4) etching the substrate 4 by adopting a dry etching back etching process, and reserving the SiN film layer on the side wall of the anode to obtain a substrate 5;
5) and (3) carrying out wet etching on the lower layer of ITO on the substrate 5, and then removing the photoresist to obtain a substrate 6.
2. The method according to claim 1, characterized in that in step 1), the substrate 1: the film layer structure is made of ITO + Ag + ITO, the thickness of the upper ITO layer and the lower ITO layer is controlled to be 100A +/-50A, the thickness of the upper ITO layer and the thickness of the lower ITO layer are the same, and the thickness of the Ag film is controlled to be 1000A +/-500A.
3. The method according to claim 1, characterized in that the method for preparing the substrate 1: firstly plating an ITO layer on a substrate, then plating an Ag layer, and finally plating an ITO layer.
4. The method according to claim 3, wherein the ITO coating process parameters are selected as follows: DC sputtering power is 1000W + -200W, process pressure is 5.6mtorr + -0.5 mtorr, process gas is selected from Ar: 20 sccm. + -. 5sccm, O2: 2sccm +/-0.5 sccm; the upper and lower layers of ITO films have the same coating process.
5. The method according to claim 3 or 4, wherein the Ag film forming process parameters are selected as follows: DC sputtering power is 5000W +/-300W, process pressure is 5.6mtorr +/-0.5 mtorr, process gas is selected from Ar: 20 sccm. + -.3 sccm.
6. The method according to claim 3, characterized in that the lithography in step 1) is in particular: selecting I-line wet etching glue as a mask, selecting 1000rpm +/-200 rpm of gluing rotation speed, and controlling the glue thickness to be 2.5 mu m +/-0.3 mu m; the soft drying temperature is selected to be 90 +/-5 ℃, and the time is selected to be 60 +/-6 s; the exposure time is 350ms +/-50 ms, and the light intensity is 550mw/c square meter +/-50 mw/c square meter; the developing time is 60s +/-15 s, the developing solution is TMAH solution with the concentration of 2.38%, and the curing temperature is 120 +/-10 ℃.
7. The method as claimed in claim 1, wherein in the step 2), the etching time of the upper ITO + Ag layer is controlled to be 12-36 s.
8. The method according to claim 1, wherein the SiN film is deposited on the substrate 3 in the step 3), and the CVD is adopted for film formation, and the process parameters are as follows: the power is 800W + -50W, the pressure is 1000mT + -10 mT, the temperature is 70 deg.C + -5 deg.C, and the gas is NH3The flow rate is 240sccm +/-15 sccm, the film forming time is controlled within 16s +/-2 s, and the thickness of the SiN film can be controlled within 40nm +/-10 nm.
9. The method according to claim 1 or 4, characterized in that, in the step 4), the etching is performed by a back etching process by dry etching, and the dry etching process is that the power is selected as follows: the power source power is 200W +/-10W, the Bias power is 40W +/-5W, and the etching gas is CF4The flow rate is 20sccm + -5 sccm, the pressure is 10mT + -3 mT, the temperature is 25 deg.C + -5 deg.C, and the time is 20s + -3 s.
10. The method according to claim 1 or 4, characterized in that in step 5), the sidewall SiN is removed after wet etching of the lower ITO layer, and the removal mode is dry etching: the power source power is selected to be 600W +/-20W, the Bias power is selected to be 15W +/-2W, and the etching gas is selected to be CF4Flow rate ofAt 50sccm + -5 sccm, CHF3The flow rate is 10sccm + -2 sccm, the pressure is 10mT + -3 mT, the temperature is 25 deg.C + -3 deg.C, and the time is 20s + -3 s.
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