CN112399104B

CN112399104B - Global exposure low-noise high-speed three-dimensional sensor phase-locked pixel and reading mode

Info

Publication number: CN112399104B
Application number: CN201910750469.XA
Authority: CN
Inventors: 徐江涛; 史晓琳
Original assignee: Tianjin University Marine Technology Research Institute
Current assignee: Tianjin University Marine Technology Research Institute
Priority date: 2019-08-14
Filing date: 2019-08-14
Publication date: 2023-06-16
Anticipated expiration: 2039-08-14
Also published as: CN112399104A

Abstract

A global exposure low-noise high-speed three-dimensional sensor phase-locked pixel and a reading mode; the dual-input high-speed column parallel ADC mainly comprises NMOS (N-channel metal oxide semiconductor) tubes M1-M3, photodiodes Photo-detectors, NMOS tubes SF 1-SF 3, NMOS tubes Msel 1-Msel 3, tail current sources I1 and I2 and dual-input high-speed column parallel ADCs; the pixel can adopt a global exposure mode, and can effectively inhibit image distortion; the readout process of the pixel is similar to that of a 4T pixel in a common image sensor, and the correlated double sampling technique can be used to suppress reset noise. The photosensitive part in the pixel adopts a novel structure, so that the charge transfer efficiency can be effectively promoted, and the imaging frame frequency can be improved.

Description

Global exposure low-noise high-speed three-dimensional sensor phase-locked pixel and reading mode

Technical Field

The invention relates to the field of image sensors, in particular to a phase-locked pixel and a reading mode of a three-dimensional sensor capable of realizing global exposure, low noise and high speed.

Background

The sensor is used as the extension of human sense, and the accurate and reliable acquisition and conversion of external information are realized. CMOS image sensors play an important role in various fields. In recent years, the demand for three-dimensional image sensors has increased, and the three-dimensional image sensors can be used for three-dimensional reconstruction, automatic processing, height measurement and the like in the industrial field; the method can be used for unmanned aerial vehicle investigation, submarine underwater navigation, interstar telemetry imaging and the like in the military field; the automobile can be used for unmanned driving and auxiliary driving in the automobile field; in consumer electronics, applications are in motion sensing games, gesture recognition, etc. Three-dimensional image sensors based on time of flight (ToF) have a broader application prospect due to the simpler imaging system. The principle of the 3D image sensor based on square wave modulated optical signals is shown in fig. 1, the light source generator emits modulated optical signals, after the round trip distance delay, the phase reaching the detector changes, and the target distance information L is calculated according to the formula 1 by measuring the change of the modulated light flight time Tflight, namely

According to the measurement principle of the flight time, three or four times of sampling are needed to be completed in one light wave modulation period to obtain phase change information, a three-phase integral schematic diagram is shown in fig. 2, the modulation light period is Tmod, three phases are respectively 0, tmod/3 and 2Tmod/3, integral results at the three phases are respectively Q1, Q2 and Q3, and further distance information is obtained through calculation. The detected distance can be obtained from the integration result as shown in equation 2:

when the phase change information is acquired, each phase of the reflected light signal needs to be sampled and accumulated multiple times to reduce the error. If a sampling signal of one phase is read for each frame, three or four frames are sampled continuously, the frame frequency is inevitably reduced, and the imaging quality is obviously reduced when a moving object is shot. Meanwhile, a roller exposure mode is often adopted because the traditional three-dimensional image sensor is influenced by the speed of a reading circuit. In this exposure mode, the exposure process of the conventional three-dimensional image sensor is similar to that of the 3T pixel in the general image sensor, and thus reset noise in the pixel cannot be suppressed, resulting in a decrease in sensor accuracy.

Disclosure of Invention

Aiming at the problems existing in the prior art, the invention provides a phase-locked pixel and a reading mode of a global exposure low-noise high-speed three-dimensional sensor. The pixel can adopt a global exposure mode, and can effectively inhibit image distortion. The readout process of the pixel is similar to that of a 4T pixel in a common image sensor, and the correlated double sampling technique can be used to suppress reset noise. The photosensitive part in the pixel adopts a novel structure, so that the charge transfer efficiency can be effectively promoted, and the imaging frame frequency can be improved.

As shown in FIG. 3, the phase-locked pixel structure of the global exposure low-noise high-speed three-dimensional sensor mainly comprises NMOS (N-channel metal oxide semiconductor) tubes M1-M3, photodiodes Photo-detector, NMOS tubes SF 1-SF 3, NMOS tubes Msel 1-Msel 3, tail current sources I1 and I2 and dual-input high-speed column parallel ADC; the connection relation of each component is as follows: the drains of the NMOS tubes M1-M3 are connected with a power supply VDD, the gates are connected with RST signals, and the sources are respectively connected with FD 1-FD 3 of the photodiodes Photo-detector; the drains of the NMOS tubes SF 1-SF 3 are connected with a power supply VDD, the gates are respectively connected with FD 1-FD 3 of the photodiodes Photo-detector, and the sources are respectively connected with the drains of the NMOS tubes Msel 1-Msel 3; the gates of NMOS transistors Msel 1-Msel 3 are respectively connected with control signals Sel 1-Sel 3, the source of Msel1 is connected with the source of Msel2, and meanwhile, the positive end of a tail current source I1 and the vin+ end of a high-speed column parallel ADC are connected, and the source of Msel3 is connected with the positive end of the tail current source I2 and the Vin-end of the high-speed column parallel ADC. The negative terminals of the current sources I1, I2 are both connected to ground.

The implementation method of the phase-locked pixel structure of the global exposure low-noise high-speed three-dimensional sensor comprises the following steps: in order to improve the transfer efficiency and speed of photo-generated charges in the pixels, the transfer of charges is accelerated by a method of constructing an internal electric field. The photosensitive area adopts a comb-shaped PPD structure to accelerate the transfer speed of photo-generated charges in the PPD area to the FD area, and the problem of incomplete charge transfer in the integral time is avoided. The pixel adopts a structure with three single-side FD, and the nodes FD1, FD2 and FD3 can collect photo-generated charges at three different phases, so that all phase difference information required by the pixel is directly output within one frame time, and further depth information is acquired, thereby effectively improving the imaging speed of the sensor.

The implementation method of the low-error phase-locked pixel comprises the following steps: from the error transfer function, it is possible to obtain:

wherein A is the maximum light intensity after the modulated light is reflected, B is the background light intensity, N is the integration times, and c is the light speed. The detection errors of the method for obtaining the depth information by the three phases and the four phases are respectively calculated according to the deduction of the detection distance error transfer function formula 3, and the method for obtaining the depth information by the three phases is smaller in detection errors compared with the four phases as shown in the formulas 4 and 5.

By means of the timing control as shown in fig. 4, two sets of source follower circuits realize spatial double sampling readout. The kTC noise introduced by the reset circuit can be effectively reduced through the optimized reset time sequence. The fully differential CDS circuit is adopted to perform double sampling operation in time, so that the non-uniformity of the source follower is effectively reduced, and the reset noise and the non-uniformity of the pixels can be effectively reduced by adopting the structure.

The phase-locked pixel and the readout mode of the global exposure low-noise high-speed three-dimensional sensor have the advantages of faster imaging performance, higher imaging precision and lower kTC noise, and further enlarge the application occasions of the 3D image sensor.

Drawings

FIG. 1 is a schematic diagram of a 3D image sensor based on square wave modulated optical signals;

FIG. 2 is a schematic diagram of three-phase integration based on a time-of-flight three-dimensional image sensor;

FIG. 3 is a diagram showing a phase-locked pixel structure and a readout circuit of a low-noise high-speed three-dimensional image sensor using a global exposure mode;

fig. 4 is a readout circuit control timing of the proposed pixel structure;

FIG. 5 is a schematic diagram of a two-stage Cyclic ADC used in the examples; FIG. 6 is a timing diagram of the operation of the two-stage Cyclic ADC used in the example.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more clear, a specific description of embodiments of the present invention will be given below with reference to examples.

In this example, the invention designs square waves with pixel sizes of 10um×10um, a fill factor of 40%, FD 1-FD 3 sizes of 1.5 um2, a modulated light source with a duty cycle of 1:3, a period tmod=250 ns, and an average power of 1W. The readout circuit adopts a two-input two-stage 14-bit Cyclic ADC schematic diagram as shown in FIG. 5, and the overall data conversion rate is 100KSPS. The control time sequence of the two-stage Cyclic ADC adopted by the invention is shown in figure 6, for the first-stage Cyclic ADC, the acquisition of CDS output signals is completed, the quantification of the highest bit is completed at the same time, and after 5 times of circulation, the first-stage Cyclic ADC completes the data conversion of the high 5 bits. And when the first-stage Cyclic ADC performs the 5 th cycle, the second-stage Cyclic ADC starts to sample the output signal of the first-stage Cyclic ADC, and the low-9-bit data conversion is completed after 9 cycle periods. The data conversion of the first-stage Cyclic ADC and the second-stage Cyclic ADC is carried out in a pipeline form, so that the conversion time of the first stage is equal to the conversion time of the second stage, namely the conversion time of the whole ADC. The Cyclic ADC adopted by the invention realizes half-cycle data conversion by adding one sampling capacitor, namely, 1bit data conversion can be completed in each half clock period, so that the integral ADC only needs 2.5 clock periods for completing one complete data conversion. Each cycle time of the first stage Cyclic ADC is set to 25ns; the signal sampling time of the second stage Cyclic ADC is 35s, and then each cycle time is 10ns. The invention can realize the output frame frequency of 60fps and effectively reduce the noise of 500uV.

Claims

1. A global exposure low noise high speed three dimensional sensor phase locked pixel, characterized by: the dual-input high-speed column parallel ADC mainly comprises NMOS (N-channel metal oxide semiconductor) tubes M1-M3, photodiodes Photo-detectors, NMOS tubes SF 1-SF 3, NMOS tubes Msel 1-Msel 3, tail current sources I1 and I2; the drains of the NMOS tubes M1-M3 are connected with a power supply VDD, the gates are connected with RST signals, and the sources are respectively connected with FD 1-FD 3 of the photodiodes Photo-detector; the drains of the NMOS tubes SF 1-SF 3 are connected with a power supply VDD, the gates are respectively connected with FD 1-FD 3 of the photodiodes Photo-detector, and the sources are respectively connected with the drains of the NMOS tubes Msel 1-Msel 3; the gates of NMOS transistors Msel 1-Msel 3 are respectively connected with control signals Sel 1-Sel 3, the source of Msel1 is connected with the source of Msel2, and meanwhile, the positive end of a tail current source I1 and the vin+ end of a high-speed column parallel ADC are connected, and the source of Msel3 is connected with the positive end of the tail current source I2 and the Vin-end of the high-speed column parallel ADC; negative terminals of the current sources I1 and I2 are connected with the ground;

accelerating the transfer of charge by constructing an internal electric field; the photosensitive area adopts a comb-shaped PPD structure to accelerate the transfer speed of photo-generated charges in the PPD area to the FD area; the pixel adopts a structure of three single-side FD, and the nodes FD1, FD2 and FD3 can collect photo-generated charges at three different phases;

from the error transfer function, it is possible to obtain:

wherein A is the maximum light intensity after the modulated light is reflected, B is the background light intensity, N is the integration times, and c is the light speed; the detection errors of the method for obtaining depth information by three phases and four phases are respectively calculated according to the deduction of the detection distance error transfer function formula 3, and are shown in the following formulas 4 and 5:

through time sequence control, two sets of source-level follower circuits realize spatial double sampling readout.