CN112394837A - Automatic impedance detection method applied to panel - Google Patents
Automatic impedance detection method applied to panel Download PDFInfo
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- CN112394837A CN112394837A CN202011287148.XA CN202011287148A CN112394837A CN 112394837 A CN112394837 A CN 112394837A CN 202011287148 A CN202011287148 A CN 202011287148A CN 112394837 A CN112394837 A CN 112394837A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
- G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2284—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by power-on test, e.g. power-on self test [POST]
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Abstract
The invention discloses an automatic impedance detection method applied to a panel, which comprises the following steps: step one, switching on a power supply; step two, when the detection and judgment are needed, the detection mode is entered by the instruction control; step three, sending different VREF voltages; step four, logical judgment; screening good products with impedance meeting the specification and defective products with impedance not meeting the specification; and step six, entering a GND mode. The invention has the advantages that: the electronic signal is conveniently and quickly judged whether to be normal or not by different IC instruction operations through direct measurement of the display drive IC of the display panel without using an external jig and an electric meter, and the direct automatic measurement can be realized even if the surfaces of a touch screen and the like are constructed and attached.
Description
Technical Field
The invention relates to an automatic impedance detection method applied to a panel, and belongs to the technical field of automatic detection of liquid crystal displays.
Background
In the current IPS technology, the upper surface of the Color filter needs to be plated with the whole Back-side ITO (BS-ITO), and the layer of ITO is connected with the grounding pad of the lower glass through the Ag paste so as to be communicated with the GND of the system, so that the external ESD or electric field interference is prevented, the shield effect is achieved, and the stability of the system is improved.
The grounding of BS-ITO directly affects the shield effect, for the conditions of monitor BS-ITO impedance and Ag pass process, a display panel factory uses a universal meter to measure the impedance of BS-ITO to system GND, and pass can be performed when the resistance is smaller than a certain limit value.
However, the current testing method faces the following 2 problems: firstly, an external jig and an electric meter are needed during measurement, and the equipment is complicated to build; in the second subsequent process, the surface of the display panel is attached with components such as a touch screen, and then if the impedance value of the BS-ITO to the GND needs to be detected, only the upper surface component is removed, and direct testing cannot be carried out.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a method for automatically detecting BSITO impedance applied to a liquid crystal display without using an external jig and an electric meter.
The invention is realized by the following scheme: an automatic impedance detection method applied to a panel is characterized in that: which comprises the following steps:
step one, switching on a power supply;
step two, when the detection and judgment are needed, the detection mode is entered by the instruction control;
step three, sending different VREF voltages;
step four, logical judgment;
screening good products with impedance meeting the specification and defective products with impedance not meeting the specification;
and step six, entering a GND mode.
The electronic signals are directly measured by the driving IC of the display panel and are judged to be normal or not by different IC command operations.
One side of the BSITO is directly connected with the GND of the system, the other side of the BSITO is connected with the pad, and the two sides of the BSITO are connected with the GND of the system together.
The automatic detection system is composed of a plurality of switching tubes and resistors.
The added elements are arranged inside the glass of the liquid crystal display, or arranged inside the driver, or in a mode of adopting an external device.
The automatic detection system has two modes, namely a GND normal mode and a detection mode.
The impedance of BS-ITO to ground, RBSITO, is calculated by the following formula:
where R1 is known, and Vbisto and Vin are input values, also known.
Software generates different VREF voltage values through automatic control to be compared with VBSITO, and then the BS-ITO grounding impedance can be calculated.
In the sense mode case, the VIN signal is used.
The invention has the beneficial effects that: the electronic signal is conveniently and quickly judged whether to be normal or not by directly measuring through a display driving IC of a display panel without using an external jig and an ammeter through different IC instruction operations, even if surfaces such as a touch screen and the like are constructed and attached, the electronic signal can be directly and automatically measured, meanwhile, the BS-ITO grounding pad on the other side is added, the two sides are connected with the GND of the system together, the BS-ITO has lower grounding resistance, and the shield effect is better.
Drawings
FIG. 1 is a flow chart of the automatic detection of the present invention.
Fig. 2 is a schematic view of embodiment 1.
Fig. 3 is a schematic view of embodiment 2.
Fig. 4 is a schematic view of embodiment 3.
Detailed Description
The invention is further described below with reference to fig. 1-4, without limiting the scope of the invention.
In the following description, for purposes of clarity, not all features of an actual implementation are described, well-known functions or constructions are not described in detail since they would obscure the invention with unnecessary detail, it being understood that in the development of any actual embodiment, numerous implementation details must be set forth in order to achieve the developer's specific goals, such as compliance with system-related and business-related constraints, changing from one implementation to another, and it being recognized that such development effort might be complex and time consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art.
An automatic impedance detection method applied to a panel comprises the following steps:
step one, switching on a power supply;
step two, when the detection and judgment are needed, the detection mode is entered by the instruction control;
step three, sending different VREF voltages;
step four, logical judgment;
screening good products with impedance meeting the specification and defective products with impedance not meeting the specification;
and step six, entering a GND mode.
As shown in fig. 1, when measurement is needed, the detection mode is entered by command control, and the mode is normally GND.
Example 1: as shown in fig. 2, 4 NMOS transistors Q1, Q2, Q3, Q4, and 1 resistor R1 are added, and these added elements may be, but are not limited to, laid out inside the glass of the liquid crystal display, may be directly made inside the driver, or may adopt a plug-in device manner, where the example of laying out inside the glass of the liquid crystal display is taken to illustrate a specific implementation manner.
Because the impedance of the normal BS-ITO to the GND is in the order of magnitude of K omega, the resistor R1 on the display panel can reach the level of K omega by using an ITO snake-shaped routing, the NMOS tube Q1-Q4 and the TFT in the glass surface are generated together without an additional array process, and the impedance of the BS-ITO to the GND is equivalent to RBSITO.
The automatic detection system has two working modes:
the GND mode comprises VC 1H, VC 2L, Q2, Q3 on, Q1, Q4 off and BS-ITO grounding;
detection mode: VC1 ═ L, VC2 ═ H, Q2, Q3 off, Q1, Q4 on, and BS-ITO impedance was measured.
R1 is known, Vbisto and Vin are input values, and the values are also known, so the BS-ITO impedance to ground or RBSITO can be calculated by the following formula
Software generates different VREF voltage values through automatic control to be compared with VBSITO, and then the BS-ITO grounding impedance can be calculated.
Embodiment 2, as shown in fig. 3, since the control signals VC1 and VC2 are inverse to each other, the second embodiment of fig. 3 can be derived, omitting the control signal output by a display driver IC, and VC1 generates the original VC2 signal through the inverter formed by NMOS-Q5 and PMOS-Q6, and the rest of the operation is the same as that of embodiment 1.
Example 3: as shown in fig. 4, since the VIN signal is only used in the detection case, the third embodiment may be derived, and a control signal output by the display driver IC is omitted, as shown in fig. 4, VIN generates original VC1 through the inverter formed by NMOS-Q5 and PMOS-Q6, and VIN generates original VC2 through the inverter formed by NMOS-Q7 and PMOS-Q8, and the rest of the operation is the same as that of embodiment 1.
Although the invention has been described and illustrated in some detail, it should be understood that various modifications may be made to the described embodiments or equivalents may be substituted, as will be apparent to those skilled in the art, without departing from the spirit of the invention.
Claims (9)
1. An automatic impedance detection method applied to a panel is characterized in that: which comprises the following steps:
step one, switching on a power supply;
step two, when the detection and judgment are needed, the detection mode is entered by the instruction control;
step three, sending different VREF voltages;
step four, logical judgment;
screening good products with impedance meeting the specification and defective products with impedance not meeting the specification;
and step six, entering a GND mode.
2. The method of claim 1, wherein the method comprises: the electronic signals are directly measured by the driving IC of the display panel and are judged to be normal or not by different IC command operations.
3. The method of claim 1, wherein the method comprises: one side of the BSITO is directly connected with the GND of the system, the other side of the BSITO is connected with the pad, and the two sides of the BSITO are connected with the GND of the system together.
4. The method of claim 1, wherein the method comprises: the automatic detection system is composed of a plurality of switching tubes and resistors.
5. The method of claim 4, wherein the method comprises: the added elements are arranged inside the glass of the liquid crystal display, or arranged inside the driver, or in a mode of adopting an external device.
6. The method of claim 4, wherein the method comprises: the automatic detection system has two modes, namely a GND normal mode and a detection mode.
7. The method of claim 4, wherein the method comprises: the impedance of BS-ITO to ground, RBSITO, is calculated by the following formula:
where R1 is known, and Vbisto and Vin are input values, also known.
8. The method of claim 4, wherein the method comprises: software generates different VREF voltage values through automatic control to be compared with VBSITO, and then the BS-ITO grounding impedance can be calculated.
9. The method of claim 4, wherein the method comprises: in the sense mode case, the VIN signal is used.
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| CN202011287148.XA CN112394837A (en) | 2020-11-17 | 2020-11-17 | Automatic impedance detection method applied to panel |
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| CN202011287148.XA CN112394837A (en) | 2020-11-17 | 2020-11-17 | Automatic impedance detection method applied to panel |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101846712A (en) * | 2010-04-01 | 2010-09-29 | 苏州崴展电子科技有限公司 | ITO (Indium Tin Oxide) electrical characteristic detecting method and detecting system of capacitance type touch screen |
| US20150124979A1 (en) * | 2013-11-01 | 2015-05-07 | Real Tek Semiconductor Corporation | Impedance detecting device and method |
| JP2015142152A (en) * | 2014-01-27 | 2015-08-03 | 旭化成エレクトロニクス株式会社 | Trigger detection circuit and trigger detection ic chip |
| CN105866545A (en) * | 2016-05-18 | 2016-08-17 | 武汉精测电子技术股份有限公司 | ITO (indium tin oxide) line impedance measurement device and method and analog signal generator |
| CN107257533A (en) * | 2017-05-23 | 2017-10-17 | 杭州兆华电子有限公司 | A kind of impedance triggers automated testing method |
| CN109102767A (en) * | 2018-08-24 | 2018-12-28 | 昆山龙腾光电有限公司 | A kind of impedance detection circuit and liquid crystal display device |
| CN111508399A (en) * | 2020-05-28 | 2020-08-07 | 霸州市云谷电子科技有限公司 | Display panel and display device |
-
2020
- 2020-11-17 CN CN202011287148.XA patent/CN112394837A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101846712A (en) * | 2010-04-01 | 2010-09-29 | 苏州崴展电子科技有限公司 | ITO (Indium Tin Oxide) electrical characteristic detecting method and detecting system of capacitance type touch screen |
| US20150124979A1 (en) * | 2013-11-01 | 2015-05-07 | Real Tek Semiconductor Corporation | Impedance detecting device and method |
| JP2015142152A (en) * | 2014-01-27 | 2015-08-03 | 旭化成エレクトロニクス株式会社 | Trigger detection circuit and trigger detection ic chip |
| CN105866545A (en) * | 2016-05-18 | 2016-08-17 | 武汉精测电子技术股份有限公司 | ITO (indium tin oxide) line impedance measurement device and method and analog signal generator |
| CN107257533A (en) * | 2017-05-23 | 2017-10-17 | 杭州兆华电子有限公司 | A kind of impedance triggers automated testing method |
| CN109102767A (en) * | 2018-08-24 | 2018-12-28 | 昆山龙腾光电有限公司 | A kind of impedance detection circuit and liquid crystal display device |
| CN111508399A (en) * | 2020-05-28 | 2020-08-07 | 霸州市云谷电子科技有限公司 | Display panel and display device |
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Application publication date: 20210223 |