CN112382579B - 晶圆凸块下金属化的镀层制造工艺及其镀层结构 - Google Patents
晶圆凸块下金属化的镀层制造工艺及其镀层结构 Download PDFInfo
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Abstract
本发明公开了一种晶圆凸块下金属化的镀层制造工艺及其镀层结构,该工艺中的基材为硅或者碳化硅半导体;该基材表面上设置有导电线路区和非导电区,基材表面的导电线路区向下凹陷后形成一倒状的晶圆凸块。本发明该发明采用的化学镀锡合金工艺得到镀层为化学置换型镀层,不需要通电,也非传统的化学自催化反应,仅需要置换反应就可以进行。采用该发明的得到凸块下金属化(UBM)和再布线(RDL)既可以具有绑定性,也具有良好的焊接性。
Description
技术领域
本发明涉及集成电路封装技术领域,尤其涉及一种晶圆凸块下金属化的镀层制造工艺及其镀层结构。
背景技术
随着芯片的高功能与高度集成的需求越来越大,芯片及其封装的金属线路也越来越细小,以便于满足更多的I/O接点数,提高芯片的运算效能。尤其近年来出现的fou-out工艺的RDL(重布线)工艺,其线宽线距达到了2/2μm。
传统的先进封装为倒装芯片封装工艺,典型的工艺为CSP(Chip Scale Package)封装,通过扇入的工艺将芯片内部的电极通过RDL方式分散,再进行植球,该封测工艺相对传统的打线封装,节约了大量空间,使芯片尺寸得到了极大的缩小。但其存在线路宽度较大,接点数较少的问题。
为了降低芯片占用面积,或者提高芯片的运算效率,扇出型的工艺应运而生。其芯片内部的接点数大幅增加,为了不占用更多的面积,封测工艺中的线路宽度和线路之间的距离越来越小。这些线路的起点来源于芯片的电极,通过再布线工艺,将线路分散,在末端形成pad,或进行植球,或进行绑定与外界连通。
由于铜具有良好的导电导热性,所以线路主体材质大部分为铜,但铜存在容易氧化,难以绑定的缺点,所以传统工艺在铜线路制作完毕后,进行化学镀或者电镀镍金处理,防止铜的氧化,增强其焊接性和绑定性。然而随着线路越来越细,间距越来越小,化学镀镍金的工艺受到极大的挑战,原因在于化学镀镍金容易发生渗镀,导致两个独立的线路短路,或者容易使独立的pad发生漏镀。电镀工艺虽不会造成渗镀漏镀,但电镀工艺需要所有的线路互联,需要具备通电的功能才能实现,不能满足独立pad的镀层需要。
发明内容
针对上述技术中存在的不足之处,本发明提供一种晶圆凸块下金属化的镀层制造工艺及其镀层结构,该发明采用的化学镀锡合金工艺得到镀层为化学置换型镀层,不需要通电,也非传统的化学自催化反应,仅需要置换反应就可以进行。采用该发明的得到凸块下金属化(UBM)和再布线(RDL)既可以具有绑定性,也具有良好的焊接性。
为实现上述目的,本发明提供一种晶圆凸块下金属化的镀层制造工艺,该工艺中的基材为硅或者碳化硅半导体;该基材表面上设置有导电线路区和非导电区,基材表面的导电线路区向下凹陷后形成一倒状的晶圆凸块;
该晶圆凸块下金属化的镀层工艺具体步骤为:
步骤1,形成金属电极:晶圆基材经过蚀刻,漏出晶圆内部的电极,在晶圆凸块的凸出部分底部形成金属电极;
步骤2,形成钝化层:对晶圆凸块表面进行钝化处理后形成钝化层,使得晶圆表面形成二氧化硅;
步骤3,形成阻挡层:对晶圆凸块形成的钝化层表面进行真空镀钛、镀钨或镀钽,形成阻挡层形成阻挡,可以防止铜与晶圆之间的离子扩散;
步骤4,形成导电铜种子层:对晶圆凸块形成的阻挡层表面真空镀铜,并形成导电铜种子层,其具有良好的导电性,为后续的电镀铜做好准备;
步骤5,对晶圆凸块形成的导电铜种子层表面进行涂胶、曝光、显影,形成图形,且漏出金属线路部分;
步骤6,形成电镀铜层:对金属线路部分进行电镀铜后形成电镀铜层;
步骤7,去胶:将导电铜种子层上金属线路部分的光刻胶去掉;
步骤8,蚀刻:采用蚀刻方法,将导电铜种子层去掉,再蚀刻去掉阻挡层;
步骤9,形成化学锡合金层:在电镀铜层的铜线路上进行化学镀锡处理后形成学锡合金层;
步骤10,在整个线路上设置绝缘层,并漏出植球或绑定的pad位置;
步骤11,在裸露的pad位置上进行植球或者绑定,实现与外界线路互联。
其中,所述化学锡合金层中的化学锡层是一种置换型镀层,化学锡溶液以水为溶剂,溶质包括5-30g/L的锡离子、70-130g/L的硫脲、10-100g/L的甲基磺酸、络合剂,根据需要可以加入1-10ppm的银离子;在60-80℃的条件下,将含铜线路的待镀基材浸入到化学锡的溶液中即可形成锡或者锡银合金镀层,一般浸泡时间控制在10-20分钟;
铜离子在酸性溶液中的电位是0.52V,当溶液中存在硫脲时,Cu2+的电镀可以降低至-0.5V,而Sn2+的电位在-0.136V,此时锡的电位相对于铜就更正一些,所以可以存在以下反应:
2Cu+Sn2+→2Cu++Sn
由此可以看出,锡的沉积,是通过锡离子和铜的置换反应发生的,在没有铜的地方,锡离子就不会生成锡镀层,如此以来,在铜线路以外的地方便不会有渗镀现象。
其中,所述阻挡层的厚度在0.1-0.5微米。
其中,所述电镀铜层的厚度为1-20μm。
其中,所述化学锡合金层包括化学纯锡、化学锡银及化学锡铜镀层。
其中,所述化学锡合金层的厚度在0.5-1.5μm。
其中,所述绝缘层为树脂。
为实现上述目的,本发明还提供了一种基于晶圆凸块下金属化的镀层制造工艺所得到的镀层结构,该结构在晶圆基材上形成,该基材表面上设置有导电线路区和非导电区;基材表面的导电线路区向下凹陷后形成一倒状的晶圆凸块;
所述晶圆凸块的凸出部分底部形成金属电极,且该晶圆凸块由下至上依次设置有钝化层、阻挡层、导电铜种子层、电镀铜层和化学锡合金层;且在整个晶圆基材上设置绝缘层后,在化学锡合金层上漏出植球或绑定的pad位置,在裸露的pad位置上进行植球或者绑定,实现与外界线路互联。
本发明的有益效果是:与现有技术相比,本发明提供的晶圆凸块下金属化的镀层制造工艺,具有如下优势:
1)该工艺中将设置导电线路区的基材表面向下凹陷后,该设置导电线路区的基材表面形成一倒状的晶圆凸块,对该晶圆凸块依次进行钝化、阻挡、导电种子、电镀铜及化学锡合金等处理,在晶圆基材上设置化学镀锡合金层,说明了该发明采用的化学镀锡合金工艺得到镀层为化学置换型镀层,不需要通电,也非传统的化学自催化反应,仅需要置换反应就可以进行。
2)将晶圆基材需要处理的部分设计成倒状的晶圆凸块,然后再对该晶圆凸块进行金属化镀层处理,使得该凸块经过化学锡合金层处理后得到凸块下金属化和再布线;采用该发明的得到凸块下金属化(UBM)和再布线(RDL)既可以具有绑定性,也具有良好的焊接性。
3)因为化学镀锡合金为置换型镀层,不存在渗镀漏镀风险,也不受线路设计的影响,克服了传统使用的化学镍金工艺受线宽线距的限制,也克服了电镀镍金工艺受线路导电性的约束;
4)在整个线路上设置绝缘层后,并漏出植球或绑定的pad位置,通过通过该pad脚位置进行植锡球或绑定,由此与外界线路实现互联;该发明实现了不需要通电即可完成对外的互联。
附图说明
图1为本发明的晶圆凸块下金属化的镀层结构示意图;
图2为本发明的晶圆凸块下金属化的镀层工艺步骤;
图3为传统化学镍金工艺带来的品质风险;
图4为传统化学镍金工艺渗镀实例图;
图5为本发明的晶圆凸块下金属化的镀层进行化学镀锡后的实例图;
图6为本发明化学镀锡后的切片图。
附图标记说明:
11、基材;12、金属电极;13、钝化层;14、阻挡层;15、导电铜种子层;16、电镀铜层;17、化学锡合金层;18、锡球;19、绝缘层
具体实施方式
为了更清楚地表述本发明,下面结合附图对本发明作进一步地描述。
请参阅图1-2,本发明提供的一种晶圆凸块下金属化的镀层制造工艺,该工艺中的基材11为硅或者碳化硅半导体;该基材表面上设置有导电线路区和非导电区,设置导电线路区的基材表面向下凹陷后,该设置导电线路区的基材表面形成一倒状的晶圆凸块;
该晶圆凸块下金属化的镀层工艺具体步骤如图2,具体为:
步骤1,形成金属电极12:晶圆基材经过蚀刻,漏出晶圆内部的电极,在晶圆凸块的凸出部分底部形成金属电极12;
步骤2,形成钝化层13:对晶圆凸块表面进行钝化处理后形成钝化层,使得晶圆表面形成二氧化硅;钝化材料可以是采用PI等有机树脂;
步骤3,形成阻挡层14:对晶圆凸块形成的钝化层表面进行真空镀钛、镀钨或镀钽,形成阻挡层形成阻挡,可以防止铜与晶圆之间的离子扩散;
步骤4,形成导电铜种子层15:对晶圆凸块形成的阻挡层表面真空镀铜,并形成导电铜种子层,其具有良好的导电性,为后续的电镀铜做好准备;
步骤5,对晶圆凸块形成的导电铜种子层表面进行涂胶、曝光、显影,形成图形,且漏出金属线路部分;
步骤6,形成电镀铜层16:对导电铜种子层上去除金属线路部分外的其他区域进行电镀铜后形成电镀铜层;
步骤7,去胶:将导电铜种子层上金属线路部分的光刻胶去掉;
步骤8,蚀刻:采用蚀刻方法,将导电铜种子层去掉,再蚀刻去掉阻挡层;
步骤9,形成化学锡合金层17:在电镀铜层的铜线路上进行化学镀锡处理后形成学锡合金层;
步骤10,在整个线路上设置绝缘层18或阻焊层,并漏出植球或绑定的pad位置;
步骤11,在裸露的pad位置上进行植锡球19或者绑定,实现与外界线路互联。
基于上述步骤,本发明得到了镀层结构,该结构在晶圆基材上形成,该基材表面上设置有导电线路区和非导电区;基材表面的导电线路区向下凹陷后形成一倒状的晶圆凸块;
所述晶圆凸块的凸出部分底部形成金属电极12,且该晶圆凸块由下至上依次设置有钝化层13、阻挡层14、导电铜种子层15、电镀铜层16和化学锡合金层17;且在整个晶圆基材上设置绝缘层19后,在化学锡合金层上漏出植球或绑定的pad位置,在裸露的pad位置上进行植锡球18或者绑定,实现与外界线路互联。
在本实施例中,所述阻挡层的厚度在0.1-0.5微米。阻挡层为钛、钨、钽及其合金中一种。导电铜种子层为铜层,且其厚度在0.1-2μm。电镀铜层的厚度为1-20μm。所述化学锡合金层包括化学纯锡、化学锡银及化学锡铜镀层。所述化学锡合金层的厚度在0.5-1.5μm。
化学锡层是一种置换型镀层,化学锡溶液以水为溶剂,溶质包括5-30g/L的锡离子(来源硫酸亚锡或者甲基磺酸锡),70-130g/L的硫脲,10-100g/L的甲基磺酸、络合剂(如柠檬酸等)等,根据需要可以加入1-10ppm的银离子(来源于甲基磺酸银,乙酸银等),在60-80℃的条件下,将含铜线路的待镀基材浸入到化学锡的溶液中即可形成锡或者锡银合金镀层,一般浸泡时间控制在10-20分钟。
铜离子在酸性溶液中的电位是0.52V,当溶液中存在硫脲时,Cu2+的电镀可以降低至-0.5V,而Sn2+的电位在-0.136V,此时锡的电位相对于铜就更正一些,所以可以存在以下反应:
2Cu+Sn2+→2Cu++Sn
由此可以看出,锡的沉积,是通过锡离子和铜的置换反应发生的,在没有铜的地方,锡离子就不会生成锡镀层,如此以来,在铜线路以外的地方便不会有渗镀现象。
作为对比,传统工艺采用化学镀镍金工艺,会导致线路之间的短路。如图3和图4所示,图3为示意图,是指线路宽度在较低的情况下,容易在线路之间形成短路的现象,即原本独立的线路因为化学镍金难以控制的自催化反应出现搭线问题,本发明以线距为9μm左右的线路进行化学镀镍金实际测试,发现线路之间很多面积出现镍金沉积,导致独立线路之间的互联,无法工作,如图4所示。
由于本发明化学镀锡合金为置换型镀层,只有在铜线路的部分发生置换反应,所以不存在化学镀镍金的渗镀、漏镀问题,也不存在镍腐蚀状况,也不受独立pad设计的影响。
为了进一步证明该发明的实际效果,测试线路宽度3μm,线距5μm的化学镀锡合金,该测试样本比上面的化学镍金实施例具有更加精细的线路设计,结果表明,无任何渗镀现象,如图5所示。同时测试化学镀锡后的FIB切片,镀层空洞等异常。
上述各步骤根据需要,还包括水洗、润湿、预浸或烘干等辅助性步骤中的一种或几种。图5为本发明进行化学镀锡后的线路,无渗镀情况。经过FIB切片分析,锡合金和铜层之间无空洞,参考图6。通过各种实验证明,本发明实现了不需要通电即可完成对外的互联。
本发明的有益效果具体如下:
2)该工艺中将设置导电线路区的基材表面向下凹陷后,该设置导电线路区的基材表面形成一倒状的晶圆凸块,对该晶圆凸块依次进行钝化、阻挡、导电种子、电镀铜及化学锡合金等处理,在晶圆基材上设置化学镀锡合金层,说明了该发明采用的化学镀锡合金工艺得到镀层为化学置换型镀层,不需要通电,也非传统的化学自催化反应,仅需要置换反应就可以进行。
2)将晶圆基材需要处理的部分设计成倒状的晶圆凸块,然后再对该晶圆凸块进行金属化镀层处理,使得该凸块经过化学锡合金层处理后得到凸块下金属化和再布线;采用该发明的得到凸块下金属化(UBM)和再布线(RDL)既可以具有绑定性,也具有良好的焊接性。
3)因为化学镀锡合金为置换型镀层,不存在渗镀漏镀风险,也不受线路设计的影响,克服了传统使用的化学镍金工艺受线宽线距的限制,也克服了电镀镍金工艺受线路导电性的约束;
4)在整个线路上设置绝缘层后,并漏出植球或绑定的pad位置,通过通过该pad脚位置进行植锡球或绑定,由此与外界线路实现互联;该发明实现了不需要通电即可完成对外的互联。
以上公开的仅为本发明的某一客户打样实施例,但是本发明并非局限于此,任何本领域的技术人员能思之的变化都应落入本发明的保护范围。
Claims (6)
1.一种晶圆凸块下金属化的镀层制造工艺,其特征在于,该工艺中的基材为硅或者碳化硅半导体;该基材表面上设置有导电线路区和非导电区,基材表面的导电线路区向下凹陷后形成一倒状的晶圆凸块;
该晶圆凸块下金属化的镀层工艺具体步骤为:
步骤1,形成金属电极:晶圆基材经过蚀刻,漏出晶圆内部的电极,在晶圆凸块的凸出部分底部形成金属电极;
步骤2,形成钝化层:对晶圆凸块表面进行钝化处理后形成钝化层,使得晶圆表面形成二氧化硅;
步骤3,形成阻挡层:对晶圆凸块形成的钝化层表面进行真空镀钛、镀钨或镀钽,形成阻挡层形成阻挡,防止铜与晶圆之间的离子扩散;
步骤4,形成导电铜种子层:对晶圆凸块形成的阻挡层表面真空镀铜,并形成导电铜种子层,其具有良好的导电性,为后续的电镀铜做好准备;
步骤5,对晶圆凸块形成的导电铜种子层表面进行涂胶、曝光、显影,形成图形,且漏出金属线路部分;
步骤6,形成电镀铜层:对金属线路部分进行电镀铜后形成电镀铜层;
步骤7,去胶:将导电铜种子层上金属线路部分的光刻胶去掉;
步骤8,蚀刻:采用蚀刻方法,将导电铜种子层去掉,再蚀刻去掉阻挡层;
步骤9,形成化学锡合金层:在电镀铜层的铜线路上进行化学镀锡处理后形成学锡合金层;所述化学锡合金层中的化学锡层是一种置换型镀层,化学锡溶液以水为溶剂,溶质包括5-30g/L的锡离子、70-130g/L的硫脲、10-100g/L的甲基磺酸、络合剂,根据需要加入1-10ppm的银离子;在60-80℃的条件下,将含铜线路的待镀基材浸入到化学锡的溶液中即可形成锡或者锡银合金镀层,一般浸泡时间控制在10-20分钟;
铜离子在酸性溶液中的电位是0.52V,当溶液中存在硫脲时,Cu2+的电镀降低至-0.5V,而Sn2+的电位在-0.136V,此时锡的电位相对于铜就更正一些,所以存在以下反应:
2Cu+Sn2+→2Cu++Sn
由此可以看出,锡的沉积,是通过锡离子和铜的置换反应发生的,在没有铜的地方,锡离子就不会生成锡镀层,如此以来,在铜线路以外的地方便不会有渗镀现象;
步骤10,在整个线路上设置绝缘层,并漏出植球或绑定的pad位置;
步骤11,在裸露的pad位置上进行植球或者绑定,实现与外界线路互联。
2.根据权利要求1所述的晶圆凸块下金属化的镀层制造工艺,其特征在于,所述阻挡层的厚度在0.1-0.5微米。
3.根据权利要求1所述的晶圆凸块下金属化的镀层制造工艺,其特征在于,所述电镀铜层的厚度为1-20μm。
4.根据权利要求1所述的晶圆凸块下金属化的镀层制造工艺,其特征在于,所述化学锡合金层的厚度在0.5-1.5μm。
5.根据权利要求1所述的晶圆凸块下金属化的镀层制造工艺,其特征在于,所述绝缘层为树脂。
6.一种晶圆凸块下金属化的镀层结构,其特征在于,基于权利要求1-5任一项 的工艺制造得到的镀层结构,该结构在晶圆基材上形成,该基材表面上设置有导电线路区和非导电区;基材表面的每个导电线路区向下凹陷后形成一倒状的晶圆凸块;
所述晶圆凸块的凸出部分底部形成金属电极,且该晶圆凸块由下至上依次设置有钝化层、阻挡层、导电铜种子层、电镀铜层和化学锡合金层;且在整个晶圆基材上设置绝缘层后,在化学锡合金层上漏出植球或绑定的pad位置,在裸露的pad位置上进行植球或者绑定,实现与外界线路互联。
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