CN112363956A - Method and device for encrypting and decrypting FLASH memory - Google Patents
Method and device for encrypting and decrypting FLASH memory Download PDFInfo
- Publication number
- CN112363956A CN112363956A CN202011255420.6A CN202011255420A CN112363956A CN 112363956 A CN112363956 A CN 112363956A CN 202011255420 A CN202011255420 A CN 202011255420A CN 112363956 A CN112363956 A CN 112363956A
- Authority
- CN
- China
- Prior art keywords
- encryption
- program
- information
- memory
- ciphertext
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
Abstract
The invention discloses a method and a device for encrypting and decrypting an FLASH memory, belonging to the technical field of electronic chip design; the method comprises the following steps: s1, acquiring encryption information, and programming the encryption information in a part of specified areas in an efuse (one-time programmable memory) in a chip, such as an encryption offset address, an encryption key and an encryption switch; s2, encrypting an initial plaintext program through an upper computer based on an AES algorithm according to encryption information to obtain a ciphertext program, programming the ciphertext program into the FLASH memory, S3, after the chip is powered on and reset, reading the encryption information from the efuse by a hardware control logic module, automatically loading a corresponding ciphertext program in the FLASH memory, and decrypting the ciphertext program through a decryption module to obtain a target plaintext program; and S4, storing the target plaintext program in a memory. The beneficial effects of the above technical scheme are: the method and the device for encrypting and decrypting the memory can realize simple encryption flow and higher safety and practicability.
Description
Technical Field
The invention relates to the field of electronic chip design, in particular to a method and a device for encrypting and decrypting a FLASH memory.
Background
In recent years, with the continuous development of science and technology in China, Flash technology is increasingly and widely applied, when manufacturers develop products, the confidentiality of codes and data of the Flash technology is more and more emphasized, related cracking software and encryption software are more and more used for preventing third parties from maliciously copying software codes of mature products on the market, the cost of software development is directly saved, the improper advantage is formed, and therefore chip providers are required to ensure that chips have encryption functions.
At present, two chip encryption mechanisms are mainly used, one is that the function of reading codes is completely destroyed, and neither developers nor users can read the contents in the code. The other method is that a reading method is not disclosed, a manufacturer can still read codes, the possibility of checking the codes is left in the method, but the possibility of being cracked is not considered to be true 'encryption', and meanwhile, the method also has the problems of complex encryption flow, and low safety and practicability.
Disclosure of Invention
According to the above problems in the prior art, a method and an apparatus for encrypting and decrypting a FLASH memory are provided, which aim to realize a method and an apparatus for encrypting and decrypting a memory with simple encryption flow and higher security and practicability, so as to solve the problems of complicated encryption flow, low security and practicability of the existing method for encrypting and decrypting a FLASH memory.
The technical scheme specifically comprises the following steps:
a method for encrypting and decrypting a FLASH memory, wherein the FLASH memory is arranged inside or outside a chip, comprises the following steps:
acquiring encrypted information;
encrypting an initial plaintext program through an upper computer based on an advanced encryption standard algorithm according to the encryption information to obtain a ciphertext program, and programming the ciphertext program into the FLASH memory;
a hardware control logic module reads the encrypted information, automatically loads the corresponding ciphertext program in the FLASH memory, and decrypts the ciphertext program through a decryption module to obtain a target plaintext program;
storing the target plaintext program in a memory.
Preferably, the method for encrypting and decrypting the FLASH memory includes the steps of:
taking a one-time programmable memory inside the chip as a storage medium of the encrypted information;
and programming the encryption information to a designated area of the one-time programmable memory.
Preferably, the method for encrypting and decrypting the FLASH memory includes: encryption offset address information, encryption key information, and encryption switch configuration information.
Preferably, the method for encrypting and decrypting the FLASH memory includes the steps of, according to the encryption information, encrypting a plaintext program through an upper computer based on an advanced encryption standard algorithm to obtain a ciphertext program:
encrypting the initial plaintext program through an upper computer based on the advanced encryption standard algorithm according to the encryption offset address information and the encryption key information;
the encryption offset address information and the encryption key information are matched with the encryption information stored in the one-time programmable memory.
Preferably, the method for encrypting and decrypting a FLASH memory further includes, before the hardware control logic module reads the encryption information:
and the chip power-on reset loads the encryption information stored in the one-time programmable memory into the hardware control logic module.
Preferably, the method for encrypting and decrypting a FLASH memory, wherein the step of reading the encryption information by the hardware control logic module includes:
and the hardware control logic module analyzes the encrypted information stored in the one-time programmable memory to obtain the information required for decrypting the ciphertext program.
Preferably, the method for encrypting and decrypting a FLASH memory, wherein the hardware control logic module obtains information required for decrypting the ciphertext program by analyzing the encryption information stored in the one-time programmable memory, includes:
reading the corresponding ciphertext program in the FLASH according to the encryption offset address information stored in the one-time programmable memory;
inputting the ciphertext program into the decryption module according to the encryption key information stored in the one-time programmable memory;
and analyzing the ciphertext program through the advanced encryption standard algorithm to obtain the target plaintext program.
Preferably, the method for encrypting and decrypting a FLASH memory, wherein the step of inputting the ciphertext program into the decryption module according to the encryption key information stored in the one-time programmable memory includes:
the hardware control logic module automatically initiates access to an encryption area of the FLASH memory according to the encryption information and acquires access result information;
and according to the access result information, the hardware control logic module sequentially sends the loaded ciphertext programs in the FLASH memory to the decryption module for decryption through ping-pong operation.
Preferably, the method for encrypting and decrypting a FLASH memory further includes, after the target plaintext program is stored in the memory:
and mapping the ciphertext program area in the FLASH memory into the memory.
An apparatus for automatically encrypting and decrypting a FLASH memory, comprising:
the one-time programmable memory module is positioned in the chip and used for storing encryption information;
the encryption module is used for encrypting an initial plaintext program based on an advanced encryption standard algorithm according to the encryption information to obtain a ciphertext program, and programming the ciphertext program into the FLASH;
the hardware control logic module is used for reading the encryption information, automatically loading the corresponding ciphertext program in the FLASH memory and mapping the ciphertext program area in the FLASH memory into the memory;
the decryption module is used for decrypting the ciphertext program to obtain a target plaintext program;
and the storage module is used for storing the target plaintext program in a memory.
The beneficial effects of the above technical scheme are: the method and the device for encrypting and decrypting the FLASH memory are provided, and the method and the device for encrypting and decrypting the FLASH memory are simple in encryption flow and higher in safety and practicability.
Drawings
FIG. 1 is a flow chart of a method for encrypting and decrypting a FLASH memory according to a preferred embodiment of the present invention;
FIG. 2 is a schematic diagram of an apparatus for automatically encrypting and decrypting a FLASH memory according to a preferred embodiment of the present invention;
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
According to the above problems in the prior art, a method and an apparatus for encrypting and decrypting a FLASH memory are provided, and the method and the apparatus for encrypting and decrypting the FLASH memory are applied to the design technology of electronic chips, especially to the security protection of the chips.
Referring to fig. 1 and fig. 2, a preferred embodiment of a method and an apparatus for encrypting and decrypting a FLASH memory includes:
referring to fig. 1, a method for encrypting and decrypting a FLASH memory, which is disposed inside or outside a chip, includes:
s1, acquiring encryption information;
specifically, in this embodiment, a read-only memory mirror mode of the chip is first entered, a otp memory module inside the chip is programmed, and encryption information required for encryption is encrypted, where the encryption information is stored in an address of the otp memory module and is fixed and unchangeable, and the encryption information mainly includes encryption offset address information, encryption key information, and encryption switch configuration information stored in the FLASH by the encryption program; secondly, reading whether the default value of the one-time programmable memory in the encryption key area to be programmed is all 0, then programming the encryption key information, reading again after programming, verifying whether programming is correct, and recording the actual programming value;
reading whether the default value of the one-time programmable memory of the encryption offset address area to be programmed is all 0, then programming the encryption offset address information, reading again after programming, verifying whether programming is correct, and recording the actual programming value;
and finally, reading whether the default value of the one-time programmable memory in the encryption switch area to be programmed is all 0, then programming the encryption switch, reading again after programming, verifying whether programming is correct, and recording the actual programming value.
S2, encrypting an initial plaintext program through an upper computer based on an advanced encryption standard algorithm according to the encryption information to obtain a ciphertext program, and programming the ciphertext program into the FLASH memory;
specifically, in this embodiment, the initial plaintext program refers to data that has not been subjected to encryption processing, the advanced encryption standard algorithm is an encryption function, and the data obtained by processing the initial plaintext program through the encryption function is ciphertext program data.
S3, a hardware control logic module reads the encrypted information, automatically loads the corresponding ciphertext program in the FLASH memory, and decrypts the ciphertext program through a decryption module to obtain a target plaintext program;
specifically, in this embodiment, the decryption module includes a decryption function, where the decryption function may be an advanced encryption standard algorithm function, and the data obtained by processing the ciphertext program through the decryption function is the target plaintext program data.
And S4, storing the target plaintext program in a memory.
Specifically, in this embodiment, the Memory may be a Static Random-Access Memory (SRAM) or the like.
The method for encrypting and decrypting the FLASH memory comprises the following steps of:
taking a one-time programmable memory inside the chip as a storage medium of the encrypted information;
specifically, in this embodiment, the one-time programmable memory is one of programmable memories, and refers to a memory that cannot be changed or deleted after the one-time programming procedure, and the security of the encrypted information stored in the memory is ensured by using the memory.
And programming the encryption information to a designated area of the one-time programmable memory.
Specifically, in this embodiment, in the programming process, the programming device is used to program the encrypted information into the designated area of the otp memory, and the programming mode may include: the method is realized by controlling the relation between voltage and time.
The method for encrypting and decrypting the FLASH memory comprises the following steps of: encryption offset address information, encryption key information, and encryption switch configuration information.
Specifically, in this embodiment, the encryption offset address information is used to extract ciphertext data from the FLASH according to the information, so as to ensure the correctness of the decryption direction. The encryption key information is used for being matched with ciphertext data taken out of the FLASH and being sent to a decryption module, so that corresponding target plaintext program data can be generated based on a decryption algorithm.
The method for encrypting and decrypting the FLASH memory is characterized in that according to the encryption information, a plaintext program is encrypted through an upper computer on the basis of an advanced encryption standard algorithm, and a ciphertext program is obtained through the steps of:
encrypting the initial plaintext program through an upper computer based on the advanced encryption standard algorithm according to the encryption offset address information, the encryption key information and the encryption switch configuration information;
specifically, in this embodiment, the upper computer is a computer capable of sending a specific control command, and the encryption of the initial plaintext program is implemented through an encryption algorithm pre-stored in the upper computer, where the encryption algorithm may be an advanced encryption standard algorithm, and the initial plaintext program and the ciphertext program are separately programmed and replaced by using the upper computer, so as to facilitate subsequent encryption.
The encryption offset address information and the encryption key information are matched with the encryption information stored in the one-time programmable memory.
The method for encrypting and decrypting the FLASH memory comprises the following steps that before the hardware control logic module reads the encryption information:
an electrical reset on the chip loads the encrypted information stored in the one-time programmable memory into the hardware control logic module.
Specifically, in this embodiment, after the chip power-on reset operation, the hardware control logic module will take out the information about encryption in the one-time programmable memory, and automatically load the ciphertext program of the corresponding encryption interval in the FLSAH memory according to the corresponding encryption information.
The method for encrypting and decrypting the FLASH memory is characterized in that the step of reading the encryption information by the hardware control logic module comprises the following steps:
and the hardware control logic module analyzes the encrypted information stored in the one-time programmable memory to obtain the information required for decrypting the ciphertext program.
Specifically, in this embodiment, the hardware control logic module includes: a processor (CPU) for executing an encryption/decryption program, one or more power supplies, input and output modules, and corresponding flow modules and communication modules.
The method for encrypting and decrypting the FLASH memory, wherein the hardware control logic module obtains information required for decrypting the ciphertext program by analyzing the encryption information stored in the one-time programmable memory, and comprises the following steps:
reading the corresponding ciphertext program in the FLASH memory according to the encryption offset address information stored in the one-time programmable memory;
specifically, in this embodiment, the corresponding ciphertext program in the FLASH memory is read by encrypting the offset address information.
Inputting the ciphertext program into the decryption module according to the encryption key information stored in the one-time programmable memory;
specifically, in this embodiment, the ciphertext program is fetched from the FLASH memory and sent to the decryption module by encrypting the key information, so as to generate the corresponding target plaintext program data based on the decryption algorithm.
And analyzing the ciphertext program through the advanced encryption standard algorithm to obtain the target plaintext program.
Specifically, in this embodiment, key information required for decryption is obtained, and then the ciphertext program is analyzed by using the advanced encryption standard algorithm decryption function according to the key information, so as to obtain the target plaintext program.
The method for encrypting and decrypting the FLASH memory, wherein the step of inputting the ciphertext into the decryption module according to the encryption key information stored in the one-time programmable memory comprises the following steps:
the hardware control logic module automatically initiates access to an encryption area in the FLASH memory according to the encryption information and acquires access result information;
specifically, in the present embodiment, the access result information is a partial encryption program.
And according to the access result information, the hardware control logic module sequentially sends the loaded ciphertext programs in the FLASH memory to the decryption module for decryption through ping-pong operation.
Specifically, in this embodiment, the ping-pong operation is a processing technique mainly used for data flow control, and buffers the ciphertext programs respectively, then outputs the ciphertext programs, and finally sends the ciphertext programs to the decryption module for decryption.
The method for encrypting and decrypting the FLASH memory further comprises the following steps after the target plaintext program is stored in the memory:
and mapping the ciphertext program area in the FLASH memory into the memory.
Specifically, in this embodiment, a ciphertext program area in the FLASH memory accessed by the CPU is mapped to the memory.
Referring to fig. 2, an apparatus for automatically encrypting and decrypting a FLASH memory includes:
the one-time programmable memory module 11 is positioned inside the chip and used for storing encryption information;
specifically, in this embodiment, a read-only memory mirror mode of the chip is first entered, a otp memory module inside the chip is programmed, and encryption information required for encryption is encrypted, where the encryption information is stored in an address of the otp memory module and is fixed and unchangeable, and the encryption information mainly includes encryption offset address information, encryption key information, and encryption switch configuration information stored in the FLASH memory by the encryption program; secondly, reading whether the default value of the one-time programmable memory in the encryption key area to be programmed is all 0, then programming the encryption key information, reading again after programming, verifying whether programming is correct, and recording the actual programming value;
reading whether the default value of the one-time programmable memory of the encryption offset address area to be programmed is all 0, then programming the encryption offset address information, reading again after programming, verifying whether programming is correct, and recording the actual programming value;
and finally, reading whether the default value of the one-time programmable memory in the encryption switch area to be programmed is all 0, then programming the encryption switch, reading again after programming, verifying whether programming is correct, and recording the actual programming value.
The encryption module 12 is used for encrypting an initial plaintext program based on an advanced encryption standard algorithm according to the encryption information to obtain a ciphertext program, and programming the ciphertext program into the FLASH memory;
specifically, in this embodiment, the initial plaintext program refers to data that has not been subjected to encryption processing, the advanced encryption standard algorithm is an encryption function, and the data obtained by processing the initial plaintext program through the encryption function is ciphertext program data.
A hardware control logic module 13, configured to read the encryption information, automatically load the corresponding ciphertext program in the FLASH memory, and map a ciphertext program region in the FLASH memory to the memory;
the decryption module 14 is configured to decrypt the ciphertext program to obtain a target plaintext program;
specifically, in this embodiment, the decryption module includes a decryption function, where the decryption function may be an advanced encryption standard algorithm function, and the data obtained by processing the ciphertext program through the decryption function is the target plaintext program data.
A storage module 15, configured to store the target plaintext program in a memory.
Specifically, in this embodiment, the Memory may be a Static Random-Access Memory (SRAM) or the like.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (10)
1. A method for encrypting and decrypting a FLASH memory, wherein the FLASH memory is arranged inside or outside a chip, is characterized by comprising the following steps:
acquiring encrypted information;
encrypting an initial plaintext program through an upper computer based on an advanced encryption standard algorithm according to the encryption information to obtain a ciphertext program, and programming the ciphertext program into the FLASH memory;
a hardware control logic module reads the encrypted information, automatically loads the corresponding ciphertext program in the FLASH memory, and decrypts the ciphertext program through a decryption module to obtain a target plaintext program;
storing the target plaintext program in a memory.
2. The method of claim 1 wherein said step of obtaining encryption information comprises:
taking a one-time programmable memory inside the chip as a storage medium of the encrypted information;
and programming the encryption information to a designated area of the one-time programmable memory.
3. The method of claim 1 wherein said encryption information comprises: encryption offset address information, encryption key information, and encryption switch configuration information.
4. The method for encrypting and decrypting the FLASH memory according to claim 2, wherein the step of encrypting the plaintext program by the upper computer based on the advanced encryption standard algorithm according to the encryption information to obtain the ciphertext program comprises:
encrypting the initial plaintext program through an upper computer based on the advanced encryption standard algorithm according to the encryption offset address information, the encryption key information and the encryption switch configuration information;
the encryption offset address information and the encryption key information are matched with the encryption information stored in the one-time programmable memory.
5. The method of claim 2, wherein before said hardware control logic module reads said encryption information, further comprising:
and the chip power-on reset loads the encryption information stored in the one-time programmable memory into the hardware control logic module.
6. The method of claim 2 wherein said step of said hardware control logic module reading said encrypted information comprises:
and the hardware control logic module analyzes the encrypted information stored in the one-time programmable memory to obtain the information required for decrypting the ciphertext program.
7. The method for encrypting and decrypting the FLASH memory according to claim 6, wherein the hardware control logic module obtains the information required for decrypting the ciphertext program by analyzing the encryption information stored in the otp memory, and the method includes:
reading the corresponding ciphertext program in the FLASH memory according to the encryption offset address information stored in the one-time programmable memory;
inputting the ciphertext program into the decryption module according to the encryption key information stored in the one-time programmable memory;
and analyzing the ciphertext program through the advanced encryption standard algorithm to obtain the target plaintext program.
8. The method according to claim 7, wherein the step of inputting the ciphertext program to the decryption module according to the encryption key information stored in the otp memory comprises:
the hardware control logic module automatically initiates access to an encryption area of the FLASH memory according to the encryption information and acquires access result information;
and according to the access result information, the hardware control logic module sequentially sends the loaded ciphertext programs in the FLASH memory to the decryption module for decryption through ping-pong operation.
9. The method for encrypting and decrypting a FLASH memory according to claim 1, wherein after said storing said target plaintext program in a memory, further comprising:
and mapping the ciphertext program area in the FLASH memory into the memory.
10. An apparatus for automatically encrypting and decrypting a FLASH memory, comprising:
the one-time programmable memory module is positioned in the chip and used for storing encryption information;
the encryption module is used for encrypting an initial plaintext program based on an advanced encryption standard algorithm according to the encryption information to obtain a ciphertext program, and programming the ciphertext program into the FLASH;
the hardware control logic module is used for reading the encryption information, automatically loading the corresponding ciphertext program in the FLASH memory and mapping the ciphertext program area in the FLASH memory into the memory;
the decryption module is used for decrypting the ciphertext to obtain a target plaintext program;
and the storage module is used for storing the target plaintext program in a memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011255420.6A CN112363956A (en) | 2020-11-11 | 2020-11-11 | Method and device for encrypting and decrypting FLASH memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011255420.6A CN112363956A (en) | 2020-11-11 | 2020-11-11 | Method and device for encrypting and decrypting FLASH memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112363956A true CN112363956A (en) | 2021-02-12 |
Family
ID=74515982
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011255420.6A Pending CN112363956A (en) | 2020-11-11 | 2020-11-11 | Method and device for encrypting and decrypting FLASH memory |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112363956A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113220498A (en) * | 2021-05-08 | 2021-08-06 | 青芯半导体科技(上海)有限公司 | Embedded Flash controller supporting encrypted storage |
| CN113297546A (en) * | 2021-06-21 | 2021-08-24 | 尧云科技(西安)有限公司 | Code protection method and device for composite encryption |
| CN113312307A (en) * | 2021-06-25 | 2021-08-27 | 展讯通信（上海）有限公司 | System on chip, data processing method thereof and central processing unit |
| CN117034325A (en) * | 2023-10-07 | 2023-11-10 | 菁音核创科技(厦门)有限公司 | Flash data content encryption method, device, equipment and storage medium |
| WO2024066533A1 (en) * | 2022-09-30 | 2024-04-04 | 深圳市中兴微电子技术有限公司 | Chip assembly and information processing method thereof, and computer readable medium |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1549631A (en) * | 2003-05-15 | 2004-11-24 | ����������ͨѶ�ɷ�����˾�Ͼ��ֹ� | Encrypting and de-encrypting method for personal hand-held communication system cell phone identification information |
| CN101272245A (en) * | 2007-03-21 | 2008-09-24 | 成都方程式电子有限公司 | Fingerprint characteristic value encrypting/decrypting method and system |
| CN103258172A (en) * | 2012-06-13 | 2013-08-21 | 福建睿矽微电子科技有限公司 | Off-chip Nor Flash bus interface hardware encryption device |
| CN103488916A (en) * | 2013-08-12 | 2014-01-01 | 中国航天科工集团第三研究院第八三五七研究所 | On-missile software encipherment protection method |
-
2020
- 2020-11-11 CN CN202011255420.6A patent/CN112363956A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1549631A (en) * | 2003-05-15 | 2004-11-24 | ����������ͨѶ�ɷ�����˾�Ͼ��ֹ� | Encrypting and de-encrypting method for personal hand-held communication system cell phone identification information |
| CN101272245A (en) * | 2007-03-21 | 2008-09-24 | 成都方程式电子有限公司 | Fingerprint characteristic value encrypting/decrypting method and system |
| CN103258172A (en) * | 2012-06-13 | 2013-08-21 | 福建睿矽微电子科技有限公司 | Off-chip Nor Flash bus interface hardware encryption device |
| CN103488916A (en) * | 2013-08-12 | 2014-01-01 | 中国航天科工集团第三研究院第八三五七研究所 | On-missile software encipherment protection method |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113220498A (en) * | 2021-05-08 | 2021-08-06 | 青芯半导体科技(上海)有限公司 | Embedded Flash controller supporting encrypted storage |
| CN113297546A (en) * | 2021-06-21 | 2021-08-24 | 尧云科技(西安)有限公司 | Code protection method and device for composite encryption |
| CN113312307A (en) * | 2021-06-25 | 2021-08-27 | 展讯通信（上海）有限公司 | System on chip, data processing method thereof and central processing unit |
| WO2024066533A1 (en) * | 2022-09-30 | 2024-04-04 | 深圳市中兴微电子技术有限公司 | Chip assembly and information processing method thereof, and computer readable medium |
| CN117034325A (en) * | 2023-10-07 | 2023-11-10 | 菁音核创科技(厦门)有限公司 | Flash data content encryption method, device, equipment and storage medium |
| CN117034325B (en) * | 2023-10-07 | 2024-01-30 | 菁音核创科技(厦门)有限公司 | Flash data content encryption method, device, equipment and storage medium |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112363956A (en) | Method and device for encrypting and decrypting FLASH memory | |
| US11562075B2 (en) | Secure booting method, apparatus, device for embedded program, and storage medium | |
| US7117376B2 (en) | Platform and method of creating a secure boot that enforces proper user authentication and enforces hardware configurations | |
| US8533856B2 (en) | Secure compact flash | |
| KR101393307B1 (en) | Secure boot method and semiconductor memory system for using the method | |
| US6490685B1 (en) | Storage device having testing function and memory testing method | |
| US7941847B2 (en) | Method and apparatus for providing a secure single sign-on to a computer system | |
| US20080148001A1 (en) | Virtual Secure On-Chip One Time Programming | |
| CN109075815A (en) | A kind of system on chip and processing equipment | |
| EP1669863A2 (en) | Secure booting apparatus and method | |
| US7076667B1 (en) | Storage device having secure test process | |
| TW200928750A (en) | System and method for updating read-only memory in smart card memory modules | |
| US20090327762A1 (en) | Methods and Systems for Secure Encryption of Data | |
| GB2427720A (en) | Read access protection of a non-volatile memory | |
| JP4073974B2 (en) | Method for securing access to a removable card for a computer | |
| US11405202B2 (en) | Key processing method and apparatus | |
| KR101824249B1 (en) | Method for managing electronic devices, for example, of integrated circuits type, having internal generation of a personal authetication key | |
| US20090193261A1 (en) | Apparatus and method for authenticating a flash program | |
| CN107688756B (en) | Hard disk control method, equipment and readable storage medium storing program for executing | |
| KR19980032125A (en) | IC memory card | |
| CN114398598A (en) | Library file encryption method, decryption method and encryption device | |
| CN112241523A (en) | Embedded computer starting-up identity authentication method | |
| CN113127844A (en) | Variable access method, device, system, equipment and medium | |
| CN101175268A (en) | Method and device for controlling operation authority of communication terminal chip | |
| CN110880965A (en) | Outgoing electronic document encryption method, system, terminal and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |