CN112349599A - Manufacturing method of chip substrate - Google Patents
Manufacturing method of chip substrate Download PDFInfo
- Publication number
- CN112349599A CN112349599A CN202011247992.XA CN202011247992A CN112349599A CN 112349599 A CN112349599 A CN 112349599A CN 202011247992 A CN202011247992 A CN 202011247992A CN 112349599 A CN112349599 A CN 112349599A
- Authority
- CN
- China
- Prior art keywords
- layer
- glass fiber
- fiber substrate
- copper foil
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 65
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000010410 layer Substances 0.000 claims abstract description 50
- 239000003365 glass fiber Substances 0.000 claims abstract description 38
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 37
- 239000011889 copper foil Substances 0.000 claims abstract description 34
- 238000004806 packaging method and process Methods 0.000 claims abstract description 32
- 239000012790 adhesive layer Substances 0.000 claims abstract description 23
- 239000000084 colloidal system Substances 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 11
- 238000004080 punching Methods 0.000 claims abstract description 7
- 238000003825 pressing Methods 0.000 claims abstract description 4
- 229910000679 solder Inorganic materials 0.000 claims description 44
- 230000008569 process Effects 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 239000012943 hotmelt Substances 0.000 description 4
- 239000012778 molding material Substances 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000003889 chemical engineering Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
Landscapes
- Engineering & Computer Science (AREA)
- Ceramic Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention discloses a method for manufacturing a chip substrate, which comprises the following steps: 1) providing a glass fiber substrate, and forming an adhesive layer on an upper surface and a lower surface of the glass fiber substrate respectively; 2) punching a hole on the glass fiber substrate with the adhesive layer, pressing copper foils on the upper surface and the lower surface of the punched glass fiber substrate, and baking to enable the copper foils to be combined with the glass fiber substrate through the adhesive layer; 3) forming conductive columns at the copper foil layers on the upper surface and the lower surface of the glass fiber substrate, and forming a packaging colloid on the surface of the copper foil, wherein the packaging colloid is coated on the conductive columns and covers the copper foil; 4) grinding the packaging colloid at the position of the conductive post until the conductive post is exposed out of the packaging colloid; detaching a plate to expose the copper foil on the glass fiber substrate and forming an electroplated layer on the copper foil; the manufacturing method of the chip substrate can realize light and thin chips.
Description
Technical Field
The invention relates to a manufacturing method of a chip substrate.
Background
The substrate can provide the effects of electric connection, protection, support, heat dissipation, assembly and the like for the chip so as to realize the purposes of multi-pin, reduction of the volume of a packaged product, improvement of electric performance and heat dissipation, ultrahigh density or multi-chip modularization. The package substrate should belong to the interdisciplinary technology, and it relates to the knowledge of electronics, physics, chemical engineering, etc.
With the development of light and thin electronic products, chip package substrates are increasingly light and thin. The chip packaging structure comprises a chip packaging substrate and a chip arranged on the chip packaging substrate. However, it is a task for those skilled in the art to provide a chip package substrate that is light and thin.
Disclosure of Invention
In view of the deficiencies in the prior art, the present invention provides a method for manufacturing a chip substrate capable of realizing a light and thin chip.
The technical scheme adopted by the invention for solving the technical problems is as follows:
a method for manufacturing a chip substrate comprises the following steps:
1) providing a glass fiber substrate, and forming an adhesive layer on an upper surface and a lower surface of the glass fiber substrate respectively;
2) punching a hole on the glass fiber substrate with the adhesive layer, pressing copper foils on the upper surface and the lower surface of the punched glass fiber substrate, and baking to enable the copper foils to be combined with the glass fiber substrate through the adhesive layer;
3) forming conductive columns at the copper foil layers on the upper surface and the lower surface of the glass fiber substrate, and forming a packaging colloid on the surface of the copper foil, wherein the packaging colloid is coated on the conductive columns and covers the copper foil;
4) grinding the packaging colloid at the position of the conductive post until the conductive post is exposed out of the packaging colloid; detaching a plate to expose the copper foil on the glass fiber substrate and forming an electroplated layer on the copper foil;
5) etching the copper foil layer exposed from the electroplated layer, and forming a first conductive circuit layer and a second conductive circuit layer on the copper foil layer on the upper surface and the lower surface;
6) manufacturing the electroplated layer on the surface of the first conductive circuit layer or the second conductive circuit layer to form a solder ball pad, and forming a solder mask layer on the surface of the formed solder ball pad;
7) and grinding the solder mask layer until the solder ball pads are completely exposed to obtain the chip packaging substrate.
Preferably, in the step 1), the thickness of the glass fiber substrate is 100 to 140 μm, and the thickness of the adhesive layer is 10 to 30 μm.
Preferably, in step 1), a curing process is performed before punching the glass fiber substrate on which the adhesive layer is formed, and the curing process cures the adhesive layer by heating and curing at least once.
Preferably, in step 4), the plating layer is an electroplated copper layer.
Preferably, in step 5), the cross section of the first conductive line layer and the second conductive line layer is formed to be in a truncated cone shape.
Preferably, in step 6), the surface of the formed solder ball pad is subjected to a cleaning treatment and a surface treatment, and an organic solder mask is formed on the surface of the solder ball pad.
The invention has the beneficial effects that:
the packaging colloid is used as a bearing main body, so that the chip packaging substrate becomes thinner, the packaging molding material and the hot melt film are combined with the glass fiber substrate into a whole through an adhesive layer in the surface packaging step, the adhesion of the glass fiber substrate, the packaging molding material and the hot melt film is improved, the service cycle and the reliability of the whole chip card substrate are improved, in addition, a solder mask is formed on the surface of the solder ball pad after the solder ball pad is formed, the solder mask is ground to expose the solder ball pad, so that the size of the solder ball pad is consistent with the size of an opening of the solder mask, the condition that the size of the solder ball pad is larger than the size of the opening of the solder mask in the prior art is avoided, and the size of the solder ball pad can be effectively reduced.
Detailed Description
The present invention is further described with reference to specific examples to enable those skilled in the art to better understand the present invention and to practice the same, but the examples are not intended to limit the present invention.
Examples
A method for manufacturing a chip substrate comprises the following steps:
1) providing a glass fiber substrate, and forming an adhesive layer on an upper surface and a lower surface of the glass fiber substrate respectively;
2) punching a hole on the glass fiber substrate with the adhesive layer, pressing copper foils on the upper surface and the lower surface of the punched glass fiber substrate, and baking to enable the copper foils to be combined with the glass fiber substrate through the adhesive layer;
3) forming conductive columns at the copper foil layers on the upper surface and the lower surface of the glass fiber substrate, and forming a packaging colloid on the surface of the copper foil, wherein the packaging colloid is coated on the conductive columns and covers the copper foil;
4) grinding the packaging colloid at the position of the conductive post until the conductive post is exposed out of the packaging colloid; detaching a plate to expose the copper foil on the glass fiber substrate and forming an electroplated layer on the copper foil;
5) etching the copper foil layer exposed from the electroplated layer, and forming a first conductive circuit layer and a second conductive circuit layer on the copper foil layer on the upper surface and the lower surface;
6) manufacturing the electroplated layer on the surface of the first conductive circuit layer or the second conductive circuit layer to form a solder ball pad, and forming a solder mask layer on the surface of the formed solder ball pad;
7) and grinding the solder mask layer until the solder ball pads are completely exposed to obtain the chip packaging substrate.
In the step 1), the thickness of the glass fiber substrate is 100-140 μm, the thickness of the adhesive layer is 10-30 μm, and in the step 1), a curing process is performed before punching the glass fiber substrate on which the adhesive layer is formed, wherein the curing process adopts at least one heating curing mode to cure the adhesive layer.
In step 4), the electroplated layer is a copper electroplating layer, in step 5), the cross sections of the first conductive circuit layer and the second conductive circuit layer are formed to be in a truncated cone shape, and in step 6), the surface of the formed solder ball pad is subjected to cleaning treatment and surface treatment, so that an organic solder protection film is formed on the surface of the solder ball pad.
The invention has the beneficial effects that:
the packaging colloid is used as a bearing main body, so that the chip packaging substrate becomes thinner, the packaging molding material and the hot melt film are combined with the glass fiber substrate into a whole through an adhesive layer in the surface packaging step, the adhesion of the glass fiber substrate, the packaging molding material and the hot melt film is improved, the service cycle and the reliability of the whole chip card substrate are improved, in addition, a solder mask is formed on the surface of the solder ball pad after the solder ball pad is formed, the solder mask is ground to expose the solder ball pad, so that the size of the solder ball pad is consistent with the size of an opening of the solder mask, the condition that the size of the solder ball pad is larger than the size of the opening of the solder mask in the prior art is avoided, and the size of the solder ball pad can be effectively reduced.
The above-described embodiments of the present invention are not intended to limit the scope of the present invention, and the embodiments of the present invention are not limited thereto, and various other modifications, substitutions and alterations can be made to the above-described structure of the present invention without departing from the basic technical concept of the present invention as described above, according to the common technical knowledge and conventional means in the field of the present invention.
Claims (6)
1. A method for manufacturing a chip substrate is characterized by comprising the following steps:
1) providing a glass fiber substrate, and forming an adhesive layer on an upper surface and a lower surface of the glass fiber substrate respectively;
2) punching a hole on the glass fiber substrate with the adhesive layer, pressing copper foils on the upper surface and the lower surface of the punched glass fiber substrate, and baking to enable the copper foils to be combined with the glass fiber substrate through the adhesive layer;
3) forming conductive columns at the copper foil layers on the upper surface and the lower surface of the glass fiber substrate, and forming a packaging colloid on the surface of the copper foil, wherein the packaging colloid is coated on the conductive columns and covers the copper foil;
4) grinding the packaging colloid at the position of the conductive post until the conductive post is exposed out of the packaging colloid; detaching a plate to expose the copper foil on the glass fiber substrate and forming an electroplated layer on the copper foil;
5) etching the copper foil layer exposed from the electroplated layer, and forming a first conductive circuit layer and a second conductive circuit layer on the copper foil layer on the upper surface and the lower surface;
6) manufacturing the electroplated layer on the surface of the first conductive circuit layer or the second conductive circuit layer to form a solder ball pad, and forming a solder mask layer on the surface of the formed solder ball pad;
7) and grinding the solder mask layer until the solder ball pads are completely exposed to obtain the chip packaging substrate.
2. The method of manufacturing a chip substrate according to claim 1, wherein: in the step 1), the thickness of the glass fiber substrate is 100-140 μm, and the thickness of the adhesive layer is 10-30 μm.
3. The method of manufacturing a chip substrate according to claim 2, wherein: in the step 1), a curing process is performed before punching the glass fiber substrate on which the adhesive layer is formed, and the curing process cures the adhesive layer by heating and curing at least once.
4. The method of manufacturing a chip substrate according to claim 1, wherein: in step 4), the electroplated layer is an electroplated copper layer.
5. The method of manufacturing a chip substrate according to claim 1, wherein: in step 5), the cross section of the first conductive line layer and the second conductive line layer is formed to be in a truncated cone shape.
6. The method of manufacturing a chip substrate according to claim 1, wherein: in step 6), the surface of the formed solder ball pad is cleaned and surface treated, and an organic solder protection film is formed on the surface of the solder ball pad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011247992.XA CN112349599A (en) | 2020-11-10 | 2020-11-10 | Manufacturing method of chip substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011247992.XA CN112349599A (en) | 2020-11-10 | 2020-11-10 | Manufacturing method of chip substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112349599A true CN112349599A (en) | 2021-02-09 |
Family
ID=74363190
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011247992.XA Pending CN112349599A (en) | 2020-11-10 | 2020-11-10 | Manufacturing method of chip substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112349599A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103794515A (en) * | 2012-10-30 | 2014-05-14 | 宏启胜精密电子(秦皇岛)有限公司 | Chip packaging substrate, chip packaging structure, and method for manufacturing same |
| CN104616996A (en) * | 2013-11-05 | 2015-05-13 | 景硕科技股份有限公司 | Manufacturing method of chip card substrate |
| CN104701185A (en) * | 2013-12-06 | 2015-06-10 | 富葵精密组件(深圳)有限公司 | Package substrate, package structure, and package substrate making method |
| CN105097757A (en) * | 2014-04-21 | 2015-11-25 | 富葵精密组件(深圳)有限公司 | Chip packaging substrate, chip packaging structure and manufacturing method |
| CN106571355A (en) * | 2015-10-12 | 2017-04-19 | 碁鼎科技秦皇岛有限公司 | Chip package substrate manufacturing method and chip package substrate |
-
2020
- 2020-11-10 CN CN202011247992.XA patent/CN112349599A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103794515A (en) * | 2012-10-30 | 2014-05-14 | 宏启胜精密电子(秦皇岛)有限公司 | Chip packaging substrate, chip packaging structure, and method for manufacturing same |
| CN104616996A (en) * | 2013-11-05 | 2015-05-13 | 景硕科技股份有限公司 | Manufacturing method of chip card substrate |
| CN104701185A (en) * | 2013-12-06 | 2015-06-10 | 富葵精密组件(深圳)有限公司 | Package substrate, package structure, and package substrate making method |
| CN105097757A (en) * | 2014-04-21 | 2015-11-25 | 富葵精密组件(深圳)有限公司 | Chip packaging substrate, chip packaging structure and manufacturing method |
| CN106571355A (en) * | 2015-10-12 | 2017-04-19 | 碁鼎科技秦皇岛有限公司 | Chip package substrate manufacturing method and chip package substrate |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210209 |