CN112346664B - Data storage method, device, equipment and medium - Google Patents

Data storage method, device, equipment and medium Download PDF

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Publication number
CN112346664B
CN112346664B CN202011374170.8A CN202011374170A CN112346664B CN 112346664 B CN112346664 B CN 112346664B CN 202011374170 A CN202011374170 A CN 202011374170A CN 112346664 B CN112346664 B CN 112346664B
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mode
storage
target field
determining
layer
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CN112346664A (en
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陈湖广
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Hunan Goke Microelectronics Co Ltd
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Hunan Goke Microelectronics Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • G06F3/0634Configuration or reconfiguration of storage systems by changing the state or mode of one or more devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The application discloses a data storage method, a device, equipment and a medium, wherein the method comprises the following steps: reading a target field in a local one-time programmable register; determining a storage mode type corresponding to the target field; and determining a default storage mode based on the storage mode type, and storing data in the default storage mode. Therefore, the default working mode of the flash memory can be flexibly changed by setting the target field in the one-time programmable register, so that different SSD main control manufacturers are compatible, the mode entering mode of the flash memory is not limited, and the compatibility of the flash memory is improved.

Description

Data storage method, device, equipment and medium
Technical Field
The present invention relates to the field of memories, and in particular, to a data storage method, apparatus, device, and medium.
Background
Currently, there are four general memory modes for Nand flash memory, namely SLC (i.e., single Level Cell, single layer memory Cell) mode, MLC (i.e., mult Level Cell) mode, TLC (i.e., triple Level Cell, triple layer memory Cell) mode, and QLC (i.e., quad Level Cell) mode. Although Nand flash memory has been developed to TLC, i.e., 3 bits of data can be stored in one memory cell, and QLC, i.e., 4 bits of data can be stored in one memory cell; however, in each SSD (Solid State Disk) scheme, in order to ensure that code files stored in a Nand flash memory have better data retention, an SSD master manufacturer generally still uses SLC mode to store firmware codes; however, due to the diversity of development, the ways of entering SLC modes of Nand flash memories of different categories are different, and different entering ways may be used in different periods, so that compatibility with different entering ways is required.
In the general technology, the SSD master manufacturer is compatible with the mode that the Nand flash memory enters the SLC mode by designing a starting code (i.e. a boot code), but the mode selection mode is limited by the compatibility of the boot code, and even if the compatibility of the boot code is continuously improved, the incompatibility condition exists. In addition, since boot codes are usually fixed in the ROM of the chip, in order to improve compatibility with different Nand flash memories, chip resources such as GPIO and OTP are usually used, resulting in resource waste.
Disclosure of Invention
In view of the above, the present invention aims to provide a data storage method, apparatus, device and medium, which can improve compatibility of Nand flash memory. The specific scheme is as follows:
in a first aspect, the present application discloses a data storage method applied to a flash memory, including:
reading a target field in a local one-time programmable register;
determining a storage mode type corresponding to the target field;
and determining a default storage mode based on the storage mode type, and storing data in the default storage mode.
Optionally, before the reading the target field in the local otp register, the method further includes:
receiving a mode entering instruction sent by a main control chip;
and carrying out a power-on initialization flow based on the mode entering instruction.
Optionally, the creating process of the target field includes:
one bit is added in the one-time programmable register as the target field for identifying the storage mode type.
Optionally, the determining the storage mode type corresponding to the target field includes:
if the target field is a first preset identifier, determining that the storage mode type corresponding to the target field is a single-layer storage unit mode;
and if the target field is a second preset identifier, determining that the storage mode type corresponding to the target field is a multi-layer storage unit mode.
Optionally, after adding a bit in the otp register as the target field, the method further includes:
establishing an association relation between the first preset identifier and the single-layer storage unit mode;
and establishing an association relation between the second preset identifier and the multi-layer storage unit mode.
Optionally, the determining a default storage mode based on the storage mode type includes:
if the preset storage mode type is a single-layer storage unit mode, determining that the default storage mode is the single-layer storage unit mode;
if the preset storage mode type is a multi-layer storage unit mode, determining that the default storage mode is any one of a double-layer storage unit mode, a three-layer storage unit mode and a four-layer storage unit mode.
In a second aspect, the present application discloses a data storage device comprising:
the target field reading module is used for reading target fields in the local one-time programmable register;
the storage mode type determining module is used for determining the storage mode type corresponding to the target field;
and the default storage mode determining module is used for determining a default storage mode based on the storage mode type and storing data in the default storage mode.
Optionally, the default storage mode determining module includes:
the first judging unit is used for determining that the default storage mode is a single-layer storage unit mode if the preset storage mode type is the single-layer storage unit mode;
and the second judging unit is used for determining that the default storage mode is any one of a double-layer storage unit mode, a three-layer storage unit mode and a four-layer storage unit mode if the preset storage mode type is a multi-layer storage unit mode.
In a third aspect, the present application discloses an electronic device comprising:
a memory for storing a computer program;
and a processor for executing the computer program to implement the aforementioned data storage method.
In a fourth aspect, the present application discloses a computer-readable storage medium for storing a computer program; wherein the computer program when executed by a processor implements the aforementioned data storage method.
According to the method, the device and the system, the target field in the local one-time programmable register is read, the storage mode type corresponding to the target field is determined, the default storage mode is determined based on the storage mode type, and data storage is conducted in the default storage mode. Therefore, the default working mode of the flash memory can be flexibly changed by setting the target field in the one-time programmable register, so that different SSD main control manufacturers are compatible, the limitation of the mode entering mode of the flash memory is avoided, and the compatibility of the flash memory is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a data storage method provided in the present application;
FIG. 2 is a flowchart of a specific data storage method provided in the present application;
FIG. 3 is a schematic diagram of a data storage device according to the present disclosure;
fig. 4 is a block diagram of an electronic device provided in the present application.
Detailed Description
In the prior art, the problem of compatibility of the flash memory in a mode selection mode is solved by improving the compatibility of boot codes, but the mode has limitations, and the compatibility of the flash memory is reduced. In order to overcome the technical problems, the application provides a data storage method based on a flash memory, which can improve the compatibility of the flash memory.
The embodiment of the application discloses a data storage method applied to a flash memory, and referring to fig. 1, the method may include the following steps:
step S11: the target field in the local otp register is read.
In this embodiment, first, a target field preset in a local One-Time programmable (OTP) register is read to perform a relevant configuration operation for a storage mode of the flash memory, and a location of the target field may be set by a flash memory manufacturer according to an actual application situation; the data size of the target field may be 1bit. Therefore, by adding the configuration of a 1bit field aiming at the storage mode in the OTP, a flash memory manufacturer can be convenient to purposefully modify the corresponding configuration in the flash memory packaging test stage.
Step S12: and determining the storage mode type corresponding to the target field.
In this embodiment, after reading the target field in the otp register, the storage mode type corresponding to the configuration is identified based on the target field, where the storage mode type may include a single-layer storage unit mode and a multi-layer storage unit mode.
Step S13: and determining a default storage mode based on the storage mode type, and storing data in the default storage mode.
In this embodiment, after determining the storage mode type, determining a default storage mode according to the determined storage mode type, so that the flash memory performs data storage based on the default storage mode; in this embodiment, the flash memory may be Nandflash. It can be understood that if the storage mode type is a single-layer storage mode, the default storage mode can be confirmed to be a single-layer storage unit mode; if the storage mode type is a multi-layer storage mode, the default storage mode can be confirmed to be a double-layer storage unit mode, a three-layer storage unit mode or a four-layer storage unit mode.
As can be seen from the above, in this embodiment, by reading a target field in a local otp register, then determining a storage mode type corresponding to the target field, and finally determining a default storage mode based on the storage mode type, and performing data storage in the default storage mode. Therefore, the default working mode of the flash memory can be flexibly changed by setting the target field in the one-time programmable register, so that different SSD main control manufacturers are compatible, the limitation of the mode entering mode of the flash memory is avoided, and the compatibility of the flash memory is improved.
The embodiment of the application discloses a specific data storage method applied to a flash memory, and referring to fig. 2, the method may include the following steps:
step S21: receiving a mode entering instruction sent by a main control chip; and carrying out a power-on initialization flow based on the mode entering instruction.
In this embodiment, after the flash memory is reset, a mode entry instruction, for example, a set feature instruction, an A2 command, a DA command, etc., sent by the main control chip, i.e., the SSD main control is received; after receiving the mode entering instruction, the power-on initialization process is started to be executed.
Step S22: the target field in the local otp register is read.
In this embodiment, after entering the power-on initialization process, the flash memory actively reads the target field in the local otp register. In this embodiment, the creating process of the target field may include: one bit is added in the one-time programmable register as the target field for identifying the storage mode type. It will be appreciated that the target field is created by adding 1bit of characters in advance in a one-time programmable register, i.e. an OTP register. It is also possible to add a plurality of bit characters in the OTP register in advance to create the above-mentioned target field.
Step S23: if the target field is a first preset identifier, determining that the storage mode type corresponding to the target field is a single-layer storage unit mode; and if the target field is a second preset identifier, determining that the storage mode type corresponding to the target field is a multi-layer storage unit mode.
In this embodiment, after the target field is read, whether the character of the target field is a first preset identifier or a second preset identifier is determined, and if the target field is the first preset identifier, the storage mode type corresponding to the target field is determined to be a single-layer storage unit mode; if the target field is the second preset identifier, determining that the storage mode type corresponding to the target field is a multi-layer storage unit mode. It can be understood that the target field may be "1" or "0", or may be different character segments composed of 1/0, that is, two different target fields are preset, so that two storage unit modes can be respectively represented. For example, when the target field is "1" or "0", and the first preset identifier is "1" and the second preset identifier is "0", and when the target field is identified as the first preset identifier, determining that the storage mode type corresponding to the target field is a single-layer storage unit mode; and if the target field is distinguished to be the second preset identifier, determining that the storage mode type corresponding to the target field is a multi-layer storage unit mode.
In this embodiment, after adding a bit in the otp register as the target field, the method may further include: establishing an association relation between the first preset identifier and the single-layer storage unit mode; and establishing an association relation between the second preset identifier and the multi-layer storage unit mode. It can be appreciated that the character "1" can be used as a first preset identifier and an association can be created with the single-layer memory cell pattern before adding the target field to the otp register; also, the character "0" is used as a second preset identifier, and an association relationship is created with the multi-layered memory cell pattern. So that the flash memory determines the corresponding storage mode type after reading the target field.
Step S24: if the preset storage mode type is a single-layer storage unit mode, determining that the default storage mode is the single-layer storage unit mode; if the preset storage mode type is a multi-layer storage unit mode, determining that the default storage mode is any one of a double-layer storage unit mode, a three-layer storage unit mode and a four-layer storage unit mode.
From the above, after receiving the mode entry instruction sent by the main control chip, the flash memory actively reads the target field in the local one-time programmable register, determines the default storage mode according to the target field, and stores data based on the determined default storage mode. Therefore, compared with the prior art, the method and the device depend on a master control manufacturer to promote the compatibility of boot codes and know the follow-up programming of the memory manufacturer to improve the compatibility of the flash memory, the method and the device have the advantages that the default storage mode of the flash memory is specified by adding one bit in the OTP register, after the master control performs power-on reset operation on the flash memory, the flash memory actively reads and enters the default storage mode, the master control does not need to switch modes in the boot codes any more, program codes related to firmware of a product are directly read, and the compatibility of the flash memory is improved. The invention is easy to realize, occupies less resources, and only needs 1bit OTP resources.
Correspondingly, the embodiment of the application also discloses a data storage device, referring to fig. 3, the device comprises:
a target field reading module 11, configured to read a target field in a local otp register;
a storage mode type determining module 12, configured to determine a storage mode type corresponding to the target field;
and the default storage mode determining module 13 is used for determining a default storage mode based on the storage mode type and storing data in the default storage mode.
In this embodiment, the target field in the local otp register is read, then the storage mode type corresponding to the target field is determined, finally the default storage mode is determined based on the storage mode type, and the data is stored in the default storage mode. Therefore, the default working mode of the flash memory can be flexibly changed by setting the target field in the one-time programmable register, so that different SSD main control manufacturers are compatible, the limitation of the mode entering mode of the flash memory is avoided, and the compatibility of the flash memory is improved.
In some specific embodiments, the storage mode type determining module 12 may specifically include:
a first type determining unit, configured to determine that, if the target field is a first preset identifier, the storage mode type corresponding to the target field is a single-layer storage unit mode;
and the second type determining unit is used for determining that the storage mode type corresponding to the target field is a multi-layer storage unit mode if the target field is a second preset identifier.
In some specific embodiments, the default storage mode determining module 13 may specifically include:
the first mode determining unit is used for determining that the default storage mode is a single-layer storage unit mode if the preset storage mode type is the single-layer storage unit mode;
and the second mode determining unit is used for determining that the default storage mode is any one of a double-layer storage unit mode, a three-layer storage unit mode and a four-layer storage unit mode if the preset storage mode type is a multi-layer storage unit mode.
Further, the embodiment of the application further discloses an electronic device, and referring to fig. 4, the content in the drawing should not be considered as any limitation on the scope of use of the application.
Fig. 4 is a schematic structural diagram of an electronic device 20 according to an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input output interface 25, and a communication bus 26. Wherein the memory 22 is configured to store a computer program that is loaded and executed by the processor 21 to implement the relevant steps of the data storage method disclosed in any of the foregoing embodiments.
In this embodiment, the power supply 23 is configured to provide an operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and an external device, and the communication protocol to be followed is any communication protocol applicable to the technical solution of the present application, which is not specifically limited herein; the input/output interface 25 is used for acquiring external input data or outputting external output data, and the specific interface type thereof may be selected according to the specific application requirement, which is not limited herein.
The memory 22 may be a carrier for storing resources, such as a read-only memory, a random access memory, a magnetic disk, or an optical disk, and the resources stored thereon include an operating system 221, a computer program 222, and data 223 including a storage mode, and the storage mode may be transient storage or permanent storage.
The operating system 221 is used for managing and controlling various hardware devices on the electronic device 20 and the computer program 222, so as to implement the operation and processing of the processor 21 on the mass data 223 in the memory 22, which may be Windows Server, netware, unix, linux, etc. The computer program 222 may further comprise a computer program capable of performing other specific tasks in addition to the computer program capable of performing the data storage method performed by the electronic device 20 as disclosed in any of the preceding embodiments.
Further, the embodiment of the application also discloses a computer storage medium, in which computer executable instructions are stored, and when the computer executable instructions are loaded and executed by a processor, the steps of the data storage method disclosed in any of the previous embodiments are implemented.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The foregoing has described in detail a data storage method, apparatus, device and medium according to the present invention, and specific examples are provided herein to illustrate the principles and embodiments of the present invention, and the above examples are only for aiding in the understanding of the method and core idea of the present invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.

Claims (8)

1. A data storage method, applied to a flash memory, comprising:
reading a preset target field in a local one-time programmable register; the creation process of the target field comprises the following steps: adding a bit in the one-time programmable register as the target field for identifying a storage mode type;
determining a storage mode type corresponding to the target field; wherein the storage mode type includes: a single-layer memory cell mode, a multi-layer memory cell mode;
determining a default storage mode based on the storage mode type, and storing data in the default storage mode;
before the reading of the target field in the local otp register, the method further comprises:
receiving a mode entering instruction sent by a main control chip;
and carrying out a power-on initialization flow based on the mode entering instruction.
2. The data storage method according to claim 1, wherein the determining the storage mode type corresponding to the target field includes:
if the target field is a first preset identifier, determining that the storage mode type corresponding to the target field is a single-layer storage unit mode;
and if the target field is a second preset identifier, determining that the storage mode type corresponding to the target field is a multi-layer storage unit mode.
3. The data storage method according to claim 2, wherein after adding one bit in the one-time programmable register as the target field, further comprising:
establishing an association relation between the first preset identifier and the single-layer storage unit mode;
and establishing an association relation between the second preset identifier and the multi-layer storage unit mode.
4. The data storage method of claim 2, wherein the determining a default storage mode based on the storage mode type comprises:
if the storage mode type corresponding to the target field is a single-layer storage unit mode, determining that the default storage mode is the single-layer storage unit mode;
and if the storage mode type corresponding to the target field is a multi-layer storage unit mode, determining that the default storage mode is any one of a double-layer storage unit mode, a three-layer storage unit mode and a four-layer storage unit mode.
5. A data storage device for use in a flash memory, comprising:
the target field reading module is used for reading a preset target field in the local one-time programmable register; the creation process of the target field comprises the following steps: adding a bit in the one-time programmable register as the target field for identifying a storage mode type;
the storage mode type determining module is used for determining the storage mode type corresponding to the target field; the storage mode types include: a single-layer memory cell mode, a multi-layer memory cell mode;
the default storage mode determining module is used for determining a default storage mode based on the storage mode type and storing data in the default storage mode;
before the target field reading module reads the target field in the local one-time programmable register, the data storage device is configured to:
receiving a mode entering instruction launched by a main control chip;
and carrying out a power-on initialization flow based on the mode entering instruction.
6. The data storage device of claim 5, wherein the default storage mode determination module comprises:
the first mode determining unit is used for determining that the default storage mode is a single-layer storage unit mode if the storage mode type corresponding to the target field is the single-layer storage unit mode;
and the second mode determining unit is used for determining that the default storage mode is any one of a double-layer storage unit mode, a three-layer storage unit mode and a four-layer storage unit mode if the storage mode type corresponding to the target field is a multi-layer storage unit mode.
7. An electronic device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the data storage method of any one of claims 1 to 4.
8. A computer-readable storage medium storing a computer program; wherein the computer program when executed by a processor implements a data storage method as claimed in any one of claims 1 to 4.
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