CN112332850A - Broadband waveform compensation equipment and method based on FPGA - Google Patents
Broadband waveform compensation equipment and method based on FPGA Download PDFInfo
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Abstract
One embodiment of the invention discloses broadband waveform compensation equipment and a method based on an FPGA, wherein the equipment comprises the following steps: the system comprises an FPGA processor, a digital-to-analog converter, a signal propagation link, an oscilloscope and a PC (personal computer); the FPGA processor is internally integrated with an FIR filter which is used for transmitting a digital code stream of a signal to be transmitted to the digital-to-analog converter and ensuring that the digital code stream carries amplitude compensation information aiming at the whole analog channel; the digital-to-analog converter is used for converting the digital code stream transmitted by the FPGA into an original analog signal; the signal propagation link is used for carrying out frequency conversion and operation on an original analog signal output by the digital-to-analog converter, selecting a required frequency band according to actual requirements and amplifying output power; the oscilloscope is used for receiving and measuring the analog signal transmitted by the signal propagation link to obtain waveform data and transmitting the measurement result to the PC; the PC is used for receiving and analyzing waveform data transmitted by the oscilloscope, extracting an amplitude fitting curve of the analog signal, and calculating a compensation coefficient inversely according to the amplitude curve.
Description
Technical Field
The invention relates to the field of communication, in particular to broadband waveform compensation equipment and a broadband waveform compensation method based on an FPGA.
Background
In the field of communications and radar, the generation of the original transmitted signal is typically accomplished using a digital-to-analog converter (DAC). The analog signal generated by the DAC carries all the information to be transmitted, and the frequency and power are important indexes. Because of the limitation of the physical structure of the DAC, the output power of the DAC shows the SINC modulation phenomenon along with the signal frequency, the power fluctuation is extremely large in a larger output bandwidth, in order to make up for the defect, an inverse SINC filter is generally integrated in a current DAC device, and the power is corrected by using a digital signal processing means before a digital signal is converted into an analog signal, so that the output power of the DAC is relatively flat.
In general, the original waveform generated by the DAC is not directly fed into the antenna to be converted into electromagnetic waves to be radiated to the outside. Before actually being transmitted to the antenna, the transmitted signal generally passes through analog devices such as a switch, a filter, a power amplifier, a frequency converter and the like. Each device has unique frequency response, and a relatively flat broadband waveform obtained by the DAC after being corrected by the inverse SINC is rugged after passing through the devices, so that the system index requirements cannot be met. This phenomenon is particularly apparent when transmitting broadband signals.
Disclosure of Invention
Accordingly, the present invention addresses the above-identified problems by providing an FPGA-based wideband waveform compensation apparatus and method. The invention takes the complete transmission link of the transmitting signal into consideration aiming at the practical application scene of the broadband waveform, uses the means of digital signal processing and takes the practical effect as the guide to adjust the power of the broadband signal at the data source, so that the broadband power consistency of the system under the real application scene reaches a more ideal state.
In order to achieve the purpose, the invention adopts the following technical scheme:
one aspect of the present invention provides a wideband waveform compensation apparatus based on an FPGA, the apparatus comprising: the system comprises an FPGA processor, a digital-to-analog converter, a signal propagation link, an oscilloscope and a PC (personal computer);
wherein,
the FPGA processor is internally integrated with an FIR filter for transmitting the digital code stream of the signal to be transmitted to the digital-to-analog converter;
the digital-to-analog converter is used for converting the digital code stream transmitted by the FPGA into an original analog signal and outputting the original analog signal to the signal transmission link;
the signal propagation link is used for carrying out frequency conversion and operation on an original analog signal output by the digital-to-analog converter, selecting a required frequency band according to actual requirements, amplifying output power and sending the processed analog signal to the oscilloscope;
the oscilloscope is used for receiving and measuring the analog signal transmitted by the signal propagation link to obtain waveform data and transmitting the obtained waveform data to the PC;
and the PC is used for receiving and analyzing waveform data transmitted by the oscilloscope, extracting an amplitude fitting curve of the analog signal and calculating a compensation coefficient reversely according to the amplitude curve.
In a specific embodiment, the digital-to-analog converter internally integrates a digital frequency conversion and inverse SINC filtering digital signal processing module.
In a specific embodiment, the oscilloscope is an oscilloscope with a sampling rate of 100Gsps that is compatible with a 20GHz analog bandwidth.
In a specific embodiment, when the analog signal power of the signal propagation link is too large to exceed the scope of the oscilloscope, the apparatus further includes an attenuator for attenuating the power of the analog signal and sending the attenuated analog signal to the oscilloscope.
In a specific embodiment, the PC and the FPGA processor include: a PC program module and an FPGA program module;
wherein,
the PC program module is used for receiving and analyzing waveform data transmitted by the oscilloscope;
the FPGA program module is used for sending digital domain waveform data flow to the digital-to-analog converter;
the PC program module comprises: the device comprises a data import module, a preprocessing module, a data fitting module, a PC (personal computer) working mode judging module, a waveform data generating module and a filter coefficient generating module;
wherein,
the data import module is used for reading data acquired by the oscilloscope, converting the data into a format which can be identified by software, and transmitting the data in the format into the preprocessing module;
the preprocessing module is used for reading data acquired by the oscilloscope and transmitted by the data import module, calculating the length of the data to be analyzed by matching with a preset frequency point and a bandwidth, and providing input for the subsequent data fitting module;
the data fitting module is used for receiving the data transmitted by the preprocessing module, extracting an actual amplitude-frequency curve of the analog signal and entering the PC working mode judging module after the extraction is finished;
the PC machine working mode judging module is used for judging the PC machine working mode, and the PC machine has two working modes: a waveform pattern and a coefficient pattern;
entering a waveform data generation module when the PC working mode judgment module judges that the PC working mode is a waveform mode;
entering a filter coefficient generating module when the PC working mode judging module judges that the PC working mode is a coefficient mode;
the waveform data generation module is used for processing uncompensated original waveform data to be transmitted by the FPGA according to a compensation curve, so that an amplitude-frequency curve of an original digital domain baseband signal is complementary with an amplitude-frequency curve shape of an analog transmission link to obtain a waveform data file;
the filter coefficient generating module is used for solving FIR filter coefficients used in the FPGA to obtain a filter coefficient file;
the FPGA program module comprises: the device comprises a file cache module, an FPGA working mode judging module, a waveform data loading module, a coefficient loading module, a waveform generating module and a DAC driving program module;
wherein,
the file cache module is used for storing a waveform data file or a filter coefficient file obtained by the calculation of a PC program for subsequent calling, and entering a next FPGA working mode judgment module after caching;
the FPGA working mode judging module is used for judging the FPGA working mode, and corresponds to the PC program module, and the FPGA also has two working modes: a waveform pattern and a coefficient pattern;
entering a waveform data loading module when the FPGA working mode judging module judges that the FPGA working mode is a waveform mode;
entering a coefficient loading module when the FPGA working mode judging module judges that the FPGA working mode is the coefficient mode;
the waveform data loading module is used for sequentially sending the waveform data files in the file cache module to the DAC driver module according to the time sequence requirement to realize the function of a data transmission channel;
the coefficient loading module is used for reading a filter coefficient file from the file cache module and sequentially and accurately loading coefficient data to the internal coefficient storage position of the FIR filter according to the self physical structure of the filter; enabling the FIR filter to have a transmission function required by a system and enter a next waveform generation module;
the waveform generation module generates an original digital baseband signal of a designated frequency point and a designated bandwidth according to a control instruction, and the signal is not compensated, so that the module calls an FIR filter which is loaded by the coefficient loading module after the coefficient loading to realize an amplitude compensation function, and sends an obtained result to the DAC driver module;
the DAC driver module converts the upper-level data stream into a data format specified by the DAC chip, and the data format is an information transmission channel between the FPGA and the DAC chip.
In a specific embodiment, the preprocessing module intercepts the valid data portion of the oscilloscope data, performs spectral analysis on the valid data portion, and converts time domain information into frequency domain information by using FFT transformation.
In a specific embodiment, the data fitting module can eliminate noise disturbance, and simultaneously processes spectral sideband oscillation caused by Gibbs phenomenon caused by pulse-type essential characteristics of the analog signal to weaken oscillation amplitude; and subtracting the obtained fitted curve from an ideal amplitude-frequency characteristic curve of the analog signal to obtain a final compensation curve.
In a specific embodiment, the waveform mode represents that each data point sent to the DAC by the FPGA is stored in the FPGA in advance, and the PC forwards all the data points to the FPGA after the compensation is finished in the mode; the coefficient mode represents that the FPGA device generates waveform data in real time and sends the waveform data to the DAC, amplitude compensation processing of the mode runs inside the FPGA, and a PC is required to complete calculation of compensation coefficients and store the compensation coefficients in an FPGA chip.
In a specific embodiment, the waveform data generating module is specifically implemented based on FFT operation, and performs inverse FFT processing after multiplying the FFT operation result of the original baseband signal by the compensation curve to obtain the final required data.
In a specific embodiment, the filter coefficient generation module executes compensation operation of digital domain baseband data in an FPGA under a coefficient mode, the FPGA implements a compensation function through an FIR filter, and the PC needs to implement calculation of FIR coefficients by performing inverse FFT processing on a compensation curve and obtaining final coefficients according to FIR orders.
In a specific embodiment, in the waveform mode, the FPGA directly sends waveform data stored in a file cache, and the data is directly forwarded to a DAC chip without any processing; and in the coefficient mode, the stored filter coefficients are loaded into the FIR filter, an original baseband waveform is generated in real time in the FPGA according to a control command, and the waveform is transmitted to the DAC after passing through the amplitude compensation FIR filter.
The invention also provides a broadband waveform compensation method based on FPGA, which utilizes the equipment to carry out broadband waveform compensation and comprises the following steps:
s101: the FPGA processor transmits a digital code stream of a signal to be transmitted to the digital-to-analog converter;
s102: the digital-to-analog converter converts the digital code stream transmitted by the FPGA into an original analog signal and outputs the original analog signal to a signal transmission link;
s103: the signal propagation link carries out frequency conversion and operation on an original analog signal output by the digital-to-analog converter, selects a required frequency band according to actual requirements, amplifies output power and sends the processed analog signal to the oscilloscope;
s104: the oscilloscope receives and measures the analog signal sent by the signal propagation link to obtain waveform data, and transmits the obtained waveform data to the PC;
s105: and the PC receives and analyzes waveform data transmitted by the oscilloscope, extracts an amplitude fitting curve of the analog signal, and calculates a compensation coefficient inversely according to the amplitude curve.
The invention has the following beneficial effects:
aiming at the actual application scene of the broadband waveform, the invention takes the complete transmission link of the transmitting signal into consideration, uses the means of digital signal processing and takes the actual effect as the guide, and adjusts the power of the broadband signal (namely the analog signal) at the data source, so that the broadband power consistency of the system under the actual application scene reaches a more ideal state.
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In order to more clearly illustrate the embodiments of the present application or the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are one embodiment of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 shows a block diagram of a signal transmission system in a practical application scenario according to an embodiment of the present invention.
FIG. 2 shows a schematic diagram of a broadband amplitude compensation test system hardware connection scheme according to one embodiment of the invention.
FIG. 3 shows a block diagram of a PC software program according to one embodiment of the invention.
FIG. 4 shows a block diagram of an FPGA software routine according to one embodiment of the present invention.
Detailed Description
In order to make the technical solution of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and examples. The present invention will be described in detail with reference to specific examples, but the present invention is not limited to these examples. Variations and modifications may be made by those skilled in the art without departing from the principles of the invention and should be considered within the scope of the invention.
As shown in fig. 1, fig. 1 is a block diagram of a signal transmission system in a practical application scenario according to an embodiment of the present invention.
FIG. 2 shows a schematic diagram of a broadband amplitude compensation test system hardware connection scheme according to one embodiment of the invention.
Fig. 2 shows that an FPGA-based wideband waveform compensation apparatus provided by an embodiment of the present invention includes: the system comprises an FPGA processor, a digital-to-analog converter, a signal propagation link, an oscilloscope and a PC (personal computer);
wherein,
the FPGA processor is internally integrated with an FIR filter which is used for transmitting the digital code stream of a signal to be transmitted to the digital-to-analog converter, ensuring that the digital code stream carries amplitude compensation information aiming at the whole analog channel and transmitting the digital code stream to the digital-to-analog converter;
the digital-to-analog converter is used for converting the digital code stream transmitted by the FPGA into an original analog signal and outputting the original analog signal to the signal transmission link; in addition, digital signal processing modules such as digital frequency conversion, inverse SINC filtering and the like are integrated in the DAC, so that the data signal processing pressure of an FPGA end can be relieved, and the load is balanced.
The signal propagation link comprises all transmission paths before analog signals output by the DAC are fed into the antenna radiation unit, and comprises a series of analog devices such as a filter, a switch, a frequency converter and a high-power amplifier. And the signal propagation link carries out frequency conversion and operation on the original analog signal output by the DAC, selects a required frequency band according to actual requirements, amplifies output power and sends the processed analog signal to the oscilloscope.
In this embodiment, the oscilloscope replaces the position of the antenna shown in fig. 1, receives and measures the analog signal transmitted from the signal propagation link to obtain waveform data, and transmits the obtained waveform data to the PC.
The selection of the oscilloscope needs to be adapted to the frequency point and the bandwidth of the system. In order to achieve a high-precision measurement result, a high-end instrument with a sampling rate of 100 Gsps/an analog bandwidth of 20GHz is ideal. When the analog signal power of the signal transmission link is too large and exceeds the range of the oscilloscope, an attenuator needs to be added in front of the oscilloscope, and the attenuator is calibrated in advance through a vector network analyzer, so that errors introduced by the attenuator are eliminated.
The PC is used for receiving and analyzing waveform data acquired by the oscilloscope, and has certain requirements on the PC memory due to large data volume, and the optimal memory of the PC is not less than 8G. The core function of the PC is to extract an amplitude fitting curve of the analog signal and calculate a compensation coefficient inversely according to the amplitude curve, so that the development work of the PC part mainly lies in data analysis software.
The software part comprises a PC program module and an FPGA program module which are both related to digital signal processing.
The PC program module is used for processing wideband waveform data collected by the oscilloscope, and a PC software program block diagram is shown in fig. 3, and as can be seen, the PC program module includes: the device comprises a data import module, a preprocessing module, a data fitting module, a PC (personal computer) working mode judging module, a waveform data generating module and a filter coefficient generating module;
wherein,
the data import module is used for reading data acquired by the oscilloscope, converting the data into a format which can be identified by software, and transmitting the data in the format into the preprocessing module;
the preprocessing module is used for reading oscilloscope sampling information transmitted by the data import module and calculating the length of data to be analyzed by matching with a preset frequency point and a bandwidth, intercepting an effective data part in oscilloscope data, performing spectrum analysis on the effective data part, converting time domain information into frequency domain information by using FFT (fast Fourier transform) conversion, and providing input for a subsequent data fitting module;
the data fitting module is a core part of a PC program module and realizes the extraction of the actual amplitude-frequency curve of the analog signal. Because of some inevitable noise interference in sampling of the oscilloscope, the frequency spectrum information output by the preprocessing module is actually a group of curves fluctuating up and down at an accurate amplitude, and the fluctuation error must be reduced to the minimum according to the statistical principle, so that the data returns to the true value. In addition to eliminating noise disturbance, the data fitting module also processes the frequency spectrum sideband oscillation caused by the Gibbs phenomenon caused by the pulse type essential characteristics of the analog signal, so that the oscillation amplitude is effectively weakened, and a more accurate measurement result of the frequency band edge amplitude is obtained. And subtracting the obtained fitted curve from an ideal amplitude-frequency characteristic curve of the analog signal to obtain a final compensation curve. The compensation curve is the effect that the digital domain signal should achieve after the compensation processing, and from the perspective of the signal and the system, the curve is the transfer function of the compensation system.
And entering a PC working mode judging module after the data fitting module.
The PC machine working mode judging module is used for judging the PC machine working mode, and the PC machine program module has two working modes: a waveform pattern and a coefficient pattern;
entering a waveform data generation module when the PC working mode judgment module judges that the PC working mode is a waveform mode;
entering a filter coefficient generating module when the PC working mode judging module judges that the PC working mode is a coefficient mode;
wherein,
the waveform mode represents that each data point sent to the DAC by the FPGA is stored in the FPGA in advance, and the PC needs to transfer all the data points to the FPGA after the data points are compensated in the mode. The coefficient mode represents that the FPGA device generates waveform data in real time and sends the waveform data to the DAC, and the amplitude compensation processing of the mode runs inside the FPGA, so that a PC is required to complete the calculation of the compensation coefficient and store the compensation coefficient in the FPGA chip.
The waveform data generation module is used for processing uncompensated original waveform data to be transmitted by the FPGA according to a compensation curve, so that an amplitude-frequency curve of an original digital domain baseband signal is complementary with an amplitude-frequency curve shape of an analog transmission link, and a waveform data file is obtained. The specific implementation mode is based on FFT operation, the FFT operation result of the original baseband signal is multiplied by a compensation curve, and then inverse FFT processing is carried out, so that the final required data is obtained.
And the filter coefficient generating module is used for solving FIR filter coefficients used in the FPGA to obtain a filter coefficient file. In the coefficient mode, compensation operation of digital domain baseband data is executed inside the FPGA, and the FPGA realizes a compensation function through an FIR filter. The PC needs to calculate the FIR coefficient by performing inverse FFT processing on the compensation curve and obtaining the final coefficient according to the FIR order.
The FPGA program module is used to send digital domain waveform data streams to the DAC, and the FPGA software program block diagram is shown in fig. 4.
As can be seen, the FPGA program module includes: the device comprises a file cache module, an FPGA working mode judging module, a waveform data loading module, a coefficient loading module, a waveform generating module and a DAC driving program module;
wherein,
the file cache module is used for storing a waveform data file or a filter coefficient file obtained by the calculation of a PC program for subsequent calling, and entering a next FPGA working mode judgment module after caching;
the FPGA working mode judging module is used for judging the FPGA working mode, and corresponds to the PC program module, and the FPGA also has two working modes: a waveform pattern and a coefficient pattern;
entering a waveform data loading module when the FPGA working mode judging module judges that the FPGA working mode is a waveform mode;
entering a coefficient loading module when the FPGA working mode judging module judges that the FPGA working mode is the coefficient mode;
in the waveform mode, the FPGA directly sends waveform data stored in a file cache, and the waveform data is directly forwarded to a DAC chip without any processing; and in the coefficient mode, the stored filter coefficients are loaded into the FIR filter, an original baseband waveform is generated in real time in the FPGA according to a control command, and the waveform is transmitted to the DAC after passing through the amplitude compensation FIR filter.
The waveform data loading module is used for sequentially sending the waveform data files in the file cache module to the DAC driver module according to the time sequence requirement to realize the function of a data transmission channel;
the coefficient loading module is used for reading the FIR filter coefficients from the file cache module and sequentially and accurately loading the coefficient data to the coefficient storage position in the FIR filter according to the physical structure of the filter; enabling the FIR filter to have a transmission function required by a system and enter a next waveform generation module;
the waveform generation module generates an original digital baseband signal of a designated frequency point and a designated bandwidth according to a control instruction, and the signal is not compensated, so that the module calls an FIR filter which is loaded by the coefficient loading module after the coefficient loading to realize an amplitude compensation function, and sends an obtained result to the DAC driver module;
the DAC driver module converts the upper-level data stream into a data format specified by the DAC chip, and the data format is an information transmission channel between the FPGA and the DAC chip.
In addition to the above device, an embodiment of the present invention further provides an FPGA-based wideband waveform compensation method implemented by the above device, including the following steps:
s101: the FPGA processor transmits a digital code stream of a signal to be transmitted to the digital-to-analog converter;
s102: the digital-to-analog converter converts the digital code stream transmitted by the FPGA into an original analog signal and outputs the original analog signal to a signal transmission link;
s103: the signal propagation link carries out frequency conversion and operation on an original analog signal output by the digital-to-analog converter, selects a required frequency band according to actual requirements, amplifies output power and sends the processed analog signal to the oscilloscope;
s104: the oscilloscope receives and measures the analog signal sent by the signal propagation link to obtain waveform data, and transmits the obtained waveform data to the PC;
s105: and the PC receives and analyzes waveform data transmitted by the oscilloscope, extracts an amplitude fitting curve of the analog signal, and calculates a compensation coefficient inversely according to the amplitude curve.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations or modifications may be made on the basis of the above description, and all embodiments may not be exhaustive, and all obvious variations or modifications may be included within the scope of the present invention.
Claims (12)
1. An FPGA-based wideband waveform compensation apparatus, the apparatus comprising: the system comprises an FPGA processor, a digital-to-analog converter, a signal propagation link, an oscilloscope and a PC (personal computer);
wherein,
the FPGA processor is internally integrated with an FIR filter for transmitting the digital code stream of the signal to be transmitted to the digital-to-analog converter;
the digital-to-analog converter is used for converting the digital code stream transmitted by the FPGA into an original analog signal and outputting the original analog signal to the signal transmission link;
the signal propagation link is used for carrying out frequency conversion and operation on an original analog signal output by the digital-to-analog converter, selecting a required frequency band according to actual requirements, amplifying output power and sending the processed analog signal to the oscilloscope;
the oscilloscope is used for receiving and measuring the analog signal transmitted by the signal propagation link to obtain waveform data and transmitting the obtained waveform data to the PC;
and the PC is used for receiving and analyzing waveform data transmitted by the oscilloscope, extracting an amplitude fitting curve of the analog signal and calculating a compensation coefficient reversely according to the amplitude curve.
2. The apparatus of claim 1, wherein the digital-to-analog converter internally integrates a digital frequency conversion and inverse SINC filtering digital signal processing module.
3. The apparatus of claim 1, wherein the oscilloscope is an oscilloscope with a sampling rate of 100Gsps adapted to an analog bandwidth of 20 GHz.
4. The apparatus of claim 1, wherein when the analog signal power of the signal propagation link is too high to exceed the scope of the oscilloscope, the apparatus further comprises an attenuator for attenuating the power of the analog signal before sending to the oscilloscope.
5. The apparatus of claim 1, wherein the PC and FPGA processors include therein: a PC program module and an FPGA program module;
wherein,
the PC program module is used for receiving and analyzing waveform data transmitted by the oscilloscope;
the FPGA program module is used for sending digital domain waveform data flow to the digital-to-analog converter;
the PC program module comprises: the device comprises a data import module, a preprocessing module, a data fitting module, a PC (personal computer) working mode judging module, a waveform data generating module and a filter coefficient generating module;
wherein,
the data import module is used for reading data acquired by the oscilloscope, converting the data into a format which can be identified by software, and transmitting the data in the format into the preprocessing module;
the preprocessing module is used for reading data acquired by the oscilloscope and transmitted by the data import module, calculating the length of the data to be analyzed by matching with a preset frequency point and a bandwidth, and providing input for the subsequent data fitting module;
the data fitting module is used for receiving the data transmitted by the preprocessing module, extracting an actual amplitude-frequency curve of the analog signal and entering the PC working mode judging module after the extraction is finished;
the PC machine working mode judging module is used for judging the PC machine working mode, and the PC machine has two working modes: a waveform pattern and a coefficient pattern;
entering a waveform data generation module when the PC working mode judgment module judges that the PC working mode is a waveform mode;
entering a filter coefficient generating module when the PC working mode judging module judges that the PC working mode is a coefficient mode;
the waveform data generation module is used for processing uncompensated original waveform data to be transmitted by the FPGA according to a compensation curve, so that an amplitude-frequency curve of an original digital domain baseband signal is complementary with an amplitude-frequency curve shape of an analog transmission link to obtain a waveform data file;
the filter coefficient generating module is used for solving FIR filter coefficients used in the FPGA to obtain a filter coefficient file;
the FPGA program module comprises: the device comprises a file cache module, an FPGA working mode judging module, a waveform data loading module, a coefficient loading module, a waveform generating module and a DAC driving program module;
wherein,
the file cache module is used for storing a waveform data file or a filter coefficient file obtained by the calculation of a PC program for subsequent calling, and entering a next FPGA working mode judgment module after caching;
the FPGA working mode judging module is used for judging the FPGA working mode, and corresponds to the PC program module, and the FPGA also has two working modes: a waveform pattern and a coefficient pattern;
entering a waveform data loading module when the FPGA working mode judging module judges that the FPGA working mode is a waveform mode;
entering a coefficient loading module when the FPGA working mode judging module judges that the FPGA working mode is the coefficient mode;
the waveform data loading module is used for sequentially sending the waveform data files in the file cache module to the DAC driver module according to the time sequence requirement to realize the function of a data transmission channel;
the coefficient loading module is used for reading a filter coefficient file from the file cache module and sequentially and accurately loading coefficient data to the internal coefficient storage position of the FIR filter according to the self physical structure of the filter; enabling the FIR filter to have a transmission function required by a system and enter a next waveform generation module;
the waveform generation module generates an original digital baseband signal of a designated frequency point and a designated bandwidth according to a control instruction, and the signal is not compensated, so that the module calls an FIR filter which is loaded by the coefficient loading module after the coefficient loading to realize an amplitude compensation function, and sends an obtained result to the DAC driver module;
the DAC driver module converts the upper-level data stream into a data format specified by the DAC chip, and the data format is an information transmission channel between the FPGA and the DAC chip.
6. The apparatus of claim 5, wherein the preprocessing module intercepts the valid data portion of the oscilloscope data, performs spectral analysis on the intercepted valid data portion, and converts the time domain information into frequency domain information using an FFT transform.
7. The device of claim 5, wherein the data fitting module is capable of eliminating noise disturbance while processing spectral sideband oscillation caused by Gibbs phenomenon due to the pulse-type essential characteristics of the analog signal itself to weaken oscillation amplitude; and subtracting the obtained fitted curve from an ideal amplitude-frequency characteristic curve of the analog signal to obtain a final compensation curve.
8. The device according to claim 5, wherein the waveform mode represents that each data point sent to the DAC by the FPGA is stored in the FPGA in advance, and in the mode, the PC forwards all the data points to the FPGA after compensation is completed; the coefficient mode represents that the FPGA device generates waveform data in real time and sends the waveform data to the DAC, amplitude compensation processing of the mode runs inside the FPGA, and a PC is required to complete calculation of compensation coefficients and store the compensation coefficients in an FPGA chip.
9. The device of claim 5, wherein the waveform data generating module is specifically implemented based on FFT operation, and performs inverse FFT processing after multiplying an FFT operation result of an original baseband signal by a compensation curve to obtain final required data.
10. The device according to claim 5, wherein the filter coefficient generating module is in a coefficient mode, the compensation operation of the digital domain baseband data is executed inside the FPGA, the FPGA realizes the compensation function through the FIR filter, the PC needs to realize the calculation of the FIR coefficient by performing inverse FFT processing on the compensation curve and obtaining the final coefficient according to the FIR order.
11. The device of claim 5, wherein in the waveform mode, the FPGA directly sends the waveform data stored in the file buffer, and directly forwards the waveform data to the DAC chip without any processing on the data; and in the coefficient mode, the stored filter coefficients are loaded into the FIR filter, an original baseband waveform is generated in real time in the FPGA according to a control command, and the waveform is transmitted to the DAC after passing through the amplitude compensation FIR filter.
12. An FPGA-based wideband waveform compensation method for wideband waveform compensation using the apparatus of any one of claims 1-11, the method comprising the steps of:
s101: the FPGA processor transmits a digital code stream of a signal to be transmitted to the digital-to-analog converter;
s102: the digital-to-analog converter converts the digital code stream transmitted by the FPGA into an original analog signal and outputs the original analog signal to a signal transmission link;
s103: the signal propagation link carries out frequency conversion and operation on an original analog signal output by the digital-to-analog converter, selects a required frequency band according to actual requirements, amplifies output power and sends the processed analog signal to the oscilloscope;
s104: the oscilloscope receives and measures the analog signal sent by the signal propagation link to obtain waveform data, and transmits the obtained waveform data to the PC;
s105: and the PC receives and analyzes waveform data transmitted by the oscilloscope, extracts an amplitude fitting curve of the analog signal, and calculates a compensation coefficient inversely according to the amplitude curve.
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