CN112329364A - Information extraction method medium, information extraction device, circuit verification method medium, and circuit verification device - Google Patents

Information extraction method medium, information extraction device, circuit verification method medium, and circuit verification device Download PDF

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CN112329364A
CN112329364A CN202011228849.6A CN202011228849A CN112329364A CN 112329364 A CN112329364 A CN 112329364A CN 202011228849 A CN202011228849 A CN 202011228849A CN 112329364 A CN112329364 A CN 112329364A
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information
circuit component
target circuit
physical layout
name
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CN112329364B (en
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薛明达
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Haiguang Information Technology Co Ltd
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Haiguang Information Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/394Routing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]

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Abstract

The embodiment of the application provides an information extraction method, a medium and equipment in electronic automation design, and a circuit verification method, a medium and equipment. The information extraction method in the automatic design comprises the following steps: determining a name of a target circuit component in a physical layout, wherein the physical layout is the physical layout of the integrated circuit, and the target circuit component is a circuit component in the integrated circuit; extracting the information of the target circuit component from the physical layout according to the name of the target circuit component; and determining simplified information according to the information of the target circuit component, wherein the simplified information is the description of the target circuit component. The scheme in the embodiment of the application is beneficial to improving the efficiency of integrated circuit design.

Description

Information extraction method medium, information extraction device, circuit verification method medium, and circuit verification device
Technical Field
The embodiment of the application relates to the field of integrated circuits, in particular to a method, a medium and equipment for extracting information in electronic automation design, and a method, a medium and equipment for verifying a circuit.
Background
Electronic Design Automation (EDA) is an important application in the field of integrated circuits. The physical layout of the integrated circuit can be obtained through electronic automation design. The physical layout obtained based on the electronic automation design has more contents and larger data volume. How to make the physical layout meet the requirements of different scenes is called the problem to be solved urgently.
In addition, during the design of integrated circuits, circuit analysis is performed to ensure the correctness and feasibility of the circuit. How to improve the circuit analysis efficiency is an important problem in the field of integrated circuit design.
Content of application
In view of this, an embodiment of the present application provides an information extraction method in electronic automation design, including:
determining a name of a target circuit component in a physical layout, wherein the physical layout is the physical layout of the integrated circuit, and the target circuit component is a circuit component in the integrated circuit;
extracting the information of the target circuit component from the physical layout according to the name of the target circuit component;
and determining simplified information according to the information of the target circuit component, wherein the simplified information is the description of the target circuit component.
Optionally, the determining the name of the target circuit component in the physical layout includes:
determining a name in a library exchange file that points to the target circuit component;
determining that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout based on the incidence relation between the library exchange file and the physical layout;
the library exchange file is a file for describing the physical layout design of the integrated circuit in electronic design automation, and the physical layout and the library exchange file correspond to the same integrated circuit.
Optionally, the determining, based on the association relationship between the library exchange file and the physical layout, that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout includes:
confirming consistency of the name pointing to the target circuit component in the library exchange file and the physical layout;
and determining that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout.
Optionally, the target circuit component is an antenna component, the antenna component is a component that potentially generates an antenna effect, and determining the name of the target circuit component in the physical layout includes: determining the name of an antenna input port as a name pointing to the antenna component, wherein the antenna input port is an input port connected with a grid in the integrated circuit.
Optionally, the extracting, according to the name of the target circuit component, information of the target circuit component from the physical layout includes: and extracting information of metal connected with the antenna input port, information of a grid connected with the metal and information of a source drain connected with the grid.
Optionally, the determining reduced information according to the information of the target circuit component includes: and respectively calculating the antenna information of each antenna component in the physical layout according to the information of the metal connected with the antenna input port, the information of the grid and the information of the source and the drain, wherein the antenna information indicates the boundary of the antenna component with the antenna effect.
Optionally, the respectively calculating the antenna information of each antenna component in the physical layout includes: and respectively calculating the total metal area, the total grid area and the total source and drain area connected with the input ports of the antennas in the physical layout.
Optionally, the target circuit component is a power supply.
Optionally, determining the reduced information according to the information of the target circuit component includes at least one of:
screening the extracted information of the target circuit component, and determining the simplified information according to the screened content; and determining the format of the simplified information to be a format which is adaptive to a tool adopted by the integration of the top layer in the integrated circuit design.
The embodiment of the application also provides a circuit analysis method in the electronic automation design, which is used for carrying out circuit analysis based on the simplified information generated by the information extraction method in the electronic automation design.
The embodiment of the present application further provides an information extraction apparatus in electronic automation design, including:
a name determining unit adapted to determine a name of a target circuit component in a physical layout, the physical layout being a physical layout of an integrated circuit, the target circuit component being a circuit component in the integrated circuit;
the extraction unit is suitable for extracting the information of the target circuit component from the physical layout according to the name of the target circuit component;
and the simplified information determining unit is suitable for determining simplified information according to the information of the target circuit component, wherein the simplified information is description of the target circuit component.
Optionally, the name determining unit includes:
a first determining unit adapted to determine a name pointing to the target circuit component in a library exchange file;
a second determining unit, adapted to determine, based on the association relationship between the library exchange file and the physical layout, that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout;
the library exchange file is a file for describing the physical layout design of the integrated circuit in electronic design automation, and the physical layout and the library exchange file correspond to the same integrated circuit.
Optionally, the name determining unit includes:
a consistency confirmation unit adapted to confirm consistency of the name pointing to the target circuit component in the library exchange file and the physical layout;
and the name sharing unit is suitable for determining that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout.
Optionally, the target circuit component is an antenna component, the antenna component is a component potentially generating an antenna effect, and the name determining unit is adapted to determine a name of an antenna input port as a name pointing to the antenna component, the antenna input port being an input port connected to a gate in the integrated circuit.
Optionally, the extraction unit is adapted to extract information of a metal connected to the antenna input port, information of a gate connected to the metal, and information of a source and a drain connected to the gate.
Optionally, the simplified information determining unit is adapted to calculate antenna information of each antenna element in the physical layout according to information of metal connected to the antenna input port, information of the gate, and information of the source and the drain, respectively, where the antenna information indicates a limit of an antenna effect of the antenna element.
Optionally, the simplified information determining unit is adapted to calculate a total metal area, a total gate area, and a total source-drain area, which are connected to each of the antenna input ports in the physical layout, respectively.
Optionally, the target circuit component is a power supply.
Optionally, the simplified information determining unit includes at least one of a screening unit and a format adapting unit, and the screening unit is adapted to screen the extracted information of the target circuit component and determine the simplified information according to the screened content; the format adapting unit is suitable for determining the format of the simplified information as a format which is adapted to a tool adopted by the integration of the top layer in the integrated circuit design.
The embodiment of the application also provides a circuit analysis device in the electronic automation design, which is suitable for carrying out circuit analysis based on the simplified information output by the information extraction device in the electronic automation design.
The embodiment of the present application further provides a computer device, which includes a memory and a processor, where the memory stores a computer program that can be executed on the processor, and the processor executes the circuit analysis method in electronic automation design when executing the computer program.
The embodiment of the application also provides a computer-readable storage medium, on which a computer program is stored, wherein the computer program executes the method for extracting information in the electronic automation design when running.
The embodiment of the application also provides computer equipment which comprises a memory and a processor, wherein the memory is stored with a computer program capable of running on the processor, and the processor executes the circuit analysis method in the electronic automation design when running the computer program.
The embodiment of the application also provides a computer readable storage medium, on which a computer program is stored, and the computer program executes the circuit analysis method in the electronic automation design when running.
According to the technical scheme, the name of the target circuit component in the physical layout is determined, the information of the target circuit component in the physical layout is extracted, and then the simplified information can be obtained according to the information of the target circuit component. Therefore, diversified simplified information can be obtained to adapt to different application scenes, and the adaptability and the application efficiency of the physical layout in application are improved. For example, the method can be used in different scenes of circuit analysis in integrated circuit design, and the efficiency of circuit analysis is improved.
Further, because there is an association between the library exchange file corresponding to the same integrated circuit and the physical layout, the names of the same circuit components in the library exchange file and the physical layout are usually consistent. The data size contained in the library exchange file is usually smaller than the data size in the physical layout, and after the name pointing to the target circuit component is determined in the library exchange file, the name is used as the name pointing to the target circuit component in the physical layout, so that the efficiency is higher.
Further, determining condensed information from the information of the target circuit component may include: and determining the format of the simplified information to be a format which is adaptive to the tool adopted in the integration flow at the top layer in the integrated circuit design. The tool adopted in the integration of the top layer can be ICC2 or innovus software. The format of the simplified information is adjusted to be matched with the format of the top-layer integration tool, so that the matching of the simplified information to different scenes can be further improved, and the efficiency of subsequent processes can be improved.
Furthermore, the efficiency of integrated circuit design can be improved by taking the antenna component as a target circuit component and extracting the information of the antenna component. If it is not certain that a circuit component that may produce an antenna effect, i.e. an antenna component, ignores the effect of the antenna component when the integrated circuit is used in combination with other circuits, the circuit may produce an error. The cost of finding the error in subsequent flows, such as in a Design Rule Checking (DRC) flow, is large. Therefore, the information of the antenna component is extracted, and the method has important significance for avoiding circuit errors and improving the efficiency of integrated circuit design.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a flowchart of a method for extracting information in an electronic automation design according to an embodiment of the present application;
FIG. 2 is a flowchart of a method for determining a name of a target circuit component in a physical layout according to an embodiment of the present application;
FIG. 3 is a flowchart of a method of one embodiment of step S22 of FIG. 2;
FIG. 4 is a schematic diagram of a physical layout;
FIG. 5 is a flowchart illustrating another method for extracting information in electronic automation design according to an embodiment of the present application;
FIG. 6 is a schematic structural diagram of an information extraction apparatus in an electronic automation design according to an embodiment of the present application;
FIG. 7 is a schematic structural diagram of a name determining unit in an embodiment of the present application;
fig. 8 is a schematic structural diagram of another name determining unit in the embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The application provides an information extraction method in electronic automation design, which, with reference to fig. 1, may specifically include the following steps:
step S11, determining the name of a target circuit component in a physical layout, wherein the physical layout is the physical layout of the integrated circuit, and the target circuit component is the circuit component in the integrated circuit;
step S12, extracting the information of the target circuit component from the physical layout according to the name of the target circuit component;
step S13, determining simplified information according to the information of the target circuit component, where the simplified information is description of the target circuit component.
The physical layout may be a physical layout output by an electronic automation design tool, and specifically may be physical layouts in various formats used in an Integrated Circuit (IC) automation design. The physical layout can be used for data transmission for semiconductor physical plate making between design tools, computers and mask manufacturers. The format of the physical layout is not limited, and may be, for example, a physical layout in a Graphic Data System (GDS) format, a physical layout designed by an electronic automation design tool OASIS, or the like.
In a specific implementation, the target circuit component may be various circuit components in an integrated circuit, such as a power supply or potentially a component that may produce an antenna effect. Other finer grained circuit features are also possible, such as gates, sources, drains, metal lines, vias or barriers, etc.
Further, in implementations, the target circuit component may be determined based on a context of the circuit analysis. As described in the background, circuit analysis is an important part of integrated circuit design, and circuit verification can be performed through circuit analysis to ensure the correctness and feasibility of the circuit. For example, when a power supply in an integrated circuit needs to be analyzed, the power supply may be used as a target circuit component to extract information about the power supply in the physical layout. The purpose of analyzing the power supply in the integrated circuit may be various and is not limited herein. For example, it may be analyzed whether the power connection is sufficient.
In particular implementations, the manner in which the name of the target circuit component is determined in the physical layout may vary. The name may be a priori information, for example, if the naming mode of the circuit component, such as a power supply, in the physical layout is known, the information of the power supply may be extracted from the physical layout according to the name, and based on this, further simplified information is obtained. Alternatively, in some cases, where the target circuit component is not explicitly defined in the physical layout, the target circuit component may be determined by names of other defined circuit components, with the names of the defined circuit components as names pointing to the target circuit component.
In a specific implementation, the extraction of the information of the target circuit component in the physical layout according to the name of the target circuit component may be implemented in a script language. The target circuit components for extraction may be one or more types. The names of the target circuit components to be subjected to information extraction can be stored in a list, information of a plurality of target circuit components is extracted, and the simplified information of the target circuit components is further determined. The number of the positions of one type of circuit components in the physical layout may be multiple, and is not limited herein.
In a specific implementation, the extracted information of the target circuit component may be all or part of the information of the target circuit component in the physical layout. For example, only the information of the metal line and the hole of the target circuit component may be extracted.
In particular implementations, the extracted information may be determined based on circuit analysis requirements of the target circuit component, such as extracting power-related metal and vias, i.e., metal and vias in the power circuit portion, based on circuit analysis requirements for the power supply when the target circuit is a power supply.
By extracting only part of the information related to the target circuit part, the amount of information extraction can be reduced and efficiency in the subsequent application process can be improved. Taking a target circuit component as an example of a power supply, layers in a physical layout are complex, and only an active region of a source and a drain is formed, so that a plurality of layers can be included. If all the information of the power supply is extracted, the amount of information is large.
In another implementation, the extracted information for the target circuit component may be a layout of the target circuit component. The original layout is usually larger, and it is easier to directly extract the layout of the target circuit component compared with directly extracting specific information from the original layout. Accordingly, the simplified information determined according to the information of the target circuit component may be selected from the extracted layout of the target circuit component, for example, when the target circuit component is a power supply, the simplified information may be selected from the layout of the power supply to obtain metals and holes in the power supply circuit. Therefore, the simplified information with small data volume can be obtained, so that the method is accurately suitable for subsequent application scenes.
In a specific implementation, the reduced information may directly include information extracted from the physical layout, for example, when the extracted information of the target circuit component is the physical layout, the reduced information may be a reduced physical layout of a corresponding circuit component in the physical layout. Alternatively, the compaction information may include information that is further analyzed or calculated based on information of the target circuit component in the physical layout. Alternatively, the compaction information may include information extracted directly from the physical layout and information obtained through further analysis or calculation.
Accordingly, the specific implementation manner of the simplified information is determined, and the extracted information of the target circuit component can be directly used as the simplified information. In this case, the reduced information may be a reduced layout of the target circuit component. Or, the information of the target circuit component in the physical layout may be further calculated, and all or part of the calculation result and the directly extracted information may be used as the compaction information.
In the embodiment of the application, the information of the target circuit component in the physical layout is extracted by determining the name of the target circuit component in the physical layout, and then the simplified information can be obtained according to the information of the target circuit component. Therefore, diversified simplified information can be obtained to adapt to different application scenes, and the adaptability and the application efficiency of the physical layout in application are improved. For example, the method can be used in different scenes of circuit analysis in integrated circuit design, and the efficiency of circuit analysis is improved.
In particular implementations, determining condensed information from information of the target circuit component may include: and determining the format of the simplified information to be a format which is adaptive to a tool adopted by the integration of the top layer in the integrated circuit design. The tool adopted in the top-level integration can be ICC2 or Innovus software. The format of the simplified information is adjusted to be matched with the format of the top-layer integration tool, so that the matching of the simplified information to different scenes can be further improved, and the efficiency of subsequent processes can be improved. Top level integration is the process of further integrating different integrated circuit cells during the integrated circuit design process. For example, the top integration may be a process of further integrating integrated circuits implementing different sub-functions to realize the functions thereof after the integrated circuits are completed. Alternatively, from the perspective of the integrated circuit design flow, the integration of the top layer may be a process of integration by EDA tools after extracting the library swap file for each sub-integrated circuit cell. From another perspective, those skilled in the art will appreciate that the top level integration is integration using EDA tools after an Intellectual Property (IP) core of the integrated circuit, also referred to as an Intellectual Property module, a circuit function module, etc., is completed.
As previously mentioned, the manner in which the name of the target circuit component in the physical layout is determined may vary.
Referring to fig. 2 in combination, in an embodiment of the present application, the name of the target circuit component in the physical layout may be determined by:
step S21, determining a name pointing to the target circuit component in a library exchange file;
step S22, based on the association relationship between the library swap file and the physical layout, determining that the name pointing to the target circuit component in the library swap file is the name pointing to the target circuit component in the physical layout.
The library exchange file is a file describing the physical layout design of the integrated circuit in electronic design automation, and the physical layout in the step S21 and the step S22 corresponds to the same integrated circuit as the library exchange file. Library Exchange Format (LEF) is a standard file in electronic automation design tools, and contains information about circuit components such as wiring, vias, ports, and barrier layers of a physical design. The EDA tool can parse the LEF file into appropriate data results.
There is an association between the library exchange file corresponding to the same integrated circuit and the physical layout, and the names of the library exchange file and the same circuit component in the physical layout are usually consistent. The data size contained in the library exchange file is usually smaller than the data size in the physical layout, and after the name pointing to the target circuit component is determined in the library exchange file, the name is used as the name pointing to the target circuit component in the physical layout, so that the efficiency is higher.
In a specific implementation, with reference to fig. 3, based on the association relationship between the library exchange file and the physical layout, determining that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout may include the following steps:
step S31, confirming the consistency of the name pointing to the target circuit component in the library exchange file and the physical layout;
step S32, determining that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout.
In the specific implementation of step S31, the physical layout may be analyzed, and the connection between the physical layout and the library exchange file may be established according to the process, so as to confirm the consistency of the name pointing to the target circuit component in the library exchange file and the physical layout. In the case where the agreement is confirmed, step S32 is further performed.
By confirming the consistency of the name pointing to the target circuit component in the library exchange file and the physical layout, and after the consistency is confirmed, determining the name pointing to the target circuit component in the library exchange file as the name pointing to the target circuit component in the physical layout, errors caused by inconsistency of the name pointing to the target circuit component and the physical layout can be avoided, and the accuracy of generating simplified information is improved.
In some application scenarios, the name of the target circuit component is not given directly in the physical layout. For example, in a scenario where information of a potential component that may generate an antenna effect needs to be extracted, that is, when information of an antenna component referred to in this application needs to be extracted, a name of the component that generates the antenna effect may not be given in the physical layout. Thus, the name pointing to the target circuit component may be determined based on the attributes of the circuit component.
During chip production, the exposed metal acts like an antenna and can collect charge. The source of these charges may be varied, and may be, for example, charged particles generated by plasma etching. These antenna-like components cause a potential rise after collecting the charge. The larger the area of these antenna-like components, the more charge they can collect and the higher the voltage applied to other components connected to them. If such a component is connected only to the gate of the MOS transistor, the voltage generated by the component will be applied to the gate, which may break down the thin gate oxide layer, thereby disabling the circuit, which is known to those skilled in the art as "antenna effect".
With the development of semiconductor technology, the size of the gate is smaller and smaller, the number of layers of metal is larger and larger, and the possibility of antenna effect is higher. In the process of designing an integrated circuit, the design inside the integrated circuit is usually considered to avoid the antenna effect. However, because the integrated circuit is usually designed in a functional module, the integrated circuit obtained each time is usually required to be used together with other parts of the circuit. It is therefore necessary to identify the parts potentially likely to produce antenna effects, which parts are referred to as antenna parts in this application.
If it is not certain that a circuit component that may produce an antenna effect, i.e. an antenna component, ignores the effect of the antenna component when the integrated circuit is used in combination with other circuits, the circuit may produce an error. The cost of finding the error in subsequent flows, such as in a Design Rule Checking (DRC) flow, is large. Therefore, the information of the antenna component is extracted, and the method has important significance for avoiding circuit errors and improving the efficiency of integrated circuit design.
In a specific implementation, the name of the antenna input port may be determined according to the attribute of the antenna component, and the name of the antenna input port is used as a name pointing to the antenna component. The antenna input port is an input port connected with a grid in the integrated circuit. One way to determine the antenna input port is to determine the input port that is not connected to power or ground as the antenna input port. The identification of an input port may be varied, for example, in an LEF file, there is usually a field indicating the direction information of the port as an input or output port.
Further, extracting information of the target circuit component from the physical layout according to the name of the target circuit component includes: and extracting information of metal connected with the antenna input port, information of a grid connected with the metal and information of a source drain connected with the grid.
The information of the metal connected to the port includes information of a metal line electrically connected to the port, and may specifically include metal lines of different layers connected through a via. The method can be specifically determined according to the connection relationship in the physical layout. The source and drain electrodes include a source electrode and a drain electrode, and may be specifically located in an active region in the layout.
In a specific implementation, the information of the metal connected to the port may be an area of the metal connected to the port. The information of the gate electrode connected to the metal pattern and the information of the source and drain electrodes connected to the gate electrode may be an area of the gate electrode, an area of the drain electrode, and an area of the source electrode.
In particular implementations, determining condensed information from information of the target circuit component may include: and respectively calculating the antenna information of each antenna component in the physical layout according to the metal connected with the antenna input port and the source and drain electrodes, wherein the antenna information is used for indicating the boundary of the antenna component with the antenna effect.
Further, in specific implementation, the threshold value of the antenna effect of the antenna component may be obtained by calculating a total metal area, a total gate area, and a total source-drain area that are connected to the antenna input port. Based on the total area of the metal and the total area of the source and the drain, the condition of avoiding the antenna effect can be obtained by combining the area of the grid. For example, the ratio of the total area of the metal lines to the area of the gate electrode can be determined. The specific threshold value of this value may be different for different processes. The source and drain areas have a positive effect on avoiding antenna effects, and the compensation effect of the source and drain areas can be considered when determining antenna information. When calculating the antenna information, the ratio of the total area of the metal lines to the area of the gate can be calculated, and then the ratio is compared with the area of the active region. Therefore, the total metal area, the total source-drain area, and the calculated area may be used as the content of the antenna information, or the antenna information may include the above ratio.
Fig. 4 is a portion of a physical layout showing 2 gates, 2 active doped regions, and 2 vias. For convenience of description, the first gate 411, the second gate 412, the first active doped region 421, the second active doped region 422, and the first via 441 and the second via 442 are respectively described. The input port 45 is connected to the first gate 411 through the metal line 43 and the first via 441, and belongs to an antenna input port in the present application. By calculating the ratio of the total area of the metal lines 43 electrically conductively connected to the ports 45, the area of the first gate 441, and the area of the first active doped region 421, a safety value for avoiding the antenna effect can be determined.
It will be appreciated that although not shown, there may be other metal lines connected to the input port 45, which may be in the layers shown or in other layers. The first and second are merely for convenience of description and do not represent further limitations.
Referring to fig. 5 in combination, in an embodiment of the present application, the reduced information of the antenna component may be generated as follows.
And step S51, analyzing the LEF file, and determining the input port which is not connected with the power supply or the ground as an antenna input port.
In step S52, the name of the antenna input port is determined.
And step S53, analyzing the GDS, establishing a connection relation between the LEF file and the GDS according to the process, and judging whether the names of the LEF file and the antenna input port in the GDS are consistent or not. If so, go to step S54, otherwise go to step S57.
And step S54, determining metal, a grid and a source drain which are connected with the antenna input port in the GDS according to the connection relation of the input ports.
Step S55, calculating the area of the metal connected to each antenna input port and the area of the source and drain electrodes as the antenna information of each antenna input port.
And step S56, determining the format of the antenna information to be a format which is suitable for a tool adopted by the integration of the top layer in the integrated circuit design.
At step S57, the GDS is reported to be inconsistent with the LEF file and the operation is terminated.
The principles, definitions, effects and the like related to the embodiments of the present application have been described in the foregoing, and are not described in detail again.
Those of skill in the art will understand that the description herein of "in a particular implementation," "an embodiment," "for example," etc., means that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. Furthermore, the particular features, structures, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this application can be combined and combined by those skilled in the art without contradiction.
Additionally, any process or method descriptions in flow charts or otherwise described herein in the foregoing embodiments may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process. And the scope of the preferred embodiments of the present application includes other implementations in which functions may be performed out of the order shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved.
The embodiment of the application also provides a circuit analysis method in the electronic automation design, which can perform circuit analysis based on the simplified information generated by the information extraction method in the electronic automation design. Because the simplified information has stronger adaptability to circuit analysis, the efficiency of circuit analysis based on the simplified information is higher.
The embodiment of the present application further provides an information extraction apparatus in electronic automation design, which, with reference to fig. 6, may include:
a name determining unit 61 adapted to determine a name pointing to a target circuit component in a physical layout, the physical layout being a physical layout of an integrated circuit, the target circuit component being a circuit component in the integrated circuit;
an extraction unit 62 adapted to extract information of the target circuit component in the physical layout according to the name of the target circuit component;
a reduced information determining unit 63, adapted to determine reduced information according to the information of the target circuit component, where the reduced information is a description of the target circuit component.
Referring to fig. 7 in combination, in a specific implementation, the name determining unit may include:
a first determining unit 71 adapted to determine a name pointing to the target circuit component in a library exchange file;
a second determining unit 72, adapted to determine, based on the association relationship between the library swap file and the physical layout, that the name pointing to the target circuit component in the library swap file is the name pointing to the target circuit component in the physical layout;
the library exchange file is a file for describing the physical layout design of the integrated circuit in electronic design automation, and the physical layout and the library exchange file correspond to the same integrated circuit.
Referring to fig. 8 in combination, in a specific implementation, the name determining unit may include:
a consistency confirming unit 81 adapted to confirm consistency of the name pointing to the target circuit component in the library swap file and the physical layout;
a name sharing unit 82 adapted to determine that the name pointing to the target circuit component in the library swap file is the name pointing to the target circuit component in the physical layout.
With continued reference to fig. 6, in a specific implementation, the target circuit component to be named in the name determining unit 61 may be an antenna component, the antenna component being a component potentially generating an antenna effect, the name determining unit 61 may determine a name of an antenna input port as a name pointing to the antenna component, the antenna input port may be an input port connected to a gate in the integrated circuit.
In a specific implementation, the extracting unit 62 may extract information of a metal connected to the antenna input port, information of a gate connected to the metal, and information of a source and a drain connected to the gate.
In a specific implementation, the simplified information determining unit 63 may respectively calculate antenna information of each antenna element in the physical layout according to information of metal connected to the antenna input port, information of the gate, and information of the source and the drain, where the antenna information indicates a limit of an antenna effect of the antenna element.
In a specific implementation, the simplified information determining unit 63 may respectively calculate a total metal area and a total source-drain area connected to each antenna input port in the physical layout.
In a specific implementation, the target circuit component whose name is to be determined in the name determination unit 61 may be a power supply.
In a specific implementation, the reduced information determining unit 63 includes at least one of a screening unit and a format adapting unit, and the screening unit is adapted to screen the extracted information of the target circuit component and determine the reduced information according to the screened content; the format adaptation unit may determine the format of the reduced information to be a format that is adapted to a tool used for integration of a top layer in an integrated circuit design.
The information extraction device in the electronic automation design in the embodiment of the present application corresponds to the information extraction method in the electronic automation design, and the principle, the noun explanation, the beneficial effects, and the specific implementation manner of the information extraction device in the electronic automation design in the embodiment of the present application may refer to the information extraction method in the electronic automation design in the embodiment of the present application, which is not described herein again.
The embodiment of the application also provides a circuit analysis device in electronic automation design, which is suitable for circuit analysis based on the simplified information output by the information extraction device in electronic automation design.
The circuit analysis apparatus in electronic automation design in the embodiment of the present application corresponds to the circuit analysis method in electronic automation design, and the principle, noun explanation, beneficial effects, and specific implementation thereof may refer to the information extraction method in electronic automation design in the embodiment of the present application, which is not described herein again.
The units described in the circuit analysis device in electronic automation design and the information extraction device in electronic automation design in the embodiments of the present application may be wholly or partially implemented by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs. The procedures or functions according to the present application are generated in whole or in part when the computer program instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer program may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium.
Furthermore, each of the functional modules may be integrated into one processing component, or each of the functional modules may exist alone physically, or two or more functional modules may be integrated into one component. The integrated components can be realized in a hardware form, and can also be realized in a software functional module form. The integrated components described above may also be stored in a computer-readable storage medium if implemented in the form of software functional modules and sold or used as a stand-alone product. The storage medium may be a read-only memory, a magnetic or optical disk, or the like.
The embodiment of the present application further provides a computer device, which includes a memory and a processor, where the memory stores a computer program that can be executed on the processor, and the processor executes the circuit analysis method in electronic automation design when executing the computer program.
The embodiment of the present application further provides another computer device, which includes a memory and a processor, where the memory stores a computer program that can be executed on the processor, and the processor executes the aforementioned circuit analysis method in electronic automation design when executing the computer program.
The computer devices include, but are not limited to: the system comprises a server, a desktop computer, a smart phone, a notebook computer, a tablet computer, a smart bracelet, a smart watch, other smart devices or a distributed processing system formed by connecting any one or more devices in a communication way.
The embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored, where the computer program executes the foregoing method for extracting information in electronic automation design when running.
The embodiment of the present application further provides another computer-readable storage medium, on which a computer program is stored, where the computer program executes the method for analyzing a circuit in an electronic automation design.
That is, the circuit analysis method in electronic automation design and the information extraction method in electronic automation design in the embodiments of the present application described above may be implemented as software or computer code that can be stored in a recording medium such as a CD ROM, a RAM, a floppy disk, a hard disk, or a magneto-optical disk, or as computer code that is originally stored in a remote recording medium or a non-transitory machine-readable medium and is to be stored in a local recording medium downloaded through a network, so that the method described herein may be stored in such software processing on a recording medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware such as an ASIC or FPGA. It is understood that the computer, processor, microprocessor controller or programmable hardware includes memory components (e.g., RAM, ROM, flash memory, etc.) that can store or receive software or computer code that, when accessed and executed by the computer, processor or hardware, implements the information extraction methods in electronic automation designs or the circuit analysis methods in electronic automation designs described herein. Further, when a general-purpose computer accesses code for implementing the information extraction method in the electronic automation design or the circuit analysis method in the electronic automation design shown herein, execution of the code converts the general-purpose computer into a special-purpose computer for executing the information extraction method in the electronic automation design or the circuit analysis method in the electronic automation design shown herein.
Compared with the prior art, in the embodiment of the application, the information of the target circuit component in the physical layout is extracted by determining the name of the target circuit component in the physical layout, and further, the simplified information can be obtained according to the information of the target circuit component. Therefore, diversified simplified information can be obtained to adapt to different application scenes, and the adaptability and the application efficiency of the physical layout in application are improved. For example, the method can be used in different scenes of circuit analysis in integrated circuit design, and the efficiency of circuit analysis is improved.
Further, because there is an association between the library exchange file corresponding to the same integrated circuit and the physical layout, the names of the same circuit components in the library exchange file and the physical layout are usually consistent. The data size contained in the library exchange file is usually smaller than the data size in the physical layout, and after the name pointing to the target circuit component is determined in the library exchange file, the name is used as the name pointing to the target circuit component in the physical layout, so that the efficiency is higher.
Further, determining condensed information from the information of the target circuit component may include: and determining the format of the simplified information to be a format which is adaptive to the tool adopted in the integration flow at the top layer in the integrated circuit design. The tool adopted in the integration of the top layer can be ICC2 or innovus software. The format of the simplified information is adjusted to be matched with the format of the top-layer integration tool, so that the matching of the simplified information to different scenes can be further improved, and the efficiency of subsequent processes can be improved.
Furthermore, the efficiency of integrated circuit design can be improved by taking the antenna component as a target circuit component and extracting the information of the antenna component. If it is not certain that a circuit component that may produce an antenna effect, i.e. an antenna component, ignores the effect of the antenna component when the integrated circuit is used in combination with other circuits, the circuit may produce an error. The cost of finding the error in subsequent flows, such as in a Design Rule Checking (DRC) flow, is large. Therefore, the information of the antenna component is extracted, and the method has important significance for avoiding circuit errors and improving the efficiency of integrated circuit design.
Although the embodiments of the present application are disclosed above, the present application is not limited thereto. Various changes and modifications may be effected by one skilled in the art without departing from the spirit and scope of the embodiments of the application, and it is intended that the scope of the application be limited only by the claims appended hereto.

Claims (24)

1. An information extraction method in electronic automation design is characterized by comprising the following steps:
determining a name of a target circuit component in a physical layout, wherein the physical layout is the physical layout of the integrated circuit, and the target circuit component is a circuit component in the integrated circuit;
extracting the information of the target circuit component from the physical layout according to the name of the target circuit component;
and determining simplified information according to the information of the target circuit component, wherein the simplified information is the description of the target circuit component.
2. The method of claim 1, wherein determining the name of the target circuit component in the physical layout comprises:
determining a name in a library exchange file that points to the target circuit component;
determining that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout based on the incidence relation between the library exchange file and the physical layout;
the library exchange file is a file for describing the physical layout design of the integrated circuit in electronic design automation, and the physical layout and the library exchange file correspond to the same integrated circuit.
3. The method for extracting information in electronic automation design according to claim 2, wherein the determining that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout based on the association relationship between the library exchange file and the physical layout comprises:
confirming consistency of the name pointing to the target circuit component in the library exchange file and the physical layout;
and determining that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout.
4. The method of claim 1, wherein the target circuit component is an antenna component, the antenna component is a component that potentially generates an antenna effect, and the determining the name of the target circuit component in the physical layout comprises: determining the name of an antenna input port as a name pointing to the antenna component, wherein the antenna input port is an input port connected with a grid in the integrated circuit.
5. The method of claim 4, wherein extracting information about the target circuit component from the physical layout according to the name of the target circuit component comprises: and extracting information of metal connected with the antenna input port, information of a grid connected with the metal and information of a source drain connected with the grid.
6. The method of claim 5, wherein the determining reduced information according to the information of the target circuit component comprises: and respectively calculating the antenna information of each antenna component in the physical layout according to the information of the metal connected with the antenna input port, the information of the grid and the information of the source and the drain, wherein the antenna information indicates the boundary of the antenna component with the antenna effect.
7. The method of claim 6, wherein the step of calculating the antenna information of each antenna element in the physical layout comprises: and respectively calculating the total metal area, the total grid area and the total source and drain area connected with the input ports of the antennas in the physical layout.
8. The method of claim 1, wherein the target circuit component is a power supply.
9. The method of claim 1, wherein determining reduced information based on the information about the target circuit component comprises at least one of:
screening the extracted information of the target circuit component, and determining the simplified information according to the screened content;
and determining the format of the simplified information to be a format which is adaptive to a tool adopted by the integration of the top layer in the integrated circuit design.
10. A circuit analysis method in electronic automation design, characterized in that the circuit analysis is performed based on the simplified information generated by the information extraction method in electronic automation design according to any one of claims 1 to 9.
11. An information extraction device in electronic automation design is characterized by comprising:
a name determining unit adapted to determine a name of a target circuit component in a physical layout, the physical layout being a physical layout of an integrated circuit, the target circuit component being a circuit component in the integrated circuit; the extraction unit is suitable for extracting the information of the target circuit component from the physical layout according to the name of the target circuit component;
and the simplified information determining unit is suitable for determining simplified information according to the information of the target circuit component, wherein the simplified information is description of the target circuit component.
12. The apparatus according to claim 11, wherein the name determining unit includes:
a first determining unit adapted to determine a name pointing to the target circuit component in a library exchange file;
a second determining unit, adapted to determine, based on the association relationship between the library exchange file and the physical layout, that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout;
the library exchange file is a file for describing the physical layout design of the integrated circuit in electronic design automation, and the physical layout and the library exchange file correspond to the same integrated circuit.
13. The apparatus according to claim 12, wherein the name determining unit includes:
a consistency confirmation unit adapted to confirm consistency of the name pointing to the target circuit component in the library exchange file and the physical layout;
and the name sharing unit is suitable for determining that the name pointing to the target circuit component in the library exchange file is the name pointing to the target circuit component in the physical layout.
14. The apparatus according to claim 11, wherein the target circuit component is an antenna component, the antenna component is a component potentially generating an antenna effect, and the name determining unit is adapted to determine a name of an antenna input port as a name pointing to the antenna component, the antenna input port being an input port connected to a gate in the integrated circuit.
15. The device for extracting information in electronic automation design according to claim 15, wherein the extracting unit is adapted to extract information of a metal connected to the antenna input port, information of a gate connected to the metal, and information of a source and a drain connected to the gate.
16. The device for extracting information in electronic automation design according to claim 14, where the simplified information determining unit is adapted to calculate antenna information of each antenna element in a physical layout according to information of metal connected to the antenna input port, information of the gate, and information of the source and the drain, respectively, where the antenna information indicates a limit of an antenna effect occurring in the antenna element.
17. The apparatus according to claim 16, wherein the simplified information determining unit is adapted to calculate a total metal area, a total gate area, and a total source/drain area of the physical layout, which are connected to the antenna input ports, respectively.
18. The device for extracting information in electronic automation design according to claim 11, wherein the target circuit component is a power supply.
19. The apparatus according to claim 11, wherein the simplified information determination unit includes at least one of a filtering unit and a format adaptation unit, the filtering unit is adapted to filter the extracted information of the target circuit component, and the simplified information is determined according to the filtered information; the format adapting unit is suitable for determining the format of the simplified information as a format which is adapted to a tool adopted by the integration of the top layer in the integrated circuit design.
20. An electronic automation design circuit analysis device, characterized in that, the device is adapted to perform circuit analysis based on the reduced information output by the electronic automation design information extraction device according to any one of claims 11 to 19.
21. A computer device comprising a memory and a processor, the memory having stored thereon a computer program operable on the processor, wherein the processor executes the computer program to perform the method for circuit analysis in electronic automation design of any of claims 1 to 9.
22. A computer-readable storage medium, on which a computer program is stored, wherein the computer program is executed to execute the method for extracting information in electronic automation design according to any one of claims 1 to 9.
23. A computer device comprising a memory and a processor, the memory having stored thereon a computer program operable on the processor, wherein the processor executes the computer program to perform the method for circuit analysis in electronic automation design of claim 10.
24. A computer-readable storage medium, on which a computer program is stored, wherein the computer program is executed to perform the method for analyzing a circuit in an electronic automation design according to claim 10.
CN202011228849.6A 2020-11-06 2020-11-06 Information extraction method medium, information extraction apparatus, circuit verification method medium, and circuit verification apparatus Active CN112329364B (en)

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