CN112327147A - Input circuit for signal safety equipment - Google Patents
Input circuit for signal safety equipment Download PDFInfo
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- CN112327147A CN112327147A CN202010958375.4A CN202010958375A CN112327147A CN 112327147 A CN112327147 A CN 112327147A CN 202010958375 A CN202010958375 A CN 202010958375A CN 112327147 A CN112327147 A CN 112327147A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/327—Testing of circuit interrupters, switches or circuit-breakers
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B61—RAILWAYS
- B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
- B61L15/00—Indicators provided on the vehicle or vehicle train for signalling purposes ; On-board control or communication systems
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/54—Testing for continuity
Abstract
The invention discloses an input circuit for signal safety equipment, which comprises a switching value storage module, an acquisition control module, a first transceiving detection module and a second transceiving detection module, wherein the switching value storage module is used for storing a switching value of a switching value; the acquisition control module generates acquisition pulses, the first transceiving detection module and the second transceiving detection module sequentially transmit pulses with different frequencies, and the switching value storage module judges the state of the external relay and the fault information of the first transceiving detection module and the second transceiving detection module according to the condition that the first transceiving detection module and the second transceiving detection module read back pulse information. Designed as an internal fail-safe circuit, any device failure will not cause erroneous judgment on the dangerous side. And an up-down symmetrical double transceiving detection mode is adopted, so that the function loss or function error caused by any device failure can be detected. The acquisition function can detect faults caused by internal mixed lines and interference by adopting a mode of transmitting 32 acquisition pulse rounds and receiving 32 acquisition pulses in real time.
Description
Technical Field
The invention belongs to the technical field of rail transit signals, and particularly relates to an input circuit for signal safety equipment, which can be widely applied to equipment with safety requirements such as SIL4, such as interlocking and ATP (automatic train protection) in rail transit signal control.
Background
Urban rail signal equipment has the highest requirement on RAMS, wherein the safety index is definitely specified to be that the probability of guiding signal system safety equipment to a dangerous side is 10-9Probability index of ≤ h<10-8And h (h is the driving hour), in order to achieve the index, each signal equipment manufacturer adopts a design circuit with dynamic input on the input channel design of the signal equipment.
At present, the method that pulses pass through a tested contact point is widely used in rail transit equipment, misjudgment is easy to occur, and the method adopts a bidirectional dynamic acquisition method and simultaneously carries out online monitoring on an output circuit, so that the input circuit is safer and more reliable.
Disclosure of Invention
The present invention aims to solve the technical problem of providing an input circuit for signal safety equipment, and provides a dynamic acquisition actual circuit for rail traffic signal control, which is a fault-safety circuit applicable to safety control equipment.
In order to achieve the technical purpose, the technical scheme adopted by the invention is as follows:
an input circuit for signal safety equipment is used for judging whether an external relay contact is opened or closed and comprises a switching value storage module, an acquisition control module, a first transceiving detection module and a second transceiving detection module;
the acquisition control module generates acquisition pulses, the first transceiving detection module and the second transceiving detection module sequentially transmit pulses with different frequencies, and the switching value storage module judges the state of the external relay and the fault information of the first transceiving detection module and the second transceiving detection module according to the condition that the first transceiving detection module and the second transceiving detection module read back pulse information.
In order to optimize the technical scheme, the specific measures adopted further comprise:
after the acquisition control module is electrified, 32 sampling pulses are generated circularly and are sent to the 0 th path, and then the 1 st path till the 31 st path; in each path, firstly sending pulses with 500KHz of optical couplers and 50% of duty ratio to a first receiving and sending detection module; and sending a pulse with a duty ratio of 50% to the second transceiving detection module by optical coupling of 400KHz, and starting next cycle after the cycle is completed, wherein the mark is used as a polling control signal for generating a switching value storage module.
In the 32-path polling detection process, the switching value storage module carries out smooth filtering on each detection result by adopting a multipoint average smooth filtering algorithm, and the influence of misjudgment caused by interference is eliminated.
In the process of transmitting acquisition pulses by 32 paths of round robin, only one path of the acquisition control module transmits the acquisition pulses at the same time, and the second transceiving detection module on the 32 paths receives the continuous real-time continuous acquisition, if the other path or paths of non-round robin receive the pulses at the receiving ends of the first transceiving detection module and the second transceiving detection module of the acquisition circuit, the interference is considered;
if the pulse can be always received in the m paths when the nth path is circulated in turn, the two paths are judged to have internal mixed line, if the fault is detected, the register position 1 corresponding to the fault path is read by external equipment through the VME bus.
And the 32 detection results of each round are subjected to smoothing filtering and then transmitted to the MPU through the VME channel.
When each path of detection is used for sending the pulse, the first transceiving detection module and the second transceiving detection module send the pulse in a time-sharing mode, and the time window for sending the pulse in each path of detection is 30 us.
When the switching value storage module performs pulse detection and detects the polling control signal of the channel, the switching value storage module recovers the channel control signal according to the time sequence relation, waits for 2us and starts to detect input pulses;
if the detection is successful, a corresponding judgment mark, namely a pulse existence mark is output, the mark is used for truth table judgment, and 32 paths of pulse detection are totally carried out.
The switching value storage module comprises a first FPGA, a second FPGA and a third FPGA, the first FPGA, the second FPGA and the third FPGA start counting pulse edges after receiving a starting signal through optical coupling delay, and when counting the edges of a signal received by the first transceiving detection module and a signal received by the second transceiving detection module, the detection module loop is considered to have received a sending pulse, otherwise, the detection module loop is considered not to have received the sending pulse.
The first transceiving detection module comprises a first optical coupler and a second optical coupler, the first optical coupler is a first transceiving detection module sending end, the second optical coupler is a first transceiving detection module receiving end, and the first optical coupler and the second optical coupler form a first detection loop;
the second transceiving detection module comprises a third optocoupler and a fourth optocoupler, the third optocoupler is a sending end of the second transceiving detection module, the fourth optocoupler is a receiving end of the second transceiving detection module, and the third optocoupler and the fourth optocoupler form a second detection loop;
the first optical coupler and the third optical coupler respectively and independently detect the correctness of a hardware circuit of the loop by sending pulses;
if the pulse sent by the first optical coupler of the first transceiving detection module cannot be received by the second optical coupler, the loop of the first transceiving detection module has a fault;
if the pulse sent by the third optocoupler of the second transceiving detection module cannot be received by the fourth optocoupler, the loop of the second transceiving detection module has a fault;
only when first receiving and dispatching detection module and second receiving and dispatching detection module circuit do not have the trouble, the first opto-coupler of first receiving and dispatching detection module sends the pulse, and second receiving and dispatching detection module can receive, perhaps the third opto-coupler of second receiving and dispatching detection module sends the pulse, and first receiving and dispatching detection module can receive, judges external relay contact closed this moment, otherwise judges external relay contact disconnection.
The first transceiving detection module and the second transceiving detection module transmit pulses with different specific frequencies so as to eliminate the influence of continuous interference pulses with a single frequency.
The invention has the following beneficial effects:
a) designed as an intrinsic fail-safe circuit, any device failure will not result in a false positive on the hazardous side (the unclosed relay contacts will not be interpreted as closed).
b) And an up-down symmetrical dual transceiving detection mode (namely a first transceiving detection module and a second transceiving detection module) is adopted, so that the function loss or the function error caused by any device failure can be detected.
c) The upper end and the lower end (namely the first transceiving detection module and the second transceiving detection module) send the acquisition pulse to adopt different frequencies and strict frequency detection, so that the probability of dangerous side misjudgment caused by external and internal interference is greatly reduced.
d) The acquired judgment result is filtered, so that the probability of accidental misjudgment caused by interference can be further reduced.
e) The acquisition function can detect faults caused by internal mixed lines and interference by adopting a mode of transmitting 32 acquisition pulse rounds and receiving 32 acquisition pulses in real time.
Drawings
FIG. 1 is a schematic structural view of the present invention;
fig. 2 is a schematic diagram of an embodiment of the present invention.
Wherein the reference numerals are: a1-a first optical coupler, B1-a second optical coupler, A2-a third optical coupler, and B2-a fourth optical coupler.
Detailed Description
Embodiments of the present invention are described in further detail below with reference to the accompanying drawings.
In a general electronic circuit, a method for directly judging the output level is adopted for the on and off of a switch K, the actual state of the switch is closed, and the switch is opened when being read due to the wire breakage; and the actual state of the switch is open, and the read back is closed due to reasons such as mixed lines or short circuits, and the like, so that the safety-related equipment cannot be used. The invention adopts dynamic collection and pulse detection method, which can effectively solve the above problems.
Referring to fig. 1, the input circuit for a signal safety device of the present invention is used for determining whether an external relay contact is opened or closed, and includes a switching value storage module, an acquisition control module (in the embodiment, FPGA4 is used), a first transceiving detection module (in the embodiment, an upper end detection module) and a second transceiving detection module (in the embodiment, a lower end detection module);
in an embodiment, the first transceiving detection module includes a first optical coupler a1 and a second optical coupler B1, the first optical coupler a1 is a transmitting end of the first transceiving detection module, the second optical coupler B1 is a receiving end of the first transceiving detection module, and the first optical coupler a1 and the second optical coupler B1 form a first detection loop;
the second transceiving detection module comprises a third optical coupler A2 and a fourth optical coupler B2, the third optical coupler A2 is a sending end of the second transceiving detection module, the fourth optical coupler B2 is a receiving end of the second transceiving detection module, and the third optical coupler A2 and the fourth optical coupler B2 form a second detection loop;
the FPGA4 is responsible for generating pulses, and the first optical coupler A1 and the third optical coupler A2 respectively and independently detect the correctness of a hardware circuit of a loop by sending the pulses;
if the pulse sent by the first optical coupler A1 of the first transceiving detection module cannot be received by the second optical coupler B1, the loop of the first transceiving detection module has a fault;
if the pulse sent by the third optical coupler A2 of the second transceiving detection module cannot be received by the fourth optical coupler B2, the loop of the second transceiving detection module has a fault;
only when first receiving and dispatching detection module and second receiving and dispatching detection module circuit do not have the trouble, the first opto-coupler A1 of first receiving and dispatching detection module sends the pulse, and second receiving and dispatching detection module can receive, perhaps second receiving and dispatching detection module third opto-coupler A2 sends the pulse, and first receiving and dispatching detection module can receive, judges this moment that the external relay contact has closed, otherwise judges that the external relay contact breaks off. The detailed relay contact state judgment and fault judgment truth table is shown in the table 1.
TABLE 1 truth table for judging state and fault of electric appliance
Fig. 2 is a specific implementation of the acquisition circuit in the acquisition function module, and the 32-way acquisition circuit is completely the same, and a single way is shown in the figure.
As can be seen from the figure, the sending path sends a pulse signal, and only when the opposite end receives the same pulse signal, the contact of the external relay may be judged to be closed, and any device fault (open circuit, short circuit, etc.) may only cause the receiving end not to receive the pulse, and the acquisition functional module is designed as an intrinsic fault-safety circuit, and any device fault will not cause the misjudgment of the dangerous side (the contact of the unclosed relay will not be judged to be closed).
During collection, the collection control module generates collection pulses, the first transceiving detection module and the second transceiving detection module sequentially send pulses with different frequencies, and the switching value storage module judges the state of the external relay and the fault information of the first transceiving detection module and the second transceiving detection module according to the condition that the first transceiving detection module and the second transceiving detection module read back the pulse information.
The switching value storage module comprises a first FPGA, a second FPGA and a third FPGA (namely FPGA1/2/3 in figure 1), the first FPGA, the second FPGA and the third FPGA start to count pulse edges after receiving a starting signal for 5us (optical coupling delay), when the edge count of a signal received by the first transceiving detection module and a signal received by the second transceiving detection module falls within a set threshold range, the detection module loop is considered to have received a transmitted pulse, otherwise, the detection module loop is considered not to have received the transmitted pulse.
It can be seen that the conditions for determining the receipt of a pulse do not only include the detection of a pulse, but also that the number of pulses within a certain acquisition period must meet a threshold range that defines both an upper and a lower limit.
Because the first transceiving detection module and the second transceiving detection module send pulses with different specific frequencies, the influence of continuous interference pulses with a single frequency can be eliminated. The first transceiving detection module and the second transceiving detection module send the acquisition pulse to adopt different frequencies and strict frequency detection, so that the misjudgment of the dangerous side caused by external interference is greatly reduced.
After the acquisition control module is electrified, 32 sampling pulses are generated in a circulating mode and are sent to the 0 th path, then the 1 st path till the 31 st path; in each path, firstly sending pulses with 500KHz of optical couplers and 50% of duty ratio to a first receiving and sending detection module; and sending a pulse with a duty ratio of 50% to the second transceiving detection module by optical coupling of 400KHz, and starting next cycle after the cycle is completed, wherein the mark is used as a polling control signal for generating a switching value storage module. One cycle takes 3.84 ms.
Because the condition for judging that the collected pulse is received is strict, the FPGA1/2/3 should filter the misjudgment of not receiving the collected pulse caused by interference, in the 32-way polling detection process, the switching value storage module carries out smooth filtering on the detection result of each time by adopting a multipoint average smooth filtering algorithm, the influence of misjudgment caused by interference is eliminated, and the number of filtering points can be configured.
In the process of transmitting acquisition pulses by 32 paths of round robin, only one path of the acquisition control module transmits the acquisition pulses at the same time, and the second transceiving detection module on the 32 paths receives the continuous real-time continuous acquisition, if the other path or paths of non-round robin receive the pulses occasionally at the receiving ends of the first transceiving detection module and the second transceiving detection module of the acquisition circuit, the interference is considered;
if the pulse can be always received in the m paths when the nth path is circulated in turn, the two paths are judged to have internal mixed line, if the fault is detected, the register position 1 corresponding to the fault path is read by external equipment through the VME bus.
The 32 paths of detection time in each round does not exceed 10ms, and the detection result in each round is transmitted to the MPU through the VME channel after being subjected to smoothing filtering.
The filtering scheme adopts the simplest averaging scheme, the length of smooth filtering is preliminarily set to be 7, and the group delay of the filter is 3 units, namely, the change of the output end of the filter is 3 times slower than the change of actual detection.
When each path of detection is used for sending the pulse, the first transceiving detection module and the second transceiving detection module send the pulse in a time-sharing mode, and the time window for sending the pulse in each path of detection is 30 us.
When each path of detection transmission pulse is detected, the first transceiving detection module and the second transceiving detection module need to transmit in a time-sharing mode, and therefore, the maximum time window of transmitting the pulse each time in each path of detection is theoretically 10ms/32/3/2 ≈ 50 us. To leave a margin, the actual pulse delivery time is about 70% of the theoretical maximum load value, about 30 us. Since the pulse detection adopts a pulse counting method, the more the number of pulses transmitted in each transmission period, the smaller the probability that the system misjudges the interference as a legal pulse due to the interference received. The upper limit of the pulse transmission time window has been determined so that only the frequency of the transmitted pulses can be increased. If the FPGA4 sends pulses at 500KHz, at least 15 pulses can be sent within a send time window. The maximum frequency of the optical coupler is 1MHz, and the maximum frequency of the pulse sent by the FPGA4 should not exceed 1 MHz.
When the pulse count is carried out at the receiving end of the FPGA1/2/3, firstly, the time delay caused by the line length of the transmitting end and the receiving end is considered, and when the transmitted pulse is 500KHz, the maximum length of the relay detection line is 150m in order to ensure that the time delay does not exceed a half pulse period, namely 1 us. Because of the existence of the delay, the pulse transmitting end should transmit one more pulse. Second consider the window length of the pulse count. If the window is exactly 15 pulse periods long, the number of pulses received may be 14, 15, 16 due to the up-skip edge alignment problem; if the window length is 15.5 cycles, the number of received pulses may only be 15 or 16, and the decision conditions may be more stringent.
The pulse reception determination condition is strict in determination of received pulses, and the probability of erroneously determining interference as a legitimate pulse is low. Since the relay is judged to be switched off as a safe side, the judgment method conforms to the principle that the judgment tends to be safe when interference is received.
When the FPGA1/2/3 is used for pulse detection, when the polling control signal of the channel is detected, the channel control signal is recovered according to the time sequence relation, 2us is waited, and input pulse detection is started;
if the detection is successful, a corresponding judgment mark, namely a pulse existence mark is output, the mark is used for truth table judgment, and 32 paths of pulse detection are totally carried out.
The working principle is as follows:
the first transceiving detection module firstly sends 500khz pulse detection, the FPGA opens a 24.5x2us time window, and in the time window, 24 or 25 rising edges of the pulse are detected, and the optical coupling of the path receives the 500khz pulse.
And the second transceiving detection module sends 400khz pulse detection, the FPGA opens a 19.5x2.5us time window, and in the time window, 19 or 20 pulse rising edges are detected, so that the path of light receives 400khz pulses.
In one channel, 500khz pulse detection and 400khz pulse detection are independent detection modules; the FPGA4 is appointed to transmit 500khz pulses at the first transceiving detection module optical coupler, and the second transceiving detection module optical coupler transmits high level, so that the FPGA1/2/3 knows that the first transceiving detection module optical coupler of the FPGA4 outputs 500k pulses, and the 500khz pulse detection module is effective at the moment, and if 400khz pulses are detected, the 500khz pulse detection module is regarded as interference; after 60us, the FPGA4 transmits 400khz pulses in the second transceiving detection module optical coupler, and the first transceiving detection module optical coupler transmits high level, so the FPGA1/2/3 knows that the second transceiving detection module optical coupler of the FPGA4 outputs 400k pulses, and the 400khz pulse detection module is effective, and if 500khz pulses are detected, the interference can be regarded as interference. At any moment, the FPGA1/2/3 knows that the first transceiving detection module optical coupler or the second transceiving detection module optical coupler in the channel is transmitting pulses and knows whether the pulses are 400khz or 500khz, so that misjudgment is avoided.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above-mentioned embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may be made by those skilled in the art without departing from the principle of the invention.
Claims (10)
1. An input circuit for signal safety equipment is used for judging whether an external relay contact is opened or closed, and is characterized by comprising a switching value storage module, an acquisition control module, a first transceiving detection module and a second transceiving detection module;
the acquisition control module generates acquisition pulses, the first transceiving detection module and the second transceiving detection module sequentially transmit pulses with different frequencies, and the switching value storage module judges the state of the external relay and the fault information of the first transceiving detection module and the second transceiving detection module according to the condition that the first transceiving detection module and the second transceiving detection module read back pulse information.
2. The input circuit for the signal safety equipment according to claim 1, characterized in that, each input circuit finishes the collection of 32 paths of input, after the collection control module is powered on, 32 paths of sampling pulses are circularly generated, and the sampling pulses are sent to the 0 th path, then the 1 st path until the 31 st path; in each path, firstly sending pulses with 500KHz of optical couplers and 50% of duty ratio to a first receiving and sending detection module; sending a pulse with a duty ratio of 50% to a second transceiving detection module by optical coupling of 400KHz, and starting next cycle after the cycle is completed, wherein the mark is used for generating a polling control signal of a switching value storage module; and different frequencies are adopted, so that the problem caused by wire mixing is effectively prevented.
3. The input circuit for the signal safety device according to claim 2, wherein in the 32-way polling detection process, the switching value storage module performs smoothing filtering on the detection result of each time by adopting a multipoint average smoothing filtering algorithm, so as to eliminate the influence of misjudgment caused by interference.
4. The input circuit for the signal safety device according to claim 2, wherein during the 32-way round-robin transmission of the acquisition pulses, only one way of the acquisition control module transmits the acquisition pulses at the same time, and the 32-way second transceiving detection module receives the continuous real-time continuous acquisition, and if one or more other ways of the non-round-robin reception pulses are received at the receiving ends of the first transceiving detection module and the second transceiving detection module of the acquisition circuit, the other ways of the non-round-robin transmission pulses are regarded as interference;
if the pulse can be always received in the m paths when the nth path is circulated in turn, the two paths are judged to have internal mixed line, if the fault is detected, the register position 1 corresponding to the fault path is read by external equipment through the VME bus.
5. The input circuit for the signal safety device according to claim 2, wherein the 32 detection results of each round are transmitted to the MPU through the VME channel after being subjected to smoothing filtering.
6. The input circuit for a signal safety device according to claim 2, wherein the first transceiving detection module and the second transceiving detection module transmit in time division during each path of detection transmission pulse, and a time window for each transmission pulse during each path of detection is 30 us.
7. The input circuit for the signal safety device according to claim 2, wherein when the switching value storage module performs pulse detection and detects the polling control signal of the circuit, the channel control signal is restored according to the timing relationship, and the input circuit waits for 2us and starts to detect the input pulse;
if the detection is successful, a corresponding judgment mark, namely a pulse existence mark is output, the mark is used for truth table judgment, and 32 paths of pulse detection are totally carried out.
8. The input circuit for the signal safety equipment according to claim 1, wherein the switching value storage module comprises a first FPGA, a second FPGA and a third FPGA, the first FPGA, the second FPGA and the third FPGA start counting pulse edges after receiving a start signal through optical coupling delay, and when counting the edges of a signal received by the first transceiving detection module and a signal received by the second transceiving detection module falls within a set threshold range, the detection module loop is considered to have received a transmission pulse, otherwise, the detection module loop is considered not to have received the transmission pulse.
9. The input circuit for the signal safety equipment according to claim 1, wherein the first transceiving detection module comprises a first optical coupler (A1) and a second optical coupler (B1), the first optical coupler (A1) is a first transceiving detection module sending end, the second optical coupler (B1) is a first transceiving detection module receiving end, and the first optical coupler (A1) and the second optical coupler (B1) form a first detection loop;
the second transceiving detection module comprises a third optical coupler (A2) and a fourth optical coupler (B2), the third optical coupler (A2) is a transmitting end of the second transceiving detection module, the fourth optical coupler (B2) is a receiving end of the second transceiving detection module, and the third optical coupler (A2) and the fourth optical coupler (B2) form a second detection loop;
the first optical coupler (A1) and the third optical coupler (A2) independently detect the correctness of a hardware circuit of the loop by sending pulses;
if the pulse sent by the first optical coupler (A1) of the first transceiving detection module cannot be received by the second optical coupler (B1), the loop of the first transceiving detection module has a fault;
if the pulse sent by the third optical coupler (A2) of the second transceiving detection module cannot be received by the fourth optical coupler (B2), the loop of the second transceiving detection module has a fault;
only when first receiving and dispatching detection module and second receiving and dispatching detection module circuit do not have the trouble, the first opto-coupler of first receiving and dispatching detection module (A1) send the pulse, and second receiving and dispatching detection module can receive, perhaps the third opto-coupler of second receiving and dispatching detection module (A2) send the pulse, and first receiving and dispatching detection module can receive, judges external relay contact closed this moment, otherwise judges that external relay contact breaks off.
10. The input circuit for a signal safety device according to claim 1, wherein the first transceiving detection module and the second transceiving detection module transmit pulses at different specific frequencies to exclude the effect of a single frequency continuous interference pulse.
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| CN116032326A (en) * | 2022-12-21 | 2023-04-28 | 苏州恩易浦科技有限公司 | Signal control method suitable for photovoltaic equipment, electronic equipment and storage medium |
| CN116032326B (en) * | 2022-12-21 | 2024-03-05 | 苏州恩易浦科技有限公司 | Signal control method suitable for photovoltaic equipment, electronic equipment and storage medium |
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