CN112311637B - MVB line redundancy switching method and system and vehicle - Google Patents
MVB line redundancy switching method and system and vehicle Download PDFInfo
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- CN112311637B CN112311637B CN201910712933.6A CN201910712933A CN112311637B CN 112311637 B CN112311637 B CN 112311637B CN 201910712933 A CN201910712933 A CN 201910712933A CN 112311637 B CN112311637 B CN 112311637B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40169—Flexible bus arrangements
- H04L12/40176—Flexible bus arrangements involving redundancy
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40267—Bus for use in transportation systems
- H04L2012/40273—Bus for use in transportation systems the transportation system being a vehicle
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Abstract
The invention relates to a method and a system for redundant switching of MVB lines and a vehicle, wherein the method comprises the following steps: respectively connecting a trust line and an observation line to a first register and a second register so as to respectively cache one frame of data received by the trust line and the observation line; and when the data received by the trust line is judged to be wrong, the wrong data is not sent, and the following operations are carried out: if the data received by the observation line is judged to be error-free, sending the data in the second register connected with the observation line, switching the observation line into a new trust line and switching the trust line into a new observation line when the sending is finished; and if the data received by the observation line is judged to be wrong, directly switching the observation line into a new trust line, and switching the trust line into the new observation line.
Description
Technical Field
The invention relates to the technical field of rail transit, in particular to an MVB (multifunction vehicle bus) line redundancy switching method and system based on an FPGA (field programmable gate array) and a vehicle.
Background
A redundancy scheme of a Multifunctional Vehicle Bus (MVB) network generally includes two lines, i.e., an a line and a B line, where one line is a trust line and the other line is an observation line. The two lines receive data from the MVB network at the same time, and when the trust line has problems, for example, frame data cannot be received or received frame data has errors, the trust line and the observation line are switched. However, when the existing MVB line redundancy switching method performs a line cutting operation, due to uncertainty of a time lag between the a line and the B line, the line cutting operation may not be switched to the observation line in time, resulting in loss of frame data.
Therefore, a fast, safe and reliable MVB line redundancy switching method and system capable of avoiding frame data loss is needed.
Disclosure of Invention
In order to solve the technical problems, the invention provides an MVB line redundancy switching method, an MVB line redundancy switching system and a vehicle based on an FPGA, wherein line switching can be performed quickly, safely and reliably by using a cache register and a designed tangent state machine, meanwhile, the situation of losing data when a line is switched is avoided, and the reliability of the whole MVB network is greatly improved.
According to an aspect of the present invention, there is provided a MVB line redundancy switching method, including:
respectively connecting a trust line and an observation line to a first register and a second register so as to respectively cache one frame of data received by the trust line and the observation line; and
when the data received by the trust line is judged to be wrong, the wrong data is not sent, and the following operations are carried out:
if the data received by the observation line is judged to be error-free, sending the data in the second register connected with the observation line, switching the observation line into a new trust line and switching the trust line into a new observation line when the sending is finished; and
and if the data received by the observation line is judged to be wrong, directly switching the observation line into a new trust line, and switching the trust line into the new observation line.
In an embodiment, the method further comprises:
prior to buffering the frame of data, one or more of the following operations are performed on the data: manchester decoding, CRC checking, master frame interval counting, frame start counting, slave frame length counting, and fault diagnosis.
In one embodiment, through the fault diagnosis:
if the data is in error, the data is not cached;
if the data is not in error, the data is cached into the corresponding register, and a cache completion signal is sent out when the caching is completed.
In one embodiment, when data received by the line of trust is in error:
if the cache completion signal corresponding to the observation line is not received within the preset time, directly performing line switching;
and if a cache completion signal corresponding to the observation line is received within a preset time, switching the line after the data in the second register connected with the observation line is sent out.
In one embodiment, the fault diagnosis includes:
if the interval between two adjacent main frames received by the trust line exceeds 1.4ms, the interval between the main frames received by the trust line is considered to be too long and wrong; and
and if the interval between two adjacent main frames received by the observation line exceeds 1.4ms, the interval between the main frames received by the observation line is considered to be too long and wrong.
In one embodiment, the fault diagnosis further comprises:
and if the frame start count value of the main frame or the slave frame received by the observation line is greater than 8us than the frame start count value of the main frame or the slave frame received by the trust line, the data time lag of the trust line is considered to be overlarge.
In one embodiment, the fault diagnosis further comprises:
if the length count of the slave frame received by the trust line is not consistent with the length of the slave frame required by the master frame, the length of the slave frame received by the trust line is considered to be wrong;
and if the length count of the slave frame received by the observation line is not consistent with the length of the slave frame required by the master frame, considering that the length of the slave frame received by the observation line is wrong.
In an embodiment, the method further comprises:
and deleting the existing data in the register when new data are cached to the first register or the second register.
According to another aspect of the present invention, there is provided an MVB line redundancy switching system, including:
the first register is connected with the trust line and used for caching data of a frame to be sent currently in the trust line;
the second register is connected with the observation line and used for caching data of a frame to be sent currently in the observation line;
the fault diagnosis module is used for judging whether the data received by the trust line and the observation line are in error; and
a data selection module, configured to, when data received by the line of trust is erroneous, not send the erroneous data, and:
if the data received by the observation line is not in error, sending the data in the second register connected with the observation line, and switching the observation line into a new trust line and switching the trust line into a new observation line when the sending is finished; and
and if the data received by the observation line is wrong, directly switching the observation line into a new trust line, and switching the trust line into the new observation line.
The invention also provides a vehicle which comprises the MVB line redundancy switching system.
Compared with the prior art, one or more embodiments in the above scheme can have the following advantages or beneficial effects:
the embodiment of the invention provides an MVB (multifunction vehicle bus) line redundancy switching method and system based on an FPGA (field programmable gate array), and a vehicle.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention.
Fig. 1 schematically shows an MVB line redundancy switching system according to an embodiment of the present invention.
Fig. 2 is a state flow diagram of a MVB line redundancy switching method according to an embodiment of the present invention.
Detailed Description
The following detailed description of the embodiments of the present invention will be provided with reference to the drawings and examples, so that how to apply the technical means to solve the technical problems and achieve the technical effects can be fully understood and implemented. It should be noted that, as long as there is no conflict, the embodiments and the features of the embodiments of the present invention may be combined with each other, and the technical solutions formed are within the scope of the present invention.
In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details or with other methods described herein.
In order to solve the technical problem that frame data are lost when the existing MVB line redundancy switching method and system perform line cutting, the embodiment of the invention provides an MVB line redundancy switching method and system based on an FPGA (Field Programmable Gate Array).
The MVB line redundancy switching method and system based on FPGA provided by the present invention are comprehensively described below with reference to the accompanying drawings and the embodiments of the present invention.
Fig. 1 schematically shows an MVB line redundancy switching system according to an embodiment of the present invention. As shown in fig. 1, the system 100 includes: and one line is a trust line, and the other line is an observation line. Two lines receive data from the MVB network simultaneously. Under normal conditions, the trust line is responsible for sending the received frame data to the message analysis module at the rear end, while the observation line is only used as a redundant line, and the received frame data is not sent.
In the embodiment of the invention, a register is connected to both the line A and the line B. For ease of understanding and explanation, it is first assumed that line A is a line of trust, line B is a line of observation, the register connected to line A is referred to as a first register (not shown), and the register connected to line B is referred to as a second register (not shown). The first register is used for caching data received by an A line and comprises a master frame and a slave frame; the second register is used for buffering data received by the B line and comprises a master frame and a slave frame. Of course, it is also possible to first default to the B-line as the trust line, and then the A-line as the observation line, but the invention is not limited thereto.
By setting the first register and the second register to buffer the data received by the line A and the line B respectively, the embodiment of the invention can avoid data loss caused by the fact that data transmitted by an observation line arrives earlier than data transmitted by a signal line in the process of cutting.
In an embodiment of the present invention, before buffering a frame of data, one or more of the following operations are performed on the data: manchester decoding, CRC checking, master frame interval counting, frame start counting, slave frame length counting, and fault diagnosis.
As shown in fig. 1, the system 100 further includes: a first manchester decoder block 101 and a second manchester decoder block 201. The first manchester decoder block 101 is connected to line a, and the second manchester decoder block 201 is connected to line B. The first manchester decoder module 101 and the second manchester decoder module 201 are respectively used for decoding the main frame or the slave frame received by the line a and the line B, judging whether the frame format of the main frame or the slave frame received by the line a and the line B conforms to the definition of the standard frame, and sending a frame interpretation signal. The frame interpretation signals at least include a main frame correct end signal, a frame start signal, a frame end signal and a frame format error signal, and specific functions of the signals are described below.
The system 100 further comprises: a first CRC check module 102 and a second CRC check module 202. The first CRC check module 102 is connected to the first manchester decoder module 101, and is configured to perform CRC calculation on the main frame or the slave frame decoded by the first manchester decoder module 101, compare the calculated CRC value with the CRC value in the main frame or the slave frame, and send a CRC check correct signal or a CRC check error signal according to the comparison result. The second CRC check module 202 is connected to the second manchester decoder module 201, and is configured to perform CRC calculation on the main frame or the slave frame decoded by the second manchester decoder module 201, compare the calculated CRC value with the CRC value in the main frame or the slave frame, and send a CRC check correct signal or a CRC check error signal according to the comparison result.
The system 100 further comprises: a first counter module 103 and a second counter module 203. Wherein the first counter module 103 and the second counter module 203 each comprise three counters, namely: a master frame interval counter, a frame start counter and a slave frame length counter. The first counter module 103 is coupled to the first Manchester decoder module 101 and the second counter module 203 is coupled to the second Manchester decoder module 201. The main frame interval counter is used for counting the interval of two adjacent main frames received by the line A and the line B. In order to accurately determine the interval between two adjacent main frames, in the embodiment of the present invention, the main frame interval counter keeps counting, and is cleared when a main frame correct ending signal sent by the manchester decoder module is received. The frame start counter is used for recording the start time of a main frame or a slave frame received by the line A and the line B, starts counting when receiving a frame start signal sent by the Manchester decoder module, and is cleared when receiving a frame end signal sent by the Manchester decoder module. The frame length counter is used for recording the lengths of the slave frames received by the A line and the B line.
The system 100 further comprises: and a fault diagnosis module 104. The failure diagnosis module 104 is connected to the first CRC check module 102, the second CRC check module 202, the first counter module 103, and the second counter module 203, respectively. The fault diagnosis module 104 is configured to diagnose whether an error occurs in the main frame or the slave frame received by the a line and the B line according to the data or signals transmitted by the first manchester decoder module 101, the second manchester decoder module 201, the first CRC check module 102, the second CRC check module 202, the first counter module 103, and the second counter module 203. The fault diagnosis comprises the following steps:
(1) if a frame format error signal sent by the first Manchester decoder module 101 is received, the frame format of the main frame or the slave frame received by the line A is considered to be in error; similarly, if the frame format error signal sent by the second manchester decoder module 201 is received, the frame format of the master frame or the slave frame received by the B line is considered to be in error.
(2) If a CRC check error signal sent by the first CRC check module 102 is received, the CRC of the master frame or the slave frame received by the a line is considered to be an error; similarly, if the CRC check error signal sent by the second CRC check module 202 is received, the CRC of the master frame or the slave frame received by the B line is considered to be in error.
(3) Preferably, if the value of the received primary frame interval counter sent by the first counter module 103 exceeds 1.4ms, it is considered that the primary frame interval received by the a line is too long and wrong; similarly, if the value of the received primary frame interval counter sent by the second counter module 203 exceeds 1.4ms, it is determined that the primary frame interval received by the B-line is too long and wrong.
(4) Preferably, if the received frame start counter value sent by the second counter module 203 is greater than 8us than the frame start counter value sent by the first counter module 103, the a-line data skew is considered to be too large, that is, the a-line received master frame or slave frame is considered to be in error; on the contrary, if the received frame start counter value sent by the first counter module 103 is greater than 8us than the frame start counter value sent by the second counter module 203, the B-line data skew is considered to be too large, that is, the master frame or the slave frame received by the B-line is considered to be in error.
(5) If the value of the slave frame length counter sent by the first counter module 103 is received to be inconsistent with the slave frame length required by the master frame corresponding to the slave frame, the slave frame length received by the line a is considered to be wrong; similarly, if the value of the slave frame length counter sent by the second counter module 203 is not consistent with the slave frame length required by the master frame corresponding to the slave frame, it is determined that the slave frame length received by the B line is wrong.
It should be noted that 1.4ms in (3) and 8us in (4) can be flexibly set to other values according to actual conditions, and the present invention is not limited to this. Further, the fault diagnosis may further include: and if the B line has received the main frame or the slave frame and the A line still does not receive the corresponding main frame or slave frame within the preset time, the A line is considered to be in fault.
The embodiment of the invention can improve the sensitivity of a switching line through the strict fault diagnosis, further ensure that only the correct main frame and the correct slave frame can be sent to the message analysis module, and improve the correctness and the reliability of communication.
Preferably, in the embodiment of the present invention, the first register and the second register are respectively connected to the failure diagnosis module 104, and are configured to buffer only the master frame or the slave frame received by the a line and the B line and correctly subjected to failure diagnosis. The caching process is as follows: diagnosis by the fault diagnosis module 104: if the main frame or the slave frame received by the line A and the line B has errors, the main frame or the slave frame is not cached; if the main frame or the slave frame received by the line A and the line B has no error, the correct main frame or the correct slave frame is cached into the corresponding register, and when the caching is finished, a caching completion signal is sent out.
Specifically, through fault diagnosis: and if the main frame or the slave frame received by the line A has no error, caching the main frame or the slave frame received by the line A to the first register, and sending a first register caching completion signal when the first register caching is completed. After fault diagnosis: and if the error of the main frame or the slave frame received by the B line is not generated, buffering the main frame or the slave frame received by the B line to a second register, and sending a second register buffer completion signal when the second register buffer is completed.
In addition, during the caching: the first register and the second register are to be updated in real time. Specifically, when a new master frame or slave frame is cached to the first register and the second register, the existing master frame or slave frame in the first register and the second register is deleted at the same time, so that only one master frame or one slave frame is reserved in the first register and the second register.
Returning to fig. 1, the system 100 also includes an AB line data selection module 105 (referred to as a data selection module for short). The AB line data selection module 105 is connected to the first manchester decoder module 101, the second manchester decoder module 201, the fault diagnosis module 104, and the message analysis module, and is configured to switch the AB line according to a diagnosis result of the fault diagnosis module, and simultaneously select a correct main frame from four sources, i.e., the a line, the first register, the B line, and the second register, or send the main frame or the sub frame to the message analysis module. The message analysis module will then identify the primary frame type of the primary frame sent by the AB line data selection module 105. In the embodiment of the present invention, the master frame is of various types including, for example, Fcode0, Fcode1, and Fcode 15.
Fig. 2 is a state flow diagram of a MVB line redundancy switching method according to an embodiment of the present invention. As shown in fig. 2, the AB line data selection module 105 implements AB line switching and transmission of a master frame or a slave frame according to the following state machine.
Specifically, the state machine selects the frame data to be sent according to the current state:
on reset, the A _ trust state is entered. A _ trust state: the line A is a trust line, the line B is an observation line, and the state directly sends the main frame or the auxiliary frame received by the line A to the message analysis module. When the message analysis module analyzes that the frame sent by the AB line data selection module 105 is a "device state request main frame", feeding back an AB line switching signal to the AB line data selection module 105 to enter a B _ trust state; when a master or slave frame error signal in the a-line is received, the Wait _ B state is entered.
Wait _ B state: waiting for the primary frame or the secondary frame received by the B line to be buffered to the second register, and the state does not send any data to the message analysis module. Entering a B _ trust state when a second register cache completion signal is not received within the preset time; and when the second register buffer finishing signal is received within the preset time, entering a Send _ B state. In the embodiment of the present invention, the preset time is preferably 8us, but may be flexibly set to other values according to actual situations, which is not limited in the present invention.
By setting a preset time, the embodiment of the invention can avoid the accumulation of the main frame or the slave frame received by the line A and the line B, namely, if the buffer finishing signal is not received within the preset time, the line switching of the line A and the line B is directly carried out, so as to ensure that the normal sending of the next main frame or the slave frame is not influenced.
Send _ B state: and sending the main frame or the auxiliary frame of the second register to a message analysis module, and entering a B _ trust state when the message analysis module finishes sending.
B _ trust state: the B line is a trust line, the A line is an observation line, and the state directly sends the main frame or the auxiliary frame received by the B line to the message analysis module. When the message analysis module analyzes that the frame sent by the AB line data selection module 105 is a "device state request main frame", feeding back an AB line switching signal to the AB line data selection module 105 to enter an a _ trust state; when a master or slave frame error signal in the B-line is received, the Wait _ a state is entered.
Wait _ a state: waiting for the master frame or slave frame received by the a-line to be buffered to the first register, this state does not send any data to the message analysis module. Entering an A _ trust state when a first register cache completion signal is not received within preset time; and when the first register buffer completion signal is received within the preset time, entering a Send _ A state.
Send _ A state: and sending the master frame or the slave frame of the first register and the corresponding enabling signal to a message analysis module, and entering an A _ trust state when the message analysis module finishes sending.
In the embodiment of the present invention, the AB line data selection module 105 sends a corresponding enable signal while sending a correct master frame or slave frame to the message analysis module.
Correspondingly, the embodiment of the invention also provides a vehicle, which comprises the MVB line redundancy switching system.
In summary, embodiments of the present invention provide a method and a system for MVB line redundancy switching based on an FPGA, and a vehicle, in which a register for caching one frame of data is respectively provided for a trust line and an observation line, and a state machine for line switching is designed for the trust line and the observation line, and line switching can be performed quickly, safely and reliably by using the designed cache register and the designed tangent state machine, and meanwhile, a situation of data loss during line switching is avoided, and reliability of the entire MVB network is greatly improved.
It is to be understood that the disclosed embodiments of the invention are not limited to the particular process steps or materials disclosed herein, but rather, are extended to equivalents thereof as would be understood by those of ordinary skill in the relevant art. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to be limiting.
Reference in the specification to "an embodiment" means that a particular feature, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. Thus, the appearances of the phrase or "an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment.
Furthermore, the described features or characteristics may be combined in any other suitable manner in one or more embodiments. In the above description, certain specific details are provided, such as thicknesses, amounts, etc., to provide a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention may be practiced without one or more of the specific details, or with other methods, components, materials, and so forth.
While the above examples are illustrative of the principles of the present invention in one or more applications, it will be apparent to those of ordinary skill in the art that various changes in form, usage and details of implementation can be made without departing from the principles and concepts of the invention. Accordingly, the invention is defined by the appended claims.
Claims (10)
1. A MVB line redundancy switching method comprises the following steps:
respectively connecting a trust line and an observation line to a first register and a second register so as to respectively cache one frame of data received by the trust line and the observation line; and
when the data received by the trust line is judged to be wrong, the wrong data is not sent, and the following operations are carried out:
if the data received by the observation line is judged to be error-free, sending the data in the second register connected with the observation line, switching the observation line into a new trust line and switching the trust line into a new observation line when the sending is finished; and
and if the data received by the observation line is judged to be wrong, directly switching the observation line into a new trust line, and switching the trust line into the new observation line.
2. The method of claim 1, further comprising:
prior to buffering the frame of data, one or more of the following operations are performed on the data: manchester decoding, CRC checking, master frame interval counting, frame start counting, slave frame length counting, and fault diagnosis.
3. The method of claim 2, wherein, via the fault diagnosis:
if the data is in error, the data is not cached;
if the data is not in error, the data is cached into the corresponding register, and a cache completion signal is sent out when the caching is completed.
4. The method of claim 3, wherein, upon an error in the data received by the line of trust:
if the cache completion signal corresponding to the observation line is not received within the preset time, directly performing line switching;
and if a cache completion signal corresponding to the observation line is received within a preset time, switching the line after the data in the second register connected with the observation line is sent out.
5. The method of claim 2, wherein the fault diagnosis comprises:
if the interval between two adjacent main frames received by the trust line exceeds 1.4ms, the interval between the main frames received by the trust line is considered to be too long and wrong; and
and if the interval between two adjacent main frames received by the observation line exceeds 1.4ms, the interval between the main frames received by the observation line is considered to be too long and wrong.
6. The method of claim 5, wherein the fault diagnosis further comprises:
and if the frame start count value of the main frame or the slave frame received by the observation line is greater than 8us than the frame start count value of the main frame or the slave frame received by the trust line, the data time lag of the trust line is considered to be overlarge.
7. The method of claim 6, wherein the fault diagnosis further comprises:
if the length count of the slave frame received by the trust line is not consistent with the length of the slave frame required by the master frame, the length of the slave frame received by the trust line is considered to be wrong;
and if the length count of the slave frame received by the observation line is not consistent with the length of the slave frame required by the master frame, considering that the length of the slave frame received by the observation line is wrong.
8. The method of claim 1, further comprising:
and deleting the existing data in the register when new data are cached to the first register or the second register.
9. An MVB line redundancy switching system, comprising:
the first register is connected with the trust line and used for caching data of a frame to be sent currently in the trust line;
the second register is connected with the observation line and used for caching data of a frame to be sent currently in the observation line;
the fault diagnosis module is used for judging whether the data received by the trust line and the observation line are in error; and
a data selection module, configured to, when data received by the line of trust is erroneous, not send the erroneous data, and:
if the data received by the observation line is not in error, sending the data in the second register connected with the observation line, and switching the observation line into a new trust line and switching the trust line into a new observation line when the sending is finished; and
and if the data received by the observation line is wrong, directly switching the observation line into a new trust line, and switching the trust line into the new observation line.
10. A vehicle comprising the MVB line redundancy switching system of claim 9.
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