CN112310124A - Display panel, display device and preparation method of display panel - Google Patents

Display panel, display device and preparation method of display panel Download PDF

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Publication number
CN112310124A
CN112310124A CN202011170361.2A CN202011170361A CN112310124A CN 112310124 A CN112310124 A CN 112310124A CN 202011170361 A CN202011170361 A CN 202011170361A CN 112310124 A CN112310124 A CN 112310124A
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layer
display area
metal layer
display panel
substrate
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CN202011170361.2A
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CN112310124B (en
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顺布乐
郝翠玉
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The application provides a display panel, display device and display panel's preparation method, display panel includes display area and non-display area, the display area includes first metal level, and the non-display area includes: a substrate layer; the first grid layer is arranged on the surface of one side of the substrate layer; the interlayer dielectric layer is arranged on the surface of one side, away from the substrate layer, of the first gate layer; the second metal layer is arranged on the surface of one side, far away from the substrate layer, of the interlayer dielectric layer, extends from the non-display area to the display area, and is electrically connected with the first metal layer; and the second flat layer is arranged on the surface of one side of the second metal layer, which is far away from the substrate layer. According to the display panel, the first metal layer and the first flat layer in the prior art are etched, and the second metal layer and the second flat layer of the display area extend to the non-display area, so that the risk of exposure of the second metal layer caused by the etching step is reduced, and the stability of the display panel is improved.

Description

Display panel, display device and preparation method of display panel
Technical Field
The application relates to the technical field of display, in particular to a display panel, a display device and a preparation method of the display panel.
Background
Since an Organic Light Emitting Diode (OLED) Display device, especially an Active-Matrix Organic Light Emitting Diode (AMOLED), has the advantages of Light weight, self-luminescence, wide viewing angle, wide color gamut, high contrast, lightness, thinness, low driving voltage, low energy consumption, fast response speed, etc., the application range is more and more extensive, and thus, the OLED Display device becomes a main field of research and development in the Display technology field.
With the development of the AMOLED display screen technology, the requirement of the terminal device for the brightness uniformity of the display screen is improved, but due to the existence of the resistance Drop effect (IR Drop), when the display panel works, the thin film field effect transistor generates a loop current, so that the resistance Drop effect is generated, the voltage on the power supply voltage is reduced, the brightness of the two ends of the display panel, which are closer to the Integrated Circuit (IC), and farther from the IC is different, and the problem of poor brightness uniformity of the panel display is caused.
At present, many AMOLED display panels adopt a general double-layer metal trace (double Source/Drain, double SD) structure for improving the resistance drop effect, that is, a structure in which a first metal layer (SD1) and a second metal layer (SD2) are connected, and the structure enables a non-display area of the display panel to form a structure, which sequentially includes: a base substrate 111, an insulating Layer 112, a first Gate Layer (Gate Metal 1, GE1)113, an interlayer Dielectric (ILD) 114, a first Metal Layer (SD1)115, a first Planarization Layer (PLN 1)116, a second Planarization Layer (PLN 2)117, and a cathode 118, as shown in fig. 1 and 2, since the first Metal Layer 115 is covered with the first Planarization Layer 116, there is a step of ashing (Ash) Etching in the patterning process of the first Planarization Layer 116, and a step of Dry Etching in the patterning process of the second Metal Layer in the display area, which may cause over-Etching in the first Planarization Layer 116 after the two Etching steps, possibly causing Etching Loss (Dry Loss) of the first Planarization Layer 116 at the slope of the first Metal Layer 115, thereby causing a problem of short circuit of the first Metal Layer 116 and the cathode 116, and then the display panel has the problem of poor display.
Disclosure of Invention
The application provides a display panel, a display device and a display panel preparation method, which aim to solve the problem that a metal layer of a non-display area in the existing display panel is easy to expose.
In one aspect, the present application provides a display panel including a display area and a non-display area surrounding the display area, the display area including a first metal layer, the non-display area including:
a substrate layer;
the first grid layer is arranged on the surface of one side of the substrate layer;
the interlayer dielectric layer is arranged on the surface of one side, away from the substrate layer, of the first gate layer;
the second metal layer is arranged on the surface of one side, far away from the substrate layer, of the interlayer dielectric layer, extends from the non-display area to the display area, and is electrically connected with the first metal layer;
and the second flat layer is arranged on the surface of one side of the second metal layer, which is far away from the substrate layer.
In a possible implementation manner of the present application, the non-display area further includes a pixel defining layer, and the pixel defining layer is disposed on a surface of the second planarization layer, the surface being far away from the substrate layer.
In one possible implementation manner of the present application, the substrate layer includes:
a first flexible layer;
the first buffer layer is arranged on the surface of one side of the first flexible layer;
the second flexible layer is arranged on the surface of one side, away from the first flexible layer, of the first buffer layer;
the second buffer layer is arranged on the surface of one side, far away from the first flexible layer, of the second flexible layer.
In one possible implementation manner of the present application, the non-display area further includes:
the first insulating layer is arranged on the surface of one side of the substrate layer, and the first grid electrode is arranged on the surface of one side, far away from the substrate layer, of the first insulating layer;
and the second insulating layer is arranged on the surface of one side of the first insulating layer, which is far away from the flexible layer.
In a possible implementation manner of the present application, the non-display region further includes a first through hole, the first through hole is disposed on the interlayer dielectric layer, and the second metal layer penetrates through the interlayer dielectric layer through the first through hole and extends to the surface of the first gate layer.
In a possible implementation manner of the present application, an inclination angle is formed between the surface and the side surface of the second metal layer, and the surface of the second metal layer is a surface far away from the flexible layer.
In one possible implementation manner of the present application, the non-display area further includes a cathode disposed on a surface of the pixel defining layer on a side away from the flexible layer.
In one possible implementation manner of the present application, the display area further includes: the display device comprises a first flat layer, a substrate layer formed by extending a non-display area, an interlayer dielectric layer, a first gate layer, a second metal layer and a second flat layer;
the interlayer dielectric layer is arranged on the surface of one side of the substrate layer;
the first gate layer is arranged on the surface of one side, away from the substrate layer, of the interlayer dielectric layer;
the first metal layer is arranged on the surface of one side, away from the substrate layer, of the first gate layer;
the first flat layer is arranged on the surface of one side, away from the substrate layer, of the first metal layer;
the second metal layer is arranged on the surface of one side, away from the substrate layer, of the first flat layer;
the second flat layer is arranged on the surface of one side, away from the substrate layer, of the second metal layer.
In another aspect, the present application further provides a display device, which includes the display panel.
In another aspect, the present application further provides a method for manufacturing a display panel, where the method includes:
providing a substrate layer;
preparing a first grid layer on the surface of one side of the substrate layer;
preparing an interlayer dielectric layer on the surface of the first gate layer, which is far away from the substrate layer;
preparing a second metal layer on the surface of one side of the interlayer dielectric layer away from the substrate layer;
and preparing a second flat layer on the surface of the side, away from the substrate layer, of the second metal layer.
According to the method and the device, the first metal layer and the first flat layer extending from the display area to the non-display area are etched, and the second metal layer and the second flat layer of the display area extend to the non-display area, so that the width loss of the second metal layer caused by the etching step of the second metal layer and the flat layer in the non-display area is reduced, the risk of exposing the metal layer in the non-display area is reduced, and the stability of the panel is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a metal layer exposed structure of a non-display region of a prior art display panel;
FIG. 2 is a schematic diagram of a non-display region of a prior art display panel;
fig. 3 is a schematic structural diagram of a display area of a display panel provided in an embodiment of the present application;
fig. 4 is a schematic structural diagram of a non-display area of a display panel provided in an embodiment of the present application;
fig. 5 is a schematic top view structure diagram of a non-display area of a display panel provided in an embodiment of the present application;
fig. 6 is a schematic flow chart of a manufacturing method of a display panel provided in an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are used merely for convenience of description and for simplicity of description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed in a particular orientation, and be operated, and thus should not be considered as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In this application, the word "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the application. In the following description, details are set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes are not set forth in detail in order to avoid obscuring the description of the present application with unnecessary detail. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
Embodiments of the present application provide a display panel, a display device, and a method for manufacturing the display panel, which are described in detail below.
Referring to fig. 3, the present embodiment provides a display panel, which includes a display area 100 and a non-display area 200 surrounding the display area, wherein as shown in fig. 3, the display area 100 includes: a substrate layer 1, a first gate layer 31, an interlayer dielectric layer 4, a first metal layer 51, a first planarization layer 61, a second metal layer 52, and a second planarization layer 62.
Wherein, in some embodiments, the substrate layer 1 comprises: a first flexible layer 11, a first barrier layer 12, a second flexible layer 13 and a second barrier layer 14.
A first barrier layer 12 is provided on the surface of one side of the first flexible layer 11; a second flexible layer 13 is provided on the surface of the first barrier layer 12 on the side away from the first flexible layer 11; a second barrier layer 14 is provided on the surface of the second flexible layer 13 on the side remote from the first flexible layer 11. The first flexible layer 11 and the second flexible layer 13 may be made of Polyimide (PI), or may be made of one or more of acrylic, hexamethyl disiloxane, polyacrylate, polycarbonate, and polystyrene. The first barrier layer 12 and the second barrier layer 14 are made of inorganic materials for blocking the invasion of external water and oxygen.
The interlayer dielectric layer 4 is arranged on the surface of one side of the substrate layer 1; the first gate layer 31 is disposed on a surface of the interlayer dielectric layer 4 away from the substrate layer 1, and is used for manufacturing a gate of a TFT device switch, and the first gate layer may be a tri-stack layer made of Ti/Al/Ti three-layer materials or a dual-stack layer made of Ti/Al two-layer materials.
The first metal layer 51 is arranged on the surface of the first gate layer 31 far away from the substrate layer 1; the first metal layer 51 is used as a Data Line (Data Line), a Vdd Line (Vdd Line), an initialization (STV) signal Line, and the like of the display panel. The first planarization layer 61 is disposed on a surface of the first metal layer 51 away from the substrate layer 1, and the first planarization layer 61 is used for planarizing the surface of the first metal layer 51.
The second metal layer 52 is arranged on the surface of the first flat layer 61 far away from the substrate layer 1, the second metal layer 52 forms a source/drain electrode and a data wire of the driving thin film transistor, the second metal layer 52 is connected with the first metal layer 51 through a contact hole, and the Vdd wire is made into a mesh surface structure, so that the uniformity of the display panel is better. The second planarization layer 62 is disposed on a surface of the second metal layer 52 on a side away from the substrate layer 1, and the second planarization layer 62 is used for planarizing the surface of the second metal layer 52.
In the display area, the second metal layer 51 is electrically connected with the first metal layer 52 through the contact hole to form a double-layer wiring structure, after any one of the first metal layer 51 and the second metal layer 52 is broken, the other metal layer can still keep signal transmission, the risk that the signal wiring is broken due to long-term bending to cause signal transmission failure is reduced, and the yield of the display panel is improved.
The display area 100 further includes a third metal Layer 53 and a Pixel Definition Layer (PDL) 7, the third metal Layer is an anode metal Layer, the second metal Layer 52 and the third metal Layer (anode metal Layer) 53 are connected through a contact hole, and the second metal Layer 52 is further connected to the first metal Layer 51 through a contact hole.
The pixel definition layer 7 is disposed on a surface of the third metal layer 53 away from the substrate layer 1, a supporting Pillar (PS) 9 is further disposed on the pixel definition layer 7, and the supporting pillar 9 is formed by patterning a reserved area of the pixel definition layer 7.
As shown in fig. 3 and 4, the non-display area 200 includes: a substrate layer 1 formed by extending the display area 100, a first gate layer 31, an interlayer dielectric layer 4, a second metal layer 52, and a second planarization layer 62.
The first gate layer 31 is provided on a surface on one side of the substrate layer 1; the interlayer dielectric layer 4 is arranged on the surface of the first gate layer 31 far away from the substrate layer 1; the second metal layer 52 is disposed on a surface of the interlayer dielectric layer 4 away from the substrate layer 1, and is electrically connected to the first metal layer 51; the second flat layer 62 is disposed on a surface of the second metal layer 52 on a side away from the substrate layer 1.
The display panel provided by the embodiment etches away the first metal layer 51 and the first flat layer 61 extending from the display area 100 to the non-display area 200, and extends the second metal layer 52 and the second flat layer 62 of the display area 100 to the non-display area 200, thereby reducing the width loss of the second metal layer 52 caused by the etching step of the second metal layer 52 and the second flat layer 61 in the non-display area 200, so as to reduce the risk of exposing the second metal layer 62 of the non-display area, and thus improving the stability of the display panel.
In some embodiments, the non-display region further comprises a cathode 8 and a pixel defining layer 7 formed by extending the display region, and the pixel defining layer 7 is disposed on a surface of the second flat layer on a side away from the substrate layer 1. The cathode 8 is formed by covering the second metal layer 52 with the second flat layer 62, and then depositing and patterning a cathode metal.
In some embodiments, the non-display region 200 further includes a combined insulating layer 2 formed by extending the display region, the combined insulating layer 2 including: a first insulating layer 21 and a second insulating layer 22. A first insulating layer 21 is arranged on the surface of one side of the substrate layer 1, and the first gate 31 is arranged on the surface of the first insulating layer far away from the side of the substrate layer 1; a second insulating layer 22 is provided on the surface of the first insulating layer on the side remote from the flexible layer. The first insulating layer 21 and the second insulating layer 22 are both made of inorganic insulating materials. In the display area, the metal trace corresponding to the first metal layer is disposed in the second insulating layer 32.
As shown in fig. 5, in some embodiments, the non-display region 200 further includes a first via (CNT) 41, the first via 41 is disposed on the interlayer dielectric layer 4, and the second metal layer 52 extends to the surface of the first gate layer 31 through the first via 41 penetrating the interlayer dielectric layer 4.
In some embodiments, an inclination angle is formed on the surface and the side surface of the second metal layer 52, the surface of the second metal layer 52 is a surface far away from the substrate layer 1, the inclination angle may be formed on the surface of the second metal layer 52 in the non-display area, or may be formed on the surface of the second metal layer 52 in the display area, and the formation of the inclination angle is beneficial to increasing the coverage capability of the next film layer of the second metal layer 52, and reducing the problems of element disconnection or impedance increase.
The embodiment of the application also provides a display device, and the display device comprises the display panel. The display device in this embodiment may be: any product or component with a display function, such as wearable equipment, a mobile phone, a tablet computer, a television, a display, a notebook computer, an electronic book, electronic newspaper, a digital photo frame, a navigator and the like. The wearable device comprises a smart bracelet, a smart watch, a VR (Virtual Reality) and other devices.
As shown in fig. 6, an embodiment of the present application further provides a method for manufacturing a display panel, where the method includes:
step S101, providing a substrate layer;
step S102, preparing a first grid layer on the surface of one side of the substrate layer;
step S103, preparing an interlayer dielectric layer on the surface of the first gate layer far away from the substrate layer;
step S104, preparing a second metal layer on the surface of one side of the interlayer dielectric layer away from the substrate layer;
step S105, preparing a second flat layer on the surface of one side, away from the substrate layer, of the second metal layer.
In some embodiments, after step S105, the method may further include:
and preparing a pixel defining layer on the surface of the second flat layer far away from the first flexible layer.
According to the preparation method of the display panel, the existing first metal layer and the existing first flat layer in the non-display area are etched, the second metal layer is prepared on the interlayer dielectric layer in sequence, the second metal layer is subjected to patterning treatment, the second flat layer is plated, and the second flat layer is subjected to patterning treatment, so that the etching steps of the patterning treatment of the metal layer and the flat layer in the non-display area are reduced, the width loss caused by the etching of the metal layer in the non-display area in the etching step is reduced, the risk of exposing the metal layer in the non-display area is reduced, and the stability of the display panel is improved.
The display panel, the display device and the method for manufacturing the display panel provided by the embodiment of the present application are described in detail above, and a specific example is applied to illustrate the principle and the implementation manner of the present application, and the description of the above embodiment is only used to help understanding the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (10)

1. A display panel comprising a display area and a non-display area surrounding the display area, the display area comprising a first metal layer, the non-display area comprising:
a substrate layer;
the first grid layer is arranged on the surface of one side of the substrate layer;
the interlayer dielectric layer is arranged on the surface of one side, away from the substrate layer, of the first gate layer;
the second metal layer is arranged on the surface of one side, far away from the substrate layer, of the interlayer dielectric layer, extends from the non-display area to the display area, and is electrically connected with the first metal layer;
and the second flat layer is arranged on the surface of one side of the second metal layer, which is far away from the substrate layer.
2. The display panel of claim 1, wherein the non-display region further comprises a pixel defining layer disposed on a surface of the second planarization layer on a side away from the substrate layer.
3. The display panel of claim 1, wherein the substrate layer comprises:
a first flexible layer;
the first buffer layer is arranged on the surface of one side of the first flexible layer;
the second flexible layer is arranged on the surface of one side, away from the first flexible layer, of the first buffer layer;
the second buffer layer is arranged on the surface of one side, far away from the first flexible layer, of the second flexible layer.
4. The display panel according to claim 1, wherein the non-display region further comprises:
the first insulating layer is arranged on the surface of one side of the substrate layer, and the first grid electrode is arranged on the surface of one side, far away from the substrate layer, of the first insulating layer;
and the second insulating layer is arranged on the surface of one side of the first insulating layer, which is far away from the flexible layer.
5. The display panel according to claim 1, wherein the non-display region further comprises a first via hole disposed on the interlayer dielectric layer, and the second metal layer extends to the surface of the first gate layer through the first via hole penetrating the interlayer dielectric layer.
6. The display panel according to claim 1, wherein a tilt angle is formed between the surface and the side surface of the second metal layer, and the surface of the second metal layer is a surface of the second metal layer away from the flexible layer.
7. The display panel according to claim 1, wherein the non-display region further comprises a cathode electrode provided on a surface of the pixel defining layer on a side away from the flexible layer.
8. The display panel according to any one of claims 1 to 7, wherein the display area further comprises: the display device comprises a first flat layer, a substrate layer formed by extending a non-display area, an interlayer dielectric layer, a first gate layer, a second metal layer and a second flat layer;
the interlayer dielectric layer is arranged on the surface of one side of the substrate layer;
the first gate layer is arranged on the surface of one side, away from the substrate layer, of the interlayer dielectric layer;
the first metal layer is arranged on the surface of one side, away from the substrate layer, of the first gate layer;
the first flat layer is arranged on the surface of one side, away from the substrate layer, of the first metal layer;
the second metal layer is arranged on the surface of one side, away from the substrate layer, of the first flat layer;
the second flat layer is arranged on the surface of one side, away from the substrate layer, of the second metal layer.
9. A display device, characterized in that the display device comprises a display panel as claimed in any one of claims 1-8.
10. A method for manufacturing a display panel, the method comprising:
providing a substrate layer;
preparing a first grid layer on the surface of one side of the substrate layer;
preparing an interlayer dielectric layer on the surface of the first gate layer, which is far away from the substrate layer;
preparing a second metal layer on the surface of one side of the interlayer dielectric layer away from the substrate layer;
and preparing a second flat layer on the surface of the side, away from the substrate layer, of the second metal layer.
CN202011170361.2A 2020-10-28 2020-10-28 Display panel, display device and preparation method of display panel Active CN112310124B (en)

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US20140027791A1 (en) * 2012-07-24 2014-01-30 Sung Ho Cho Display apparatus
CN105807523A (en) * 2016-05-27 2016-07-27 厦门天马微电子有限公司 Array substrate, display panel comprising same and display device
CN106483726A (en) * 2016-12-21 2017-03-08 昆山龙腾光电有限公司 Thin-film transistor array base-plate and preparation method and display panels
CN109491121A (en) * 2018-12-24 2019-03-19 上海中航光电子有限公司 Display panel and display device
CN109920800A (en) * 2019-02-28 2019-06-21 武汉华星光电半导体显示技术有限公司 A kind of display device and preparation method thereof
CN111446266A (en) * 2020-05-12 2020-07-24 武汉华星光电技术有限公司 Display panel and preparation method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140027791A1 (en) * 2012-07-24 2014-01-30 Sung Ho Cho Display apparatus
CN105807523A (en) * 2016-05-27 2016-07-27 厦门天马微电子有限公司 Array substrate, display panel comprising same and display device
CN106483726A (en) * 2016-12-21 2017-03-08 昆山龙腾光电有限公司 Thin-film transistor array base-plate and preparation method and display panels
CN109491121A (en) * 2018-12-24 2019-03-19 上海中航光电子有限公司 Display panel and display device
CN109920800A (en) * 2019-02-28 2019-06-21 武汉华星光电半导体显示技术有限公司 A kind of display device and preparation method thereof
CN111446266A (en) * 2020-05-12 2020-07-24 武汉华星光电技术有限公司 Display panel and preparation method thereof

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