CN112260917A - Automobile communication device - Google Patents

Automobile communication device Download PDF

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Publication number
CN112260917A
CN112260917A CN202011041948.3A CN202011041948A CN112260917A CN 112260917 A CN112260917 A CN 112260917A CN 202011041948 A CN202011041948 A CN 202011041948A CN 112260917 A CN112260917 A CN 112260917A
Authority
CN
China
Prior art keywords
line
circuit
lin
communication device
fpga
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202011041948.3A
Other languages
Chinese (zh)
Inventor
郭斌
池洪伟
贾晓蕾
闫晗
刘俊丽
李雄明
曹煜林
张向宇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hangzhou Wolei Intelligent Technology Co ltd
Original Assignee
Hangzhou Wolei Intelligent Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hangzhou Wolei Intelligent Technology Co ltd filed Critical Hangzhou Wolei Intelligent Technology Co ltd
Priority to CN202011041948.3A priority Critical patent/CN112260917A/en
Publication of CN112260917A publication Critical patent/CN112260917A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60RVEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR
    • B60R16/00Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for
    • B60R16/02Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements
    • B60R16/023Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements for transmission of signals between vehicle parts or subsystems
    • B60R16/0231Circuits relating to the driving or the functioning of the vehicle
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00Network arrangements or protocols for supporting network services or applications
    • H04L67/01Protocols
    • H04L67/12Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40208Bus networks characterized by the use of a particular bus standard
    • H04L2012/40215Controller Area Network CAN
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40208Bus networks characterized by the use of a particular bus standard
    • H04L2012/40234Local Interconnect Network LIN
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40267Bus for use in transportation systems
    • H04L2012/40273Bus for use in transportation systems the transportation system being a vehicle

Abstract

The invention provides an automobile communication device, and relates to an automobile bus communication device. The problem that in the prior art, the integration of an automobile bus is poor is solved. This automotive communication device, including CAN line, lin line, the K line that the automotive equipment communication was used, CAN line, lin line, K line communicate with same FPGA circuit, FPGA circuit and host computer communication through transceiver circuit respectively. The invention realizes the communication of each bus of the automobile by using the FPGA to replace the host, thereby not only reducing the resource occupation of the host, but also improving the communication speed and reliability. The FPGA circuit is uniformly connected with an upper computer through a PCIE serial bus, so that the uniform management and coordination of the bus are realized. The K line and the lin line are unified into a K line/lin line channel, so that the FPGA circuit achieves the purpose that a pair of signal ends can be communicated with the K line and the lin line, and can be freely switched into the K line or the lin line for communication.

Description

Automobile communication device
Technical Field
The invention belongs to the technical field of automobile electronic information, and particularly relates to a communication device between automobile equipment.
Background
Electronic devices on automobiles need to communicate, and different types of devices typically need different types of communication lines, such as:
k line of automobile: the bus is a special line for data transmission between the control unit and the diagnostic instrument, namely an independent data line for connecting an obd interface of the automobile with an electronic control computer;
CAN line of automobile: controller Area Network (CAN) is short for. Various driving data of the automobile can be sent to a bus through sensors distributed all over the automobile body, the data cannot designate a unique receiver, and all receiving ends needing the data can read required information from the bus;
lin line of automobile: a low-cost serial communication network defined for a distributed electronic system of an automobile is a supplement to other automobile multi-path networks such as a Controller Area Network (CAN) and the like, and is suitable for application without high requirements on the bandwidth, performance or fault-tolerant function of the network.
At present, the three lines are all independently arranged, but with the increasing of automobile information processing and the increasing of integration, an integrated multi-line type communication module is urgently needed so as to carry out unified management on each communication line. In addition, generally, the control and information acquisition of the lines are realized through software programs of the host, if the line transition or the frequency of the cyclic communication is too high, a large amount of host resources are occupied, the cyclic communication speed is not guaranteed, and the control and information acquisition are easily influenced and mistaken by other interruptions of the host.
Disclosure of Invention
The invention aims to solve the problems in the prior art and provides an automobile communication device.
The purpose of the invention can be realized by the following technical scheme: the utility model provides an automobile communication device, includes CAN line, lin line, the K line that the automotive equipment communication was used, CAN line, lin line, K line communicate with same FPGA circuit through transceiver circuit respectively, FPGA circuit and host computer communication.
In some embodiments, the signal transmitting ends of the K transceiver circuit and the lin transceiver circuit are combined into one signal output through a gate circuit and then communicated with the FPGA circuit.
In some embodiments, the signal receiving ends of the K transceiver circuit and the lin transceiver circuit are connected to the same signal transmitting end of the FPGA circuit.
In some embodiments, each transceiver circuit of the CAN line, the lin line and the K line is connected with the FPGA circuit through a magnetic isolation circuit.
In some embodiments, the K transceiver circuit employs an L9637D transceiver circuit and the lin transceiver circuit employs a TJA1021 transceiver circuit.
In some embodiments, the magnetic isolation circuit employs a dual channel digital isolator admm 1201 chip circuit.
In some embodiments, the FPGA circuit is connected to a data memory, which stores programs that control the FPGA circuit and received data.
In some embodiments, the K transceiver circuit and the lin transceiver circuit are both powered by a power isolation circuit.
In some embodiments, the FPGA circuit is connected to the upper computer through a PCIE serial bus.
Compared with the prior art, the automobile communication device has the following advantages:
the invention realizes the communication of each bus of the automobile by using the FPGA to replace the host, thereby not only reducing the resource occupation of the host, but also improving the communication speed and reliability. The FPGA circuit is uniformly connected with an upper computer through a PCIE serial bus, so that the uniform management and coordination of the bus are realized. The K line and the lin line are unified into a K line/lin line channel, so that the FPGA circuit achieves the purpose that a pair of signal ends can be communicated with the K line and the lin line, and can be freely switched into the K line or the lin line for communication.
Drawings
In the drawings, which are not necessarily drawn to scale, like reference numerals may describe similar components in different views. Like reference numerals having different letter suffixes may represent different examples of similar components. The drawings illustrate generally, by way of example, but not by way of limitation, various embodiments discussed herein.
FIG. 1 is a schematic diagram of an embodiment of a device circuit module;
FIG. 2 is a schematic diagram of an L9637D chip transceiver circuit block;
FIG. 3 is a schematic diagram of a TJA1021 chip transceiver circuit block;
FIG. 4 is a schematic diagram of an ADUM1201 chip circuit block;
FIG. 5 is a schematic diagram of an isolated power supply module of the B0505S-1WR power module;
FIG. 6 is a schematic diagram of an AND gate SN74AHCT1G08 chip circuit block;
FIG. 7 is a schematic view of a power supply terminal
Fig. 8 is a schematic diagram of a ground-side circuit in the circuit.
Detailed Description
The following are specific examples of the present invention, and the technical solutions of the present invention are further described with reference to the drawings, but the present invention is not limited to these examples, and the following embodiments do not limit the invention according to the claims. Moreover, all combinations of features described in the embodiments are not necessarily essential to the solution of the invention.
It will be understood by those of ordinary skill in the art that all directional references (e.g., above, below, upward, downward, top, bottom, left, right, vertical, horizontal, etc.) are illustratively used in the figures to aid the reader's understanding and do not imply (e.g., position, orientation, or use, etc.) a limitation on the scope of the invention, which is defined by the claims appended hereto. Additionally, the term "substantially" may refer to slight imprecision or deviation in conditions, amounts, values, or dimensions, etc., some of which may be within manufacturing or tolerance limits.
Examples
As shown in fig. 1 to 8, an automotive communication device includes a CAN line, a lin line, and a K line for automotive equipment communication, where the CAN line, the lin line, and the K line are respectively communicated with a same FPGA circuit through transceiver circuits, and the FPGA circuit is a Field Programmable Gate Array (FPGA) (field Programmable Gate array) chip circuit, and directly implements cyclic communication on each line through program setting of the FPGA circuit, without passing through a host, thereby not only reducing resource occupation of the host, but also improving communication speed and reliability.
The FPGA circuit is connected with an upper computer through a PCIE serial bus to carry out information interaction, and the upper computer such as a host or an industrial personal computer can conveniently call or receive instructions of the upper computer when necessary. The FPGA circuit is connected with a DDR3 data memory, and the data memory stores a program for controlling the FPGA circuit and a data buffer for information interaction between the FPGA circuit and each bus and an upper computer.
One line and one K line are integrated into one "K line/lin line" channel, with a total of four such channels, in turn from K line/lin line 1 to K line/lin line 4. The K transceiver circuit of each K line/lin line channel adopts an L9637D chip transceiver circuit to realize information transceiving of the K line, and the lin transceiver circuit adopts a TJA1021 chip transceiver circuit to realize information transceiving of the lin line. The VS pin of the L9637D chip and the VBAT pin of the TJA1021 chip are powered by the IN K VCC power supply terminal, that is, the VS pin of the L9637D chip and the VBAT pin of the TJA1021 chip are connected to the K VCC output of the IN K VCC power supply terminal.
The signal receiving end TX of the K transceiver circuit and the signal receiving end TXD of the lin transceiver circuit are connected to the output end VOB of the dual-channel digital isolator ADUM1201 chip at the same time, signals output by the ADUM1201 chip can be transmitted to the L9637D chip and the TJA1021 chip at the same time, and therefore the signals of the K line and the lin line are sent at the same time, a two-to-two function is achieved, the K line is used as a K line communication function when the K line is communicated, and the lin line is used as a lin line communication function when the lin line is communicated. The signal transmitting terminal RX of the chip L9637D of the K transceiver circuit is connected with the pin A of the chip of the AND gate circuit SN74AHCT1G08, and the signal transmitting terminal RXD of the chip ADUM1201 is connected with the pin B of the chip of the AND gate circuit SN74AHCT1G 08. The Y pin of the AND gate SN74AHCT1G08 chip is connected to the input VIA pin of the dual channel digital isolator ADUM1201 chip. VIA and VOB at the other end of the dual-channel digital isolator ADUM1201 chip are connected with the FPGA circuit, so that the FPGA circuit achieves the purpose that a pair of signal ends can communicate with a K line and a lin line, the use of the FPGA signal ends is reduced, signals of the K line or the lin line can be freely selected to be received, and namely a pair of receiving and transmitting ends of the FPGA circuit can simultaneously perform signal interaction with the K line and the lin line through the dual-channel digital isolator ADUM1201 chip. The selection of the transmission signal can be realized by the physical connection and disconnection of the K line and the lin line, and the signal reception of the K line or the lin line can be realized by the program control of the FPGA circuit, for example, the transmission time of the signals of the K line and the lin line is set to be different, and a specific signal is detected at a specific time.
The CAN lines are four independent lines and sequentially from CAN bus 1 to CAN bus 4, each CAN transceiver is connected with a CAN controller, the CAN controller is connected with an FPGA circuit, and each CAN line channel is subjected to independent information interaction with the FPGA circuit.
The CAN transceiver and the CAN controller are also in electromagnetic isolation communication through a dual-channel digital isolator ADUM1201 chip.
The CAN transceiver, the K transceiver circuit and the lin transceiver circuit are all isolated and powered by a B0505S-1WR2 power module. The magnetic isolation and power isolation module ensures that the line channels cannot be influenced mutually, and ensures independence.
Although some terms are used more herein, the possibility of using other terms is not excluded. These terms are used merely to more conveniently describe and explain the nature of the present invention; they are to be construed as being without limitation to any additional limitations that may be imposed by the spirit of the present invention. The order of execution of the operations, steps, and the like in the apparatuses and methods shown in the specification and drawings may be implemented in any order as long as the output of the preceding process is not used in the subsequent process, unless otherwise specified. The descriptions using "first", "next", etc. for convenience of description do not imply that they must be performed in this order.
The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit or ambit of the invention as defined in the appended claims.

Claims (9)

1. The automobile communication device comprises a CAN line, a lin line and a K line for automobile equipment communication, and is characterized in that the CAN line, the lin line and the K line are respectively communicated with the same FPGA circuit through a transceiver circuit, and the FPGA circuit is communicated with an upper computer.
2. The automobile communication device according to claim 1, wherein signal transmitting ends of the K transceiver circuit and the lin transceiver circuit are combined into one signal output through an AND gate circuit and then communicated with the FPGA circuit.
3. The automotive communication device of claim 2, wherein the signal receiving ends of the K transceiver circuit and the lin transceiver circuit are connected to the same signal transmitting end of the FPGA circuit.
4. The automotive communication device of claim 3, wherein the K transceiver circuit is an L9637D transceiver circuit and the lin transceiver circuit is a TJA1021 transceiver circuit.
5. The automotive communication device of claim 1, wherein the K transceiver circuit and the lin transceiver circuit are both powered by a power isolation circuit.
6. The vehicle communication device according to claim 1, wherein each of the transceiver circuits of the CAN line, the lin line, and the K line is connected to the FPGA circuit through a magnetic isolation circuit.
7. The automotive communication device of claim 6, wherein the magnetic isolation circuit is a dual channel digital isolator (ADUM 1201) chip circuit.
8. The vehicle communication device according to claim 1, wherein the FPGA circuit is connected to a data memory, and the data memory stores a program for controlling the FPGA circuit and received data.
9. The automotive communication device of claim 1, wherein the FPGA circuit is connected to the host computer via a PCIE serial bus.
CN202011041948.3A 2020-09-28 2020-09-28 Automobile communication device Pending CN112260917A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011041948.3A CN112260917A (en) 2020-09-28 2020-09-28 Automobile communication device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011041948.3A CN112260917A (en) 2020-09-28 2020-09-28 Automobile communication device

Publications (1)

Publication Number Publication Date
CN112260917A true CN112260917A (en) 2021-01-22

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CN107065818A (en) * 2016-12-28 2017-08-18 海特汽车科技(苏州)有限公司 A kind of EPS controllers diagnostic equipment
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Application publication date: 20210122