CN112259572A - Miniature LED display - Google Patents

Miniature LED display Download PDF

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Publication number
CN112259572A
CN112259572A CN202011157359.1A CN202011157359A CN112259572A CN 112259572 A CN112259572 A CN 112259572A CN 202011157359 A CN202011157359 A CN 202011157359A CN 112259572 A CN112259572 A CN 112259572A
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layer
type semiconductor
diode display
emitting diode
light emitting
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CN202011157359.1A
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CN112259572B (en
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陈彦烨
吴志凌
陈国玮
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Chuangchuang Display Technology Co ltd
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Chuangchuang Display Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Led Devices (AREA)
  • Led Device Packages (AREA)

Abstract

The invention provides a micro light-emitting diode display, which comprises at least one first type semiconductor substrate layer, a plurality of semiconductor light-emitting platforms and a conductive layer. The plurality of semiconductor light emitting platforms are dispersedly arranged on at least one first type semiconductor substrate layer, wherein the at least one first type semiconductor substrate layer is provided with a surface exposed by the semiconductor light emitting platforms. The conducting layer is configured on the surface of at least one first type semiconductor substrate layer and distributed with the semiconductor light-emitting platforms in a staggered mode, and the ratio of the contact area of the conducting layer and the surface to the area of the surface is larger than or equal to 0.2.

Description

Miniature LED display
Technical Field
The present invention relates to a display, and more particularly, to a micro light emitting diode display.
Background
With the progress of optoelectronic technology, the volume of many optoelectronic components is gradually reduced. In recent years, due to a breakthrough in manufacturing size, light emitting diodes have been applied not only to lighting technology but also to manufacturing display panels. The led display is an active Light Emitting display, and compared with an Organic Light-Emitting Diode (OLED) display, the led display is more power-saving, has a better contrast performance, and can be visible in the sun. In addition, since the light emitting diode display uses inorganic materials, it has better reliability and longer service life than the organic light emitting diode display.
In an led display, micro leds with a reduced size to a micrometer scale are arranged in an array, different micro leds may use a first type semiconductor substrate layer as a common electrode, the first type semiconductor substrate layer is electrically connected to a corresponding electrode on a circuit substrate (such as a TFT display substrate), however, the semiconductor resistance is high, micro leds closer to the corresponding electrode have more electron-hole pairs than micro leds farther from the corresponding electrode, and because more electron-hole pairs are recombined (recombination), the light-emitting luminance of micro leds closer to the corresponding electrode is higher than that of micro leds farther from the corresponding electrode, so that the brightness of the micro led display is not uniform.
Disclosure of Invention
The invention provides a micro light-emitting diode display which has uniform brightness.
According to an embodiment of the present invention, a micro light emitting diode display is provided, which includes at least one first type semiconductor substrate layer, a plurality of semiconductor light emitting platforms and a conductive layer. The plurality of semiconductor light emitting platforms are dispersedly arranged on at least one first type semiconductor substrate layer, wherein the at least one first type semiconductor substrate layer is provided with a surface exposed by the semiconductor light emitting platforms. The conducting layer is configured on the surface of at least one first type semiconductor substrate layer and distributed with the semiconductor light-emitting platforms in a staggered mode, and the ratio of the contact area of the conducting layer and the surface to the area of the surface is larger than or equal to 0.2.
Based on the above, the micro light emitting diode display provided by the embodiment of the invention uses the conductive layer as a common electrode to contact with the at least one first type semiconductor substrate layer, and utilizes the characteristic that the resistance of the conductive layer is smaller than that of the at least one first type semiconductor substrate layer, so that different micro light emitting diodes are not in the condition of different numbers of pairs of electron holes due to different positions, and the problem of uneven brightness of the micro light emitting diode display is avoided.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1A shows a schematic plan view of a micro light-emitting diode display according to an embodiment of the present invention;
FIG. 1B shows a cross-sectional view of the micro light-emitting diode display of FIG. 1A along line I-I';
FIG. 2A shows a schematic plan view of a micro light-emitting diode display according to an embodiment of the present invention;
FIG. 2B shows a cross-sectional view of the micro light-emitting diode display of FIG. 2A along line II-II';
FIG. 3 illustrates a cross-sectional view of a micro light-emitting diode display according to one embodiment of the present invention;
FIG. 4 shows a cross-sectional view of a micro light-emitting diode display according to an embodiment of the invention.
The reference numbers illustrate:
100. 200, 300, 400, micro light-emitting diode display;
101. a first type semiconductor substrate layer 201;
201T is a light-emitting surface;
101S, 201S, a first type semiconductor substrate layer surface;
102, a semiconductor light emitting platform;
102T, top surface of semiconductor light emitting platform;
1021, active layer;
1022 a first-type semiconductor layer;
1023 the second type semiconductor layer;
103. 203, 603, a conductive layer;
104, an electrode layer;
1051. 2051, 6051 first bonding metal layer;
1052. 2052, 6052 second bonding metal layer;
106 a circuit substrate;
1061: a third bonding metal layer;
1062, a fourth bonding metal layer;
107. 207, 607 an insulating layer;
109. 609, a reflecting layer;
204. 604 semiconductor raised portion;
2051E and 6051E are epitaxial sections;
308, filling layer;
distance A1, A2, B2, C2, F2, A3, B3, D3, F3, DD 1;
b1, W1, W2 width;
thickness of C1, E1, D2, E2, C3, E3, G3, H3;
d1 height.
Detailed Description
Referring to fig. 1A and 1B, fig. 1A shows a schematic plan view of a micro light emitting diode display 100 according to an embodiment of the present invention, and fig. 1B shows a cross-sectional view of the micro light emitting diode display 100 of fig. 1A along line I-I'. The micro light emitting diode display 100 includes a first type semiconductor base layer 101, a plurality of semiconductor light emitting platforms 102, and a conductive layer 103. The plurality of semiconductor light emitting platforms 102 are disposed on the first type semiconductor base layer 101 in a distributed manner, wherein the first type semiconductor base layer 101 has a surface 101S exposed by the plurality of semiconductor light emitting platforms 102. The conductive layer 103 is disposed on the surface 101S of the first type semiconductor substrate layer 101 and is distributed in a staggered manner with the semiconductor light emitting platforms 102, and the ratio of the contact area between the conductive layer 103 and the surface 101S to the area of the surface 101S is greater than or equal to 0.2.
Each of the semiconductor light emitting platforms 102 includes an active layer 1021 (or called light emitting layer 1021), a first type semiconductor layer 1022 and a second type semiconductor layer 1023. The first type semiconductor layer 1022 is located between the second type semiconductor layer 1023 and the first type semiconductor substrate layer 101. The active layer 1021 is between the first-type semiconductor layer 1022 and the second-type semiconductor layer 1023. The first type semiconductor layer 1022 has the same electrical property as the first type semiconductor base layer 101. The second-type semiconductor layer 1023 has an electrical property opposite to that of the first-type semiconductor substrate layer 101.
According to an embodiment of the invention, the first-type semiconductor substrate layer 101 is an N-type semiconductor, the first-type semiconductor layer 1022 is an N-type semiconductor, the second-type semiconductor layer 1023 is a P-type semiconductor, and the active layer 1021 is, for example, a Multiple Quantum Well (MQW), but the invention is not limited thereto. In another embodiment of the present invention, the first type semiconductor substrate layer 101 is a P-type semiconductor, the first type semiconductor layer 1022 is a P-type semiconductor, and the second type semiconductor layer 1023 is an N-type semiconductor.
In the embodiment shown in fig. 1A and 1B, the micro led display 100 further includes an electrode layer 104, a first bonding metal layer 1051, a second bonding metal layer 1052, a circuit substrate 106, a third bonding metal layer 1061, and a plurality of fourth bonding metal layers 1062. The circuit substrate 106 may be, for example, a Complementary Metal-Oxide-Semiconductor (CMOS) substrate, a Liquid Crystal On Silicon (LCOS) substrate, a Thin Film Transistor (TFT) substrate, or other substrate with an operating circuit, which is not limited herein.
The micro led display 100 further includes a reflective layer 109, wherein the reflective layer 109 is disposed on a side surface of the active layer 1021 and a side surface of the second type semiconductor layer 1023 to reflect light generated by the active layer 1021, so as to increase light-emitting efficiency of the micro led display 100.
The micro led display 100 further includes an insulating layer 107, wherein the insulating layer 107 is disposed between the side surface of the active layer 1021 and the reflective layer 109 to insulate the two. The insulating layer 107 is further disposed between the side surface of the second type semiconductor layer 1023 and the reflective layer 109 to insulate the two. The insulating layer 107 is further disposed between the conductive layer 103 and the reflective layer 109 to insulate the two. According to an embodiment of the present invention, the material of the insulating layer 107 includes, for example, aluminum nitride or silicon dioxide, or the insulating layer 107 may be a Distributed Bragg Reflector (DBR), but the present invention is not limited thereto.
It should be noted that, in fig. 1B, the reflective layer 109 is further disposed on the top surface 102T of each semiconductor light emitting platform 102 and between the second type semiconductor layer 1023 and the second bonding metal layer 1052, wherein the reflective layer 109 comprises metal, which can increase the forward light emission. According to an embodiment of the present invention, the material of the reflective layer 109 includes aluminum, titanium, silver, chromium, or a combination thereof, but the present invention is not limited thereto. The second-type semiconductor layer 1023, the reflective layer 109 and the second bonding metal layer 1052 are electrically connected, but the invention is not limited thereto. In an embodiment of the present invention, the metal-containing reflective layer 109 is not disposed between the second-type semiconductor layer 1023 and the second bonding metal layer 1052, and the second-type semiconductor layer 1023 directly contacts and electrically connects to the second bonding metal layer 1052. In another embodiment of the present invention, the reflective layer 109 does not include metal and is not disposed between the second-type semiconductor layer 1023 and the second bonding metal layer 1052.
Referring to fig. 1A and 1B, the third bonding metal layer 1061 electrically connects the first bonding metal layer 1051 and the electrode layer 104 to the circuit substrate 106. The fourth bonding metal layers 1062 electrically connect the second bonding metal layers 1052 to the circuit substrate 106. When a voltage is applied to the third bonding metal layer 1061 and the fourth bonding metal layer 1062 by the circuit substrate 106, a current generated by a potential difference between the third bonding metal layer 1061 and the fourth bonding metal layer 1062 enables the semiconductor light emitting platform 102 to emit a (visible) light beam.
Specifically, when a voltage is applied to the third bonding metal layer 1061 and the fourth bonding metal layer 1062 by the circuit substrate 106, a potential difference is generated between the first-type semiconductor layer 1022 and the second-type semiconductor layer 1023 of the semiconductor light emitting platform 102, so that electron-hole pairs (electron-hole pairs) are recombined in the active layer 1021 to generate light. The light generated by the active layer 1021 is reflected by the reflective layer 109 to increase the light extraction efficiency of the micro led display 100. More specifically, control may be provided by active components of the circuit substrate 106, such as: different voltages are applied to the fourth bonding metal layers 1062 corresponding to different semiconductor light-emitting platforms 102, so that different semiconductor light-emitting platforms 102 emit light beams with different intensities due to different potential differences, thereby displaying image information on the image frame of the micro light-emitting diode display 100.
Note that, as described above, the conductive layer 103 is disposed on the surface 101S of the first-type semiconductor base layer 101, and the ratio of the area of the conductive layer 103 in contact with the surface 101S to the area of the surface 101S is 0.2 or more. When the ratio is less than 0.2, the conduction efficiency is insufficient. Preferably, a ratio of 0.5 or more may have a better efficiency. The conductive layer 103 has a lower resistance value than when only the first type semiconductor base layer 101 is used as the common electrode. The current (or electron current) from the circuit substrate 106 passing through the third bonding metal layer 1061, the first bonding metal layer 1051 and the electrode layer 104 passes through the conductive layer 103 as a common electrode, enabling the plurality of semiconductor light emitting platforms 102 of the micro light emitting diode display 100 to emit light at the active layer 1021.
In contrast, in the related art, the first-type semiconductor base layer 101 is used as the common electrode without the conductive layer 103. Since the resistance of the first type semiconductor substrate layer 101 is higher, when the same voltage is applied to the fourth bonding metal layers 1062 corresponding to different semiconductor light emitting platforms 102, fewer electron-hole pairs are recombined in the semiconductor light emitting platforms 102 far from the third bonding metal layer 1061 compared to the semiconductor light emitting platforms 102 near the third bonding metal layer 1061, and the light emitting brightness of the semiconductor light emitting platforms 102 is lower, which causes the overall brightness of the micro light emitting diode display 100 to be uneven.
According to the micro led display 100 of the embodiment of the invention, by using the characteristic that the resistance of the conductive layer 103 is smaller than that of the first type semiconductor substrate layer 101, when the same voltage is applied to the fourth bonding metal layer 1062 corresponding to different semiconductor light emitting platforms 102, the semiconductor light emitting platforms 102 far away from the third bonding metal layer 1061 or the semiconductor light emitting platforms 102 closer to the third bonding metal layer 1061 have the same number of electron-hole pairs, thereby preventing the micro led display 100 from generating uneven brightness.
According to an embodiment of the invention, the thickness of the first type semiconductor layer 1022 is smaller than that of the first type semiconductor base layer 101 to reduce the impedance, but the invention is not limited thereto.
According to an embodiment of the present invention, the material of the conductive layer 103 includes chromium, platinum, gold, aluminum, titanium, silicon, silver, graphene, metal oxide such as indium tin oxide, zinc oxide, indium zinc oxide, or a combination thereof, but the present invention is not limited thereto.
Referring to fig. 1A and 1B as well, in the micro light emitting diode display 100, the distance a1 is provided between the different semiconductor light emitting platforms 102, the conductive layer 103 disposed between the different semiconductor light emitting platforms 102 has a width B1 and a thickness C1, each semiconductor light emitting platform 102 has a height D1, and the reflective layer 109 has a thickness E1. According to some embodiments of the present invention, the distance a1 between different semiconductor light emitting platforms 102 is less than 20 microns. According to some embodiments of the present invention, the width B1 of the conductive layer 103 is greater than 0.05 micrometers and less than or equal to 10 micrometers, so as to avoid poor conduction due to too small width of the conductive layer 103. According to some embodiments of the present invention, the height D1 of each semiconductor light emitting platform 102 is greater than the thickness C1 of the conductive layer 103, and the thickness C1 of the conductive layer 103 is greater than 0.01 micrometers and less than or equal to 5 micrometers, so as to avoid poor conduction due to too small thickness of the conductive layer 103. According to some embodiments of the present invention, the height D1 of each semiconductor light emitting mesa 102 is greater than the thickness C1 of the conductive layer 103, and the height D1 of each semiconductor light emitting mesa 102 is less than 5 microns. According to some embodiments of the present invention, the thickness E1 of the reflective layer 109 is less than half the distance a1 between different semiconductor light emitting platforms 102 and greater than 0.01 microns.
It should be noted that the following embodiments follow the reference numerals and parts of the contents of the foregoing embodiments, wherein the same reference numerals are used to indicate the same or similar components, and the description of the same technical contents is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.
Referring to fig. 2A and 2B, fig. 2A is a schematic plan view of a micro light emitting diode display 200 according to an embodiment of the present invention, and fig. 2B is a cross-sectional view of the micro light emitting diode display 200 along line II-II'. The micro light emitting diode display 200 includes a plurality of first type semiconductor base layers 201, a plurality of semiconductor light emitting platforms 102, and a conductive layer 203. The plurality of semiconductor light emitting platforms 102 are disposed on the first type semiconductor base layer 201 in a distributed manner, wherein the plurality of first type semiconductor base layers 201 have surfaces 201S exposed by the plurality of semiconductor light emitting platforms 102. The conductive layer 203 is disposed on the surface 201S of the first type semiconductor substrate layer 201 and is distributed in a staggered manner with the semiconductor light emitting platforms 102, and the ratio of the contact area between the conductive layer 203 and the surface 201S to the area of the surface 201S is greater than or equal to 0.2.
In the present embodiment, there are 4 semiconductor light emitting platforms 102 arranged in a2 × 2 matrix on each of the first type semiconductor base layers 201, but the present invention is not limited thereto. In some embodiments, there are 8 semiconductor light emitting platforms 102 arranged in a 4 × 2 matrix on each first type semiconductor base layer 201. In other embodiments of the present invention, each of the first type semiconductor base layers 201 has m × n semiconductor light emitting platforms 102 arranged in an m × n matrix, where m and n are positive integers. For illustrative purposes, in the following description, the plurality of semiconductor light emitting platforms 102 on the same first type semiconductor base layer 201 are collectively referred to as a semiconductor light emitting platform group. In the embodiment shown in fig. 2A and 2B, each semiconductor light emitting mesa group includes 4 semiconductor light emitting mesas 102.
The conductive layer 203 is also electrically connected between the different first type semiconductor substrate layers 201 to form ohmic contact for conducting current. Specifically, compared to the first-type semiconductor base layer 101 in the embodiment shown in fig. 1A and 1B, the micro light emitting diode display 200 of the present embodiment includes a plurality of discrete first-type semiconductor base layers 201, and the plurality of discrete first-type semiconductor base layers 201 are electrically connected to each other by the conductive layer 203. When considering that a sufficient contact area is required between the conductive layer 203 and the first-type semiconductor base layer 201 between the discrete first-type semiconductor base layers 201, the distance C2 between the conductive layer 203 and the light emitting surface 201T of the first-type semiconductor base layer 201 in the normal direction of the light emitting surface 201T may not be too large. When considering process yield, the distance C2 may not be too small. According to an embodiment of the present invention, the distance C2 is greater than 0.01 micrometers and less than or equal to 5 micrometers, but the present invention is not limited thereto.
The conductive layer 203 disposed between the different first type semiconductor base layers 201 may also be used to reflect light emitted from the semiconductor light emitting platform 102. In other words, the conductive layer 203 disposed between the different first type semiconductor substrate layers 201 can also be used as a reflector, which reduces the mutual influence between the lights emitted by the semiconductor light emitting platforms 102 on the different first type semiconductor substrate layers 201, avoids the cross talk (crosstalk) condition, and improves the light emitting brightness and contrast of each semiconductor light emitting platform group. Specifically, the conductive layer 203 is disposed on a side surface of the first type semiconductor substrate layer 201 of each semiconductor light emitting platform group, and is electrically connected to the side surface of the first type semiconductor substrate layer 201 to increase a contact area and light emitting efficiency.
The micro led display 200 further comprises an insulating layer 207 disposed on the side surface and a portion of the top surface of the semiconductor light emitting platform 102, and exposing a portion of the top surface of the semiconductor light emitting platform 102 for bonding with the second bonding metal layer 2052.
The micro led display 200 further includes a semiconductor pad-up portion 204 and a first bonding metal layer 2051 disposed on the semiconductor pad-up portion 204, the semiconductor pad-up portion 204 is disposed on the first type semiconductor base layer 201, and specifically, the semiconductor pad-up portion 204 can be manufactured by a process of manufacturing the semiconductor light emitting platform 102 and has a similar structure to the semiconductor light emitting platform 102. In the present embodiment, the semiconductor light emitting platform 102 may be fabricated by, for example, an etching process, and the semiconductor raised portion 204 may be etched as well. The semiconductor raised portion 204 may have a similar structure as the semiconductor light emitting mesa 102, such as a first type semiconductor layer, an active layer, and a second type semiconductor layer.
Referring to fig. 2A and 2B, the third bonding metal layer 1061 electrically connects the first bonding metal layer 2051 and the semiconductor pad-up portion 204 to the circuit substrate 106. The fourth bonding metal layers 1062 electrically connect the second bonding metal layers 2052 to the circuit substrate 106. When a voltage is applied to the third bonding metal layer 1061 and the fourth bonding metal layer 1062 by the circuit substrate 106, a current generated by a potential difference between the third bonding metal layer 1061 and the fourth bonding metal layer 1062 enables the semiconductor light emitting platform 102 to emit a (visible) light beam.
It should be noted that, in the present embodiment, the first bonding metal layer 2051 includes an epitaxial segment 2051E that extends to the conductive layer 203 via the side surface of the semiconductor pad height portion 204. Since the first bonding metal layer 2051 is electrically bonded to the conductive layer 203 through the extension segment 2051E thereof, when a voltage is applied to the third bonding metal layer 1061 by the circuit substrate 106, a current (or an electron current) will flow from the circuit substrate 106 through the third bonding metal layer 1061 and the first bonding metal layer 2051 to the conductive layer 203, and further to the plurality of discrete first-type semiconductor base layers 201, and will not flow through the semiconductor height part 204, because the resistance value of the first bonding metal layer 2051 is smaller than that of the semiconductor height part 204. In another aspect, when a voltage is applied to the third bonding metal layer 1061 through the circuit board 106, and the voltage applied to the semiconductor pad-up portion 204 is a reverse bias, the active layer of the semiconductor pad-up portion 204 does not generate recombination (recombination) of electrons and holes, and thus does not emit light. The semiconductor pad-up portion 204 is a dummy semiconductor layer.
In the micro light emitting diode display 200, the minimum distance a2 and the maximum distance B2 are provided between the different first type semiconductor base layers 201, the conductive layer 203 has a thickness D2, the first type semiconductor base layer 201 has a thickness E2, and the distance between the light emitting surface 201T of the first type semiconductor base layer 201 and the top surface of the corresponding semiconductor light emitting platform in the normal direction of the light emitting surface 201T is F2. According to some embodiments of the present invention, the minimum distance a2 between the different first type semiconductor base layers 201 is greater than 0.01 micron. According to some embodiments of the present invention, the maximum distance B2 between the different first type semiconductor base layers 201 is less than 10 microns. According to some embodiments of the present invention, the maximum distance B2 between the different first type semiconductor base layers 201 is greater than the thickness D2 of the conductive layer 203, and the thickness D2 of the conductive layer 203 is greater than 0.01 micrometers. According to some embodiments of the present invention, the thickness E2 of the first type semiconductor base layer 201 is greater than 0.01 micron. According to some embodiments of the present invention, a distance F2 between the light emitting surface 201T of the first type semiconductor substrate layer 201 and the top surface of the corresponding semiconductor light emitting platform in the normal direction of the light emitting surface 201T is greater than 2 microns and less than 10 microns.
Referring to FIG. 3, a cross-sectional view of a micro light emitting diode display 300 is shown, according to one embodiment of the present invention. Compared to the micro led display 200, the micro led display 300 further includes a filling layer 308 disposed between the light emitting surface 201T and the conductive layer 203. Because each group of semiconductor light emitting platforms is connected only by the conductive layer 203, the filling layer 308 is added to increase the structural stability between each group of semiconductor light emitting platforms. According to an embodiment of the present invention, the filling layer 308 is an insulating layer, and the material thereof includes organic polymer. According to another embodiment of the present invention, the filling layer 308 comprises a conductive material, which may have a resistivity less than that of the conductive layer 203, and may also act as a common electrode effect to increase conductivity.
In the micro light emitting diode display 300, the minimum distance a3 and the maximum distance B3 are provided between the different first type semiconductor base layers 201, the filling layer 308 has a thickness C3, the distance D3 is provided between the top surface of the conductive layer 203 and the light emitting surface 201T of the first type semiconductor base layer 201, the first type semiconductor base layer 201 has a thickness E3, and the distance between the light emitting surface 201T of the first type semiconductor base layer 201 and the top surface of the corresponding semiconductor light emitting platform in the normal direction of the light emitting surface 201T is F3. The second bond metal layer 2052 has a thickness G3. Fourth bonding metal layer 1062 has a thickness H3. According to some embodiments of the present invention, the minimum distance a3 between the different first type semiconductor base layers 201 is greater than 0.01 micron. According to some embodiments of the present invention, the maximum distance B3 between the different first type semiconductor base layers 201 is less than 10 microns. According to some embodiments of the invention, the thickness C3 of the fill layer 308 is greater than 0.01 microns and less than 4 microns. According to some embodiments of the present invention, the thickness E3 of the first type semiconductor base layer 201 is greater than 0.01 micron. According to some embodiments of the present invention, a distance F3 between the light emitting surface 201T of the first type semiconductor substrate layer 201 and the top surface of the corresponding semiconductor light emitting platform in the normal direction of the light emitting surface 201T is greater than 2 microns and less than 10 microns. According to some embodiments of the invention, the thickness G3 of the second bond metal layer 2052 is greater than 0.1 microns and less than 5 microns. According to some embodiments of the invention, thickness H3 of fourth bonding metal layer 1062 is greater than 0.1 microns and less than 5 microns.
Referring to FIG. 4, a cross-sectional view of a micro light emitting diode display 400 is shown, according to one embodiment of the present invention. The micro led display 400 includes a first type semiconductor base layer 101, a plurality of semiconductor light emitting platforms 102, a semiconductor pad-up 604, a first bonding metal layer 6051, a plurality of second bonding metal layers 6052, a circuit board 106, a third bonding metal layer 1061, a plurality of fourth bonding metal layers 1062, and a conductive layer 603.
The resistance of the conductive layer 603 is smaller than that of the semiconductor pad portion 604. The top surface 102T of each semiconductor light emitting mesa 102 is coplanar with the top surface 604T of the semiconductor raised portion 604. In some embodiments of the present invention, the semiconductor raised portion 604 may be fabricated in the same process as each of the semiconductor light emitting platforms 102 and have a similar structure.
The epitaxial segment 6051E of the first bonding metal layer 6051 is electrically bonded to the first-type semiconductor base layer 101 through the conductive layer 603. The material of the conductive layer 603 includes chromium, platinum, gold, aluminum, titanium, silicon, silver, a transparent conductive film such as indium tin oxide, or a combination thereof, but the invention is not limited thereto.
In an embodiment of the invention, the minimum distance between the semiconductor bump 604 and the nearest semiconductor light emitting platform 102 in the direction is D1, the extension 6051E of the first bonding metal layer 6051 has a width W1 in the direction, and the conductive layer 603 has a width W2 in the direction, wherein the width W1 of the extension 6051E is less than the width W2 of the conductive layer 603, the width W2 of the conductive layer 603 is less than the minimum distance DD1 between the semiconductor bump 604 and the nearest semiconductor light emitting platform 102, the width W1 of the extension 6051E is greater than 0.1 micrometer, and the minimum distance DD1 between the semiconductor bump 604 and the nearest semiconductor light emitting platform 102 is less than 5 millimeters, but the invention is not limited thereto.
In the embodiment shown in FIG. 4, the micro LED display 400 further comprises an insulating layer 607 and a plurality of reflective metal layers 609. The reflective metal layers 609 are disposed on the side surfaces of the semiconductor light emitting platforms 102, respectively, and each reflective metal layer 609 is configured to reflect the light beam emitted from the light emitting layer 1021 of the corresponding semiconductor light emitting platform 102, so as to increase the light emitting amount of the display surface of the micro light emitting diode display 400 and avoid the light beam emitted from the light emitting layer 1021 of different semiconductor light emitting platforms 102 from generating the mixed light crosstalk. The insulating layer 607 is disposed between each reflective metal layer 609 and the corresponding semiconductor light emitting platform 102 to insulate the reflective metal layer 609 from the semiconductor light emitting platform 102, thereby preventing the reflective metal layer 609 from short-circuiting with the semiconductor light emitting platform 102. The material of the reflective metal layer 609 may include conductive materials such as aluminum, titanium, silver, chromium, etc., but the invention is not limited thereto.
In summary, the micro light emitting diode display provided by the embodiments of the invention uses the conductive layer contacting the first type semiconductor substrate layer as the common electrode, and uses the characteristic that the resistance of the conductive layer is smaller than that of the first type semiconductor substrate layer, so that the number of pairs of electron holes of different micro light emitting diodes is not consistent due to different positions, thereby avoiding the problem of non-uniform brightness of the micro light emitting diode display.

Claims (15)

1. A micro light emitting diode display, comprising:
at least one first type semiconductor substrate layer;
a plurality of semiconductor light emitting platforms dispersedly disposed on the at least one first type semiconductor base layer, wherein the at least one first type semiconductor base layer has a surface exposed by the plurality of semiconductor light emitting platforms; and
and the conducting layer is configured on the surface of the at least one first type semiconductor substrate layer and is distributed with the plurality of semiconductor light-emitting platforms in a staggered mode, and the ratio of the contact area of the conducting layer and the surface to the area of the surface is more than or equal to 0.2.
2. The micro light-emitting diode display defined in claim 1 wherein each semiconductor light-emitting platform comprises:
a first type semiconductor layer;
a second type semiconductor layer, wherein the first type semiconductor layer is located between the second type semiconductor layer and the at least one first type semiconductor substrate layer; and
and the active layer is positioned between the first type semiconductor layer and the second type semiconductor layer.
3. The micro light-emitting diode display defined in claim 2 wherein the thickness of the at least one first-type semiconductor base layer is greater than the thickness of the first-type semiconductor layer.
4. The micro light-emitting diode display defined in claim 2 further comprising a reflective layer disposed on a side of the active layer and a side of the second type semiconductor layer and an insulating layer disposed between the side of the active layer and the side of the second type semiconductor layer and the reflective layer.
5. The micro light-emitting diode display defined in claim 4 wherein the insulating layer is also disposed between the conductive layer and the reflective layer.
6. The micro light-emitting diode display defined in claim 4 wherein the reflective layer comprises metal and is also disposed on a first top surface of each semiconductor light-emitting platform facing away from the at least one first-type semiconductor base layer.
7. The micro light-emitting diode display defined in claim 1 wherein the conductive layer is further electrically connected between two of the at least one first-type semiconductor base layers.
8. The micro light-emitting diode display defined in claim 7 wherein the distance between the conductive layer and the light-emitting surface of the at least one first-type semiconductor substrate layer in the direction normal to the light-emitting surface is greater than 0.01 micrometers and less than or equal to 5 micrometers.
9. The micro light-emitting diode display defined in claim 8 further comprising a filling layer disposed between the light-emitting surface and the conductive layer.
10. The micro light-emitting diode display defined in claim 8 further comprising a fill layer that is an insulating material.
11. The miniature light-emitting diode display defined in claim 8 further comprising a fill layer, the fill layer being a conductive material and the fill layer having a resistance less than the resistance of the conductive layer.
12. The micro light-emitting diode display defined in claim 1 wherein the thickness of the conductive layer is greater than 0.01 microns and less than or equal to 5 microns.
13. The micro light-emitting diode display defined in claim 1 wherein the width of the conductive layer in the regions between the plurality of semiconductor light-emitting platforms is greater than 0.05 microns and 10 microns or less.
14. The micro light-emitting diode display defined in claim 1 further comprising:
the pad height part is configured on the at least one first type semiconductor substrate layer, wherein a first top surface of the pad height part, which is back to the at least one first type semiconductor substrate layer, and a second top surface of each semiconductor light-emitting platform, which is back to the at least one first type semiconductor substrate layer, are coplanar;
a first bonding metal layer disposed on the first top surface; and
the second bonding metal layers are respectively arranged on the second top surfaces.
15. The micro light-emitting diode display defined in claim 14 wherein the resistance of the conductive layer is less than the resistance of the raised portion.
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