CN112259525A - 半导体装置和制造半导体装置的方法 - Google Patents
半导体装置和制造半导体装置的方法 Download PDFInfo
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- CN112259525A CN112259525A CN202010632085.0A CN202010632085A CN112259525A CN 112259525 A CN112259525 A CN 112259525A CN 202010632085 A CN202010632085 A CN 202010632085A CN 112259525 A CN112259525 A CN 112259525A
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- 238000000034 method Methods 0.000 title claims abstract description 41
- 238000004519 manufacturing process Methods 0.000 title abstract description 11
- 239000000758 substrate Substances 0.000 claims description 64
- 239000008393 encapsulating agent Substances 0.000 claims description 47
- 238000005538 encapsulation Methods 0.000 claims description 28
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- 239000010931 gold Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 3
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- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 238000007743 anodising Methods 0.000 description 1
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- 229910052718 tin Inorganic materials 0.000 description 1
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- 229910052725 zinc Inorganic materials 0.000 description 1
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Abstract
半导体装置和制造半导体装置的方法。在一个实例中,一种半导体装置结构涉及电子装置,所述电子装置包含装置顶部表面、与所述装置顶部表面相对的装置底部表面、在所述装置顶部表面与所述装置底部表面之间延伸的装置侧表面,以及安置于所述装置顶部表面上的衬垫。互连件连接到所述衬垫,且所述互连件包括:各自在向上方向上从相应衬垫延伸的第一区,以及各自连接到相应第一区的第二区,其中每一第二区在横向方向上从所述相应第一区延伸。所述互连件包括所述衬垫上的再分布图案。本文中也公开其它实例和相关方法。
Description
技术领域
本公开大体上涉及电子装置,且更明确地说涉及半导体装置和制造半导体装置的方法。
背景技术
现有的半导体封装和形成半导体封装的方法是不适当的,例如,导致成本过量、可靠性降低、性能相对低或封装大小过大。通过比较此类方法与本公开并参考图式,所属领域的技术人员将显而易见常规和传统方法的其它限制和缺点。
发明内容
本发明描述除了其它特征外还包含一种封装式电子装置结构和包括附接到电子装置的互连件的相关方法。所述互连件包含在向上方向上从电子装置延伸的第一区以及连接到第一区的第二区。第二区在横向方向上从第一区延伸。在一些实例中,电子装置和互连件的部分覆盖有囊封物。在一些实例中,互连件的其它部分从囊封物暴露。除了其它以外,所述结构和方法为电子装置提供更有成本效益的再分布模式,其使用简化的过程流程,提供较好的形状因子再分布,且提供较快的电路径。
更确切地说,在一个实例中,一种封装式电子装置结构包含电子装置,所述电子装置具有装置顶部表面、与装置顶部表面相对的装置底部表面,以及在装置顶部表面与装置底部表面之间延伸的装置侧表面。互连件连接到装置顶部表面且包含在向上方向上从装置顶部表面延伸的第一区以及连接到第一区的第二区,其中第二区在横向方向上从第一区延伸。囊封物覆盖装置顶部表面、装置侧表面和第一区的外围,其中第二区的第一部分从囊封物的第一表面暴露,第二区的第二部分从囊封物的第二表面暴露,且囊封物覆盖第二区的第三部分。在一些实例中,所述电子装置包括有源或无源装置。在其它实例中,所述电子装置包括半导体装置。在一些实例中,第一区和第二区是作为随后经单分引线框结构的部分提供的整合式结构。在一些实例中,第二区橫向延伸超出电子装置的周界。在所述封装式电子装置结构中,横向方向基本上平行于装置顶部表面;且第二部分延伸以与装置侧表面重叠以便延伸到电子装置的周界外部。在所述封装式电子装置结构中,第一部分直接连接到电子装置的衬垫;且向上方向基本上垂直于装置顶部表面。在所述封装式电子装置结构中,装置底部表面从囊封物的第三表面暴露;且第三表面与第一表面相对。在所述封装式电子装置结构中,第一表面包括囊封物的顶部表面;且顶部表面与第二区的第一部分基本上共面。在所述封装式电子装置结构中,第二区的第二部分包括末端部分;第二表面包括囊封物的侧表面;且侧表面与末端部分基本上共面。
在另一实例中,一种半导体装置结构包含电子装置,所述电子装置具有装置顶部表面、与装置顶部表面相对的装置底部表面、在装置顶部表面与装置底部表面之间延伸的装置侧表面,以及安置于装置顶部表面上的衬垫。互连件连接到衬垫,且互连件包含各自在向上方向上从相应衬垫延伸的第一区以及各自连接到相应第一区的第二区,其中每一第二区在横向方向上从相应第一区延伸。互连件包括衬垫上的再分布图案。所述半导体装置结构还包括:囊封物,其覆盖装置顶部表面、装置侧表面和第一区的外围,其中:第二区的第一部分从囊封物的第一表面暴露;第二区的第二部分从囊封物的第二表面暴露;且第二区的第三部分被囊封物覆盖。在所述半导体装置结构中,装置底部表面从囊封物的第三表面暴露;且第三表面与第一表面相对。在所述半导体装置结构中,第一表面包括囊封物的顶部表面;且顶部表面与第二区的第一部分基本上共面。在所述半导体装置结构中,第二区的第二部分包括末端部分;第二表面包括囊封物的侧表面;且侧表面与末端部分基本上共面。在所述半导体装置结构中,横向方向基本上平行于装置顶部表面;且第二部分延伸以与装置侧表面重叠以便延伸到电子装置的周界外部。在所述半导体装置结构中,向上方向基本上垂直于装置顶部表面。在所述半导体装置结构中,每一第二部分与相应第一部分整合。
在另一个实例中,一种用于制作半导体装置的方法包含提供衬底,所述衬底包括作为衬底的部分形成的多个电子装置。所述方法包含将互连件附接到电子装置上的衬垫,其中每一互连件横跨于相邻电子装置之间,其中每一互连件具有耦合到相应相邻电子装置的相应衬垫且在向上方向上延伸的第一区,以及在横向方向上将第一区彼此连接的第二区结构。所述方法包含单分所述衬底和所述多个互连件以将每一第二区分离为第二区且将衬底分离为个别电子装置。所述方法还包括:在多个电子装置之间形成从衬底的第一表面部分地向内延伸的凹槽;在衬底的第一表面上和凹槽内提供囊封物,使得囊封物填充互连件中的每一个之间的部分且填充互连件中的每一个与衬底的第一表面之间的部分;以及从衬底的与第一表面相对的第二表面移除衬底的一部分以从第二表面暴露囊封物。在所述方法中,形成凹槽发生在耦合互连件之前;且单分发生在移除衬底的部分之后。在所述方法中,在单分步骤之后囊封物的部分保留在电子装置的侧表面上。在所述方法中,提供囊封物包括以囊封物覆盖每一第二区结构的第一侧面,同时使每一第二区结构的第二侧从囊封物暴露。在所述方法中,耦合互连件包括耦合作为引线框提供的互连件。
其它实例包含于本公开中。在诸图、权利要求书和/或本公开的描述中可以找到此类实例。
附图说明
图1示出实例半导体装置的横截面图。
图2示出实例半导体装置的平面图。
图3示出实例半导体装置的仰视图。
图4A、图4B、图4C、图4D、图4E、图4F和图4G示出用于制造实例半导体装置的实例方法的横截面图。
图5示出实例半导体装置的横截面图。
图6示出实例半导体装置的平面图。
图7A、图7B、图7C和图7D示出用于制造实例半导体装置的实例方法的横截面图。
具体实施方式
以下论述提供半导体装置和制造半导体装置的方法的各种实例。此类实例是非限制性的,且所附权利要求书的范围不应限于公开的特定实例。在下文论述中,术语“实例”和“例如”是非限制性的。
诸图说明一般构造方式,且可能省略熟知特征和技术的描述和细节以免不必要地混淆本公开。另外,图式中的元件未必按比例绘制。例如,诸图中的一些元件的尺寸可能相对于其它元件放大,以有助于改进对本公开中论述的实例的理解。不同诸图中的相同附图标记表示相同元件。
术语“或”表示由“或”连接的列表中的项目中的任何一个或多个项目。作为实例,“x或y”表示三元素集合{(x),(y),(x,y)}中的任何元素。作为另一实例,“x、y或z”表示七元素集合{(x),(y),(z),(x,y),(x,z),(y,z),(x,y,z)}中的任一元素。
术语“包括”、“包含”为“开放”术语,并且指定所陈述特征的存在,但并不排除一个或多个其它特征的存在或添加。
在本文中可以使用术语“第一”、“第二”等来描述各种元件,并且这些元件不应受这些术语的限制。这些术语仅用于将一个元件与另一元件区分开来。因此,例如,在不脱离本公开的教示的情况下,可以将本公开中论述的第一元件称为第二元件。
除非另外指定,否则术语“耦合”可以用于描述彼此直接接触的两个元件或描述由一个或多个其它元件间接连接的两个元件。例如,如果元件A耦合到元件B,则元件A可直接接触元件B或由插入元件C间接连接到元件B。类似地,术语“在……之上”或“在……上”可以用于描述彼此直接接触的两个元件或描述通过一个或多个其它元件间接连接的两个元件。应进一步理解,下文说明和描述的实例可以适当地具有实例和/或可以在不存在本文未具体公开的任何要素的情况下实践。
图1示出实例半导体装置的横截面图,图2示出实例半导体装置的平面图,且图3示出实例半导体装置的仰视图。
参考图1到3,实例半导体装置100可包括电子装置110、互连件120和囊封物130。
电子装置110可为半导体裸片、半导体组件、光学装置、传感器装置或所属领域的技术人员已知的其它有源或无源装置。电子装置110可包括基本上平坦的装置顶部表面110a或第一表面110a、与第一表面110a相对且基本上平坦的装置底部表面110b或第二表面110b,以及在第一表面110a与第二表面110b之间延伸的装置侧表面110c或第三表面110c。向/从电子装置110输入/输出电信号所通过的衬垫111以及覆盖衬垫111的外围的电介质112可提供于电子装置110的第一表面110a上。
衬垫111可包含位于电子装置110的第一表面110a上且彼此间隔开的多个衬垫。衬垫111从电子装置110的第一表面110a暴露,且外部电信号可通过衬垫111向/从电子装置110输入/输出。衬垫111可称为结合衬垫或裸片衬垫,且可包含铜、金、银和铝中的任一种。
除了对应于衬垫111的任何部分之外,可提供电介质112以覆盖电子装置110的第一表面110a上的衬垫111的外围且可电绝缘电子装置110的第一表面110a。电介质112可称为非导电材料或钝化层。可提供电介质112具有与衬垫111相同的高度或稍微更大的高度。在一些实例中,电介质112可延伸以覆盖衬垫111的顶部衬垫表面的外围,而不覆盖顶部衬垫表面的接触部分。
电子装置110可通过耦合到衬垫111的各种互连件120电连接到半导体装置100外部。互连件120可包括或称为引线或作为重布结构或图案。在一些实例中,互连件120可以是引线框的部分。互连件120可包括例如铜、金、银或铝。互连件120中的每一个可包括连接到衬垫111的第一区121和从第一区121延伸的第二区122。第一区121可电耦合到衬垫111且可在例如竖直或向上的第一方向上从衬垫111突出。另外,在本公开的实例实施方案中,第一区121可在基本上垂直于衬垫111的第一方向上延伸。第二区122可在例如水平或横向的第二方向上从第一区121延伸。第二方向可不同于第一区121延伸的第一方向。在一个实例中,第二区122可在基本上垂直于第一区121的方向上延伸。互连件120还可被配置成延伸经过电子装置110的占据面积或区域达第二区122的延伸长度。因此,互连件120可用以执行电子装置110的衬垫111上的再分布。
互连件120可直接连接到电子装置110的衬垫111,从而缩短电路径。通过互连件120,电性图案可形成于任何位置而不限于电子装置110的衬垫111的位置。
可提供囊封物130以填充电子装置110与互连件120之间的间隙。由非导电材料制成的囊封物130可维持互连件120彼此绝缘。另外,囊封物130可囊封电子装置110的侧表面110c且囊封电子装置110的衬垫111和电介质112的一些区。囊封连接到衬垫111的互连件120中的每一个的第一区121的外围的囊封物130可维持衬垫111与互连件120之间的连接的结构完整性。囊封物130可包括或称为模制化合物或树脂,但这不是本公开的限制。
囊封物130的第一表面130a可与每一互连件120的第二区122的顶部表面基本上共面,从而暴露第二区122。囊封物130的第三表面130c可与在第二方向上延伸的第二区122的末端部分基本上共面以暴露第二区122的末端部分。因此,互连件120的第二区122可从囊封物130暴露并且可随后连接到半导体装置100外部的电路或装置。囊封物130的第二表面130b可与电子装置110的第二表面110b平行,且在一些实例中可暴露电子装置110的第二表面110b。暴露的第二表面110b可改进从电子装置110的热辐射。在一些实例中,囊封物130的第一表面130a、第二表面130b和第三表面130c可分别称为囊封物130的顶部表面、底部表面和侧表面。
图4A到4G示出制造实例半导体装置的实例方法的横截面图。
参考图4A,根据本公开的用于制造半导体装置100的实例方法可包括提供衬底10。衬底10可被配置成使得连续布置多个电子装置。衬底10也可称为晶片、条带或平面。衬垫111和电介质112可提供于衬底10的第一表面110a上以便对应于每一电子装置的区。衬底10的第一表面110a可构成电子装置的第一表面。另外,电介质112可跨越衬底10的第一表面110a提供,同时填充衬垫111与相邻衬垫111之间的间隙。
参考图4B,凹槽11可在稍后阶段从衬底10的第一表面110a向内形成。可通过从衬底10的第一表面110a部分地锯切或蚀刻而形成凹槽11。衬底10的第一表面110a可划分成沿着凹槽11的区对应于相应电子装置的区。另外,凹槽11可执行用于稍后阶段的单分的划线的功能。
参考图4C,互连件120可提供于凹槽11周围。互连件120可在相邻电子装置之间将衬垫111彼此连接。详细地说,互连件120可包括在第一方向上耦合到相应衬垫111的多个第一区121以及在第二方向上将第一区121彼此连接的第二区122。互连件120的第一区121和第二区122可整合式地形成。举例来说,第一区121和第二区122可由相同工件或材料形成,且弯曲以提供所需形状作为引线框的部分。另外,互连件120可为将耦合到衬垫111的预制结构。在一些实例中,互连件120可形成为引线框或从引线框形成。互连件120可由铜、金、银或铝制成。
参考图4D,囊封物130可提供于衬底10的第一表面110a上。囊封物130可填充衬底10的第一表面110a上的凹槽11。另外,囊封物130可填充互连件120中的每一个之间的部分以及互连件120中的每一个与衬底10的第一表面110a之间的部分。囊封物130可具有与互连件120相同的高度以暴露互连件120。在一些实例中,囊封物130的初始囊封物高度可高于互连件120的高度,从而完全囊封互连件120,并且接着可例如通过研磨而减小初始囊封物高度以显露互连件120的顶部。
参考图4E,衬底10可从衬底10的与第一表面110a相对的第二表面110b移除达预定厚度。可通过研磨或抛光移除衬底10的第二表面110b。在一些情况下,衬底10的第二表面110b也可通过蚀刻来移除。衬底10的第二表面110b可为衬底10的底部表面。另外,第二表面110b的一些区的移除可包括移除第二表面110b到预定厚度以暴露凹槽11。因此,衬底10可划分成相应电子装置的区。另外,衬底10的第二表面110b可构成相应电子装置的第二表面。
参考图4F,可对衬底10执行单分或单分过程。可使用锯切执行单分。由于单分,个别电子装置110可与衬底10分离。另外,单分可沿着衬底10的凹槽11执行。单分宽度可小于凹槽11的宽度。因此,类似于图4G中示出的半导体装置100的配置,先前定位于现有凹槽11中的囊封物130可位于已经历单分的电子装置110的侧表面110c上。另外,由于电子装置110的侧表面110c不暴露于外部,因此囊封物130可保护电子装置110不受外部因素影响。如图4G中示出,第二区122与电子装置110的侧表面110c重叠以便延伸到电子装置110的周界外部。如图4G中还示出,第二区122的第一部分122a从囊封物130的第一表面130a暴露并且可与第一表面130a基本上共面。第二区122的例如末端部分的第二部分122b在囊封物130的另一表面130c中暴露并且可与表面130c基本上共面。第二区122的第三部分122c可被囊封物130覆盖。
根据本发明制造方法,可通过互连件120执行电子装置110的电连接,进而快速建立电路径且简化制造半导体装置100的总体过程。
图5示出实例半导体装置的横截面图。图6示出实例半导体装置的平面图。
参考图5和6,实例半导体装置200可包括电子装置110和互连件120。
电子装置110可包括基本上平坦的第一表面110a,与第一表面110a相对且基本上平坦的第二表面110b。向/从电子装置110输入/输出电信号所通过的衬垫111以及覆盖衬垫111的外围的电介质112可提供于电子装置110的第一表面110a上。
衬垫111可包含位于电子装置110的第一表面110a上且彼此间隔开的多个衬垫。衬垫111从电子装置110的第一表面110a暴露,且外部电信号可通过衬垫111向/从电子装置110输入/输出。衬垫111可称为结合衬垫或裸片衬垫,且可包含铜、金、银和铝中的任一种。
衬垫111可暴露,如附图中所示。当衬垫111由例如铜或银的材料制成时,还可在既定电连接到互连件120的衬垫111的部分上提供用于防止氧化的电镀。可使用例如镍、锌或锡来提供电镀。如果衬垫111实际上由例如铝的材料制成,那么除电连接到互连件120的部分外通过对衬垫111的剩余部分进行阳极氧化而自然地形成氧化物膜,进而执行绝缘功能。
可提供电介质112以覆盖电子装置110的第一表面110a上的衬垫111的外围且可电绝缘电子装置110的第一表面110a,不同之处在于对应于衬垫111的任何部分。电介质112可称为非导电材料或钝化层。电介质112可具有与衬垫111相同的高度或稍微更大的高度。在一些实例中,电介质112可延伸以覆盖衬垫111的顶部衬垫表面的外围,而不覆盖顶部衬垫表面的接触部分。
互连件120可耦合到电子装置110的衬垫111。互连件120可包括或称为引线或作为重布结构或图案。在一些实例中,互连件120可以是引线框的部分。互连件120可包括例如铜、金、银或铝。互连件120中的每一个可包括连接到衬垫111的第一区121和从第一区121延伸的第二区122。第一区121可电耦合到衬垫111且可在第一方向上从衬垫111突出。另外,在本公开的实例实施方案中,第一区121可在基本上垂直于衬垫111的第一方向上延伸。第二区122可在第二方向上从第一区121延伸。第二方向可不同于第一区121延伸的第一方向。在一个实例中,第二区122可在基本上垂直于第一区121的方向上延伸。互连件120还可被配置成延伸经过电子装置110的占据面积或区域达第二区122的延伸长度。因此,互连件120可用以执行电子装置110的衬垫111上的再分布。
图7A到7D示出制造实例半导体装置的实例方法的横截面图。
参考图7A,根据本公开的用于制造半导体装置200的实例方法可包括提供衬底10。衬底10可被配置成使得连续布置多个电子装置。衬底10也可称为晶片、条带或平面。衬垫111和电介质112可提供于衬底10的第一表面110a上以便对应于每一电子装置的区。衬底10的第一表面110a可构成电子装置的第一表面。另外,电介质112可提供于衬底10的整个第一表面110a上,同时填充衬垫111与相邻衬垫111之间的间隙。
参考图7B,互连件120可提供于衬底10的第一表面110a上的相邻电子装置的连接衬垫111上。互连件120可连接相邻电子装置的衬垫111。
互连件120可包括在第一方向上耦合到相应衬垫111的多个第一区121以及在第二方向上将第一区121彼此连接的第二区122。互连件120的第一区121和第二区122可整合式地形成。另外,互连件120可为将耦合到衬垫111的预制结构。在一些实例中,互连件120可形成为引线框或从引线框形成。互连件120可由铜、金、银或铝制成。
参考图7C,可对衬底10执行单分或单分过程。可使用锯切或切割执行单分。由于单分,个别电子装置110可与衬底10分离。另外,可执行单分以连同衬底10分离互连件120的第二区122。因此,通过互连件120彼此连接的相邻电子装置110的衬垫111可彼此分离。
如图7D,已经历单分的电子装置110可被配置成包含个别地连接到相应衬垫111的互连件120。另外,由于半导体装置200被配置成使得互连件120形成于电子装置110上,因此可简化制造工艺且可通过互连件120快速建立电路径。另外,通过其中互连件120的第一区121和第二区122延伸的配置可在电子装置110的衬垫111上执行再分布。
从所有前述内容,本领域技术人员可确定根据另一实例,一种用于制作半导体装置的方法包括提供衬底,所述衬底包括作为衬底的部分形成的多个电子装置。所述方法包含在所述多个电子装置之间形成从衬底的第一表面部分地向内延伸的凹槽。所述方法包含将互连件耦合到电子装置上的衬垫,其中每一互连件横跨相邻电子装置之间的凹槽中的一个,其中每一互连件包括在向上方向上耦合到相应相邻电子装置的相应衬垫的第一区,以及在横向方向上将第一区彼此连接的第二区结构。所述方法包含在衬底的第一表面上和凹槽内提供囊封物,使得所述囊封物填充互连件中的每一个之间的部分且填充互连件中的每一个与衬底的第一表面之间的部分。所述方法包含从衬底的与第一表面相对的第二表面移除衬底的一部分以从第二表面暴露囊封物。所述方法包含通过凹槽的部分单分衬底和互连件以将互连件和衬底分离为个别电子装置。
在另一个实例中,在单分的步骤之后囊封物的部分保留在电子装置的侧表面上。在又另一实例中,耦合互连件包括耦合作为引线框提供的互连件。在另一实例中,提供囊封物包括以囊封物覆盖第二区的第一侧,同时使第二区的第二侧从囊封物暴露。
总之,已经描述与具有互连结构的电子装置相关的结构和方法。在一些实例中,互连结构包含多个互连件,其各自具有在第一或向上方向上从电子装置的表面延伸的第一区,以及在第二或横向方向上从第一区延伸的连接到第一区的第二区。在一些实例中,互连件作为引线框的部分提供,所述引线框可附接到含有多个电子装置的衬底,作为制造方法的部分。在一些实例中,可使用单分来同时分离互连件和衬底以提供电子装置。互连件可以是用于电子装置的再分布图案或结构的部分,其提供较好的形状因子。除了其它以外,所述结构和方法提供用于电子装置的更有成本效益的再分布图案,其使用简化过程流程且提供高效电路径。
本公开包含对某些实例的引用,然而,本领域的技术人员应理解的是,在不脱离本公开的范围的情况下,可以作出各种改变并且可以取代等同物。另外,在不脱离本公开的范围的情况下可以对公开的实例作出修改。因此,预期本公开不限于公开的实例,而是本公开将包含属于所附权利要求书的范围内的所有实例。
Claims (20)
1.一种半导体装置,包括:
电子装置,所述电子装置包括:
装置顶部表面;
装置底部表面,其与所述装置顶部表面相对;以及
装置侧表面,其在所述装置顶部表面与所述装置底部表面之间延伸;
互连件,其耦合到所述装置顶部表面,所述互连件包括:
第一区,其在向上方向上从所述装置顶部表面延伸;以及
第二区,其耦合到所述第一区,其中所述第二区在横向方向上从所述第一区延伸;以及
囊封物,其覆盖所述装置顶部表面、所述装置侧表面和所述第一区的外围,其中:
所述第二区的第一部分从所述囊封物的第一表面暴露;
所述第二区的第二部分从所述囊封物的第二表面暴露;且
所述囊封物覆盖所述第二区的第三部分。
2.根据权利要求1所述的半导体装置,其中:
所述横向方向基本上平行于所述装置顶部表面;且
所述第二部分延伸以与所述装置侧表面重叠以便延伸到所述电子装置的周界外部。
3.根据权利要求1所述的半导体装置,其中:
所述第一部分直接连接到所述电子装置的衬垫;且
所述向上方向基本上垂直于所述装置顶部表面。
4.根据权利要求1所述的半导体装置,其中:
所述装置底部表面从所述囊封物的第三表面暴露;且
所述第三表面与所述第一表面相对。
5.根据权利要求1所述的半导体装置,其中:
所述第一表面包括所述囊封物的顶部表面;且
所述顶部表面与所述第二区的所述第一部分基本上共面。
6.根据权利要求1所述的半导体装置,其中:
所述第二区的所述第二部分包括末端部分;
所述第二表面包括所述囊封物的侧表面;且
所述侧表面与所述末端部分基本上共面。
7.一种半导体装置,包括:
电子装置,所述电子装置包括:
装置顶部表面;
装置底部表面,其与所述装置顶部表面相对;
装置侧表面,其在所述装置顶部表面与所述装置底部表面之间延伸;以及
衬垫,其安置于所述装置顶部表面上;
以及
互连件,其耦合到所述衬垫,所述互连件包括:
第一区,其各自在向上方向上从相应衬垫延伸;以及
第二区,其各自耦合到相应第一区,其中每一第二区在横向方向上从所述相应第一区延伸,且其中所述互连件包括所述衬垫上的再分布图案。
8.根据权利要求7所述的半导体装置,还包括:
囊封物,其覆盖所述装置顶部表面、所述装置侧表面和所述第一区的外围,其中:
所述第二区的第一部分从所述囊封物的第一表面暴露;
所述第二区的第二部分从所述囊封物的第二表面暴露;且
所述第二区的第三部分被所述囊封物覆盖。
9.根据权利要求8所述的半导体装置,其中:
所述装置底部表面从所述囊封物的第三表面暴露;且
所述第三表面与所述第一表面相对。
10.根据权利要求8所述的半导体装置,其中:
所述第一表面包括所述囊封物的顶部表面;且
所述顶部表面与所述第二区的所述第一部分基本上共面。
11.根据权利要求8所述的半导体装置,其中:
所述第二区的所述第二部分包括末端部分;
所述第二表面包括所述囊封物的侧表面;且
所述侧表面与所述末端部分基本上共面。
12.根据权利要求7所述的半导体装置,其中:
所述横向方向基本上平行于所述装置顶部表面;且
所述第二部分延伸以与所述装置侧表面重叠以便延伸到所述电子装置的周界外部。
13.根据权利要求7所述的半导体装置,其中:
所述向上方向基本上垂直于所述装置顶部表面。
14.根据权利要求7所述的半导体装置,其中:
每一第二部分与所述相应第一部分整合。
15.一种用于制作半导体装置的方法,包括:
提供衬底,所述衬底包括作为所述衬底的部分形成的多个电子装置;
将互连件耦合到所述电子装置上的衬垫,其中每一互连件横跨于相邻电子装置之间,其中每一互连件包括:
第一区,其耦合到相应的所述相邻电子装置的相应衬垫且在向上方向上延伸,以及
第二区结构,其在横向方向上将所述第一区彼此连接;
以及
单分所述衬底和所述互连件以将每一第二区结构分离为第二区且将所述衬底分离为个别电子装置。
16.根据权利要求15所述的方法,还包括:
在所述多个电子装置之间形成从所述衬底的第一表面部分地向内延伸的凹槽;
在所述衬底的所述第一表面上和所述凹槽内提供囊封物,使得所述囊封物填充所述互连件中的每一个之间的部分且填充所述互连件中的每一个与所述衬底的所述第一表面之间的部分;以及
从所述衬底的与所述第一表面相对的第二表面移除所述衬底的一部分以从所述第二表面暴露所述囊封物。
17.根据权利要求16所述的方法,其中:
形成所述凹槽发生在耦合所述互连件之前;且
单分发生在移除所述衬底的所述部分之后。
18.根据权利要求16所述的方法,其中:
在所述单分步骤之后所述囊封物的部分保留在所述电子装置的侧表面上。
19.根据权利要求16所述的方法,其中:
提供所述囊封物包括以所述囊封物覆盖每一第二区结构的第一侧面,同时使每一第二区结构的第二侧从所述囊封物暴露。
20.根据权利要求15所述的方法,其中:
耦合所述互连件包括耦合作为引线框提供的所述互连件。
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