CN112213554B - Weak current measuring circuit and method based on current frequency conversion method - Google Patents
Weak current measuring circuit and method based on current frequency conversion method Download PDFInfo
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- CN112213554B CN112213554B CN202010919801.3A CN202010919801A CN112213554B CN 112213554 B CN112213554 B CN 112213554B CN 202010919801 A CN202010919801 A CN 202010919801A CN 112213554 B CN112213554 B CN 112213554B
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Abstract
The invention discloses a weak current measuring circuit based on a current frequency conversion method, which comprises the following steps: the device comprises a current integrator, a threshold discrimination circuit, a reset logic circuit, a monostable trigger circuit, a signal acquisition and processing system and an integral reset circuit, wherein the current integrator, the threshold discrimination circuit, the reset logic circuit, the monostable trigger circuit and the signal acquisition and processing system are sequentially connected, and the integral reset circuit is connected with the current integrator and the reset logic circuit. The weak current to be measured is converted into a digital pulse frequency signal through the current integrator, the integral reset circuit, the reset logic circuit and the monostable trigger circuit, and the value of the weak current to be measured is obtained through measurement of the signal acquisition and processing system.
Description
Technical Field
The invention relates to the field of weak current measurement, in particular to a weak current measurement circuit and method based on a current frequency conversion method.
Background
Generally mixing nA (10)-9A) Currents below the magnitude of the current are referred to as weak currents. Measurement of weak current signals is often required in production, scientific research and teaching work in the fields of nuclear technology application, ionizing radiation detection, electrochemistry, novel materials and the like. The weak current measurement has the difficulty that the amplitude of a signal to be measured is small and is easily influenced by various interference sources (electronic noise, the triboelectric effect of mechanical vibration, an external electromagnetic field, an electrochemical effect and the like), and the various interference sources not only can generate measurement errors, but also can possibly cause that the measurement cannot be carried out. In addition, the range of the weak current signal to be measured in the measurement task of the application fieldOften spanning multiple orders of magnitude, e.g., ionizing radiation detection typically requires measuring the range of weak current signals produced by the ionization chamber to 10-15A～10-8A. Sometimes, due to the difference between the application environment (temperature and humidity) and the application scene requirement (small space), the circuit environment adaptability and the volume are required, which results in that the frequently used I-V conversion method based on the large-volume high-value resistor cannot be used. Therefore, a small-sized, wide-range, high-precision weak current measuring circuit and method are needed.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a weak current measuring circuit and a method based on a current frequency conversion method, which are used for measuring after the weak current to be measured is converted into a digital pulse frequency signal, and have better measuring precision and smaller measuring uncertainty.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
a weak current measuring circuit based on a current frequency conversion method comprises: the current integrator, the threshold discrimination circuit, the reset logic circuit, the monostable trigger circuit, the signal acquisition and processing system and the integral reset circuit are connected in sequence;
the current integrator is used for collecting a weak current signal and outputting a voltage signal to the threshold discrimination circuit, wherein the amplitude of the voltage signal is in direct proportion to the total charge amount of the weak current signal;
the threshold discrimination circuit is used for performing threshold discrimination on the voltage signal and outputting a corresponding logic signal to the reset logic circuit;
the reset logic circuit is used for outputting a reset trigger signal to the integral reset circuit and outputting a trigger signal to the monostable trigger circuit at the same time or closing the integral reset circuit according to the logic signal;
the integral reset circuit is used for starting to work and outputting reset current after receiving the reset trigger signal;
the monostable trigger circuit is used for shaping the trigger signal and outputting a digital level logic pulse signal with a fixed width to the signal acquisition and processing system, wherein the frequency of the digital level logic pulse signal is in direct proportion to the weak current signal;
and the signal acquisition and processing system is used for acquiring and processing the digital level logic pulse signal to obtain the value of the weak current signal.
Further, a weak current measuring circuit based on a current frequency conversion method as described above, the current integrator includes: the current limiting circuit comprises an integrating capacitor, a first current limiting resistor and an operational amplifier with low bias current, wherein one end of the integrating capacitor and one end of the first current limiting resistor are both connected with a weak current signal, the other end of the first current limiting resistor is connected with the inverting input end of the operational amplifier, the non-inverting input end of the operational amplifier is grounded, and the other end of the integrating capacitor and the output end of the operational amplifier are connected with the threshold discrimination circuit.
Further, a weak current measuring circuit based on a current frequency conversion method as described above, the threshold discriminating circuit includes: two parallel hysteresis comparators, first hysteresis comparator include: the current integrator is connected with one end of the first resistor, the other end of the first resistor is connected with one end of the second resistor, a first input end of the first high-speed comparator and one end of the third resistor, the other end of the second resistor and a second input end of the first high-speed comparator are grounded, and the other end of the third resistor and an output end of the first high-speed comparator are connected with a 1CLK end of the reset logic circuit; the second hysteresis comparator comprises: the current integrator is connected with one end of the fourth resistor, the other end of the fourth resistor is connected with one end of the fifth resistor, the first input end of the second high-speed comparator and one end of the sixth resistor, the other end of the fifth resistor and the second input end of the second high-speed comparator are grounded, and the other end of the sixth resistor and the output end of the second high-speed comparator are connected with the-1 CLK end of the reset logic circuit.
Further, in the weak current measuring circuit based on the current-frequency conversion method, a trigger threshold of the first high-speed comparator is an upper voltage threshold, an output of the first high-speed comparator is a high level when the voltage signal exceeds the upper voltage threshold, and the output of the first high-speed comparator is a low level when the voltage signal is lower than the upper voltage threshold;
the trigger threshold of the second high speed comparator is a lower voltage threshold, the output of the second high speed comparator is at a high level when the voltage signal exceeds the lower voltage threshold, and the output of the second high speed comparator is at a low level when the voltage signal is lower than the lower voltage threshold.
Further, as described above, in the weak current measurement circuit based on the current-to-frequency conversion method, the reset logic circuit is specifically configured to:
when the outputs of the first high-speed comparator and the second high-speed comparator are both high level, a reset port outputs high level, so that the integral reset circuit works and outputs reset current;
when the outputs of the first high-speed comparator and the second high-speed comparator are both low level, the reset port outputs low level, and the integral reset circuit is closed.
Further, the weak current measuring circuit based on the current frequency conversion method as described above, the integrating reset circuit includes: the current integrator comprises a first diode, a second current-limiting resistor and a reset power switch, wherein the anode of the first diode and the cathode of the second diode are connected with the input end of the current integrator, the cathode of the first diode and the anode of the second diode are connected with one end of the second current-limiting resistor, the other end of the second current-limiting resistor is connected with the output end of the reset power switch, and the input end of the reset power switch is connected with the reset logic circuit.
Further, the weak current measuring circuit based on the current frequency conversion method as described above, the monostable trigger circuit includes: the first input end of the first NOR gate is the input end of the monostable trigger circuit, the output end of the first NOR gate is connected with one end of the first capacitor, the other end of the first capacitor is connected with one end of the eighth resistor and the first input end of the second NOR gate, the other end of the eighth resistor is connected with a power supply, the second input end of the first NOR gate is connected with the output end of the second NOR gate, the second input end of the second NOR gate is grounded, the output end of the second NOR gate is connected with the first input end of the third NOR gate, the second input end of the third NOR gate is connected with the second input end of the fourth NOR gate and grounded, and the output end of the third NOR gate is connected with the first input end of the fourth NOR gate, and the output end of the fourth NOR gate is the output end of the monostable trigger circuit.
Further, the weak current measuring circuit based on the current frequency conversion method as described above, the monostable trigger circuit includes: the first input end of the first NAND gate is the input end of the monostable trigger circuit, the first input end of the first NAND gate is connected with the second input end and the first input end of the second NAND gate, the output end of the first NAND gate is connected with one end of the ninth resistor, the other end of the ninth resistor is connected with one end of the second capacitor and the second input end of the second NAND gate, the output end of the second NAND gate is connected with the first input end and the second input end of the third NAND gate, the output end of the third NAND gate is connected with the first input end and the second input end of the fourth NAND gate, and the output end of the fourth NAND gate is the output end of the monostable trigger circuit.
Further, the weak current measuring circuit based on the current frequency conversion method as described above, the signal collecting and processing system includes: the pulse counter, the microcontroller and the display are connected in sequence and used for collecting and processing the digital level logic pulse signal to obtain a time interval T between two pulses or a unit time pulse count n;
if the integration time is T1 and the reset time is T2, T is T1+ T2 is 1/n;
t1 and t2 are calculated by the following formula:
wherein, IResetFor the reset current, IINAs the weak current signal, CfIs an integrating capacitor;
if the reset current IResetMuch larger than the weak current signal IINT1 is a fixed value, T1 is much larger than T2, and T is approximately equal to T1, then the weak current signal IINThe value of (d) is calculated by:
wherein, VTHHIs said upper voltage threshold, VTHLIs the lower voltage threshold.
A weak current measuring method based on a current frequency conversion method comprises the following steps:
(1) the current integrator collects a weak current signal and outputs a voltage signal to the threshold discrimination circuit, wherein the amplitude of the voltage signal is in direct proportion to the total charge amount of the weak current signal;
(2) the threshold discrimination circuit discriminates the threshold of the voltage signal and outputs a corresponding logic signal to the reset logic circuit;
(3) the reset logic circuit outputs a reset trigger signal to the integral reset circuit and simultaneously outputs a trigger signal to the monostable trigger circuit according to the logic signal, or closes the integral reset circuit; the integral reset circuit starts to work and outputs reset current after receiving the reset trigger signal;
(4) the monostable trigger circuit shapes the trigger signal and outputs a digital level logic pulse signal with fixed width to a signal acquisition and processing system, wherein the frequency of the digital level logic pulse signal is in direct proportion to the weak current signal;
(5) and the signal acquisition and processing system acquires and processes the digital level logic pulse signal to obtain the value of the weak current signal.
The invention has the beneficial effects that: the weak current to be measured is converted into a digital pulse frequency signal through the current integrator, the integral reset circuit, the reset logic circuit and the monostable trigger circuit, and the value of the weak current to be measured is obtained through measurement of the signal acquisition and processing system, so that the method has better measurement accuracy and smaller measurement uncertainty.
Drawings
Fig. 1 is a circuit diagram of a weak current measurement circuit based on a current frequency conversion method according to an embodiment of the present invention;
FIG. 2 is a diagram of an integration reset circuit provided in an embodiment of the present invention;
FIG. 3 is a diagram of a reset logic circuit provided in an embodiment of the present invention;
FIG. 4 is a timing diagram of a reset logic circuit provided in an embodiment of the present invention;
FIG. 5 is a circuit diagram of a monostable flip-flop according to an embodiment of the invention;
FIG. 6 is a diagram of another monostable flip-flop circuit provided in an embodiment of the invention;
fig. 7 is a flowchart of a weak current measurement method based on a current frequency transformation method according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and the detailed description.
Aiming at the widely used I-V conversion weak current measuring circuit based on high-value resistance, the volume is large, and a plurality of high-value resistances (10) are required to be used10Omega or above) and high insulation relay, high value resistance environment temperature, humidity are comparatively sensitive, the problem that environmental suitability is relatively poor is provided, therefore provide one kind and adopt the electric capacity integral mode, need not range switching, change weak current to be measured into little volume, wide range, high accuracy weak current measuring circuit of digital pulse frequency signal through integrating circuit, reset circuit and logic circuit.
As shown in fig. 1, a weak current measuring circuit based on a current-frequency conversion method includes: the device comprises a current integrator, a threshold discrimination circuit, a reset logic circuit, a monostable trigger circuit, a signal acquisition and processing system and an integral reset circuit, wherein the current integrator, the threshold discrimination circuit, the reset logic circuit, the monostable trigger circuit and the signal acquisition and processing system are sequentially connected;
the current integrator is used for collecting the weak current signals and outputting voltage signals to the threshold discrimination circuit, wherein the amplitude of the voltage signals is in direct proportion to the total charge amount of the weak current signals;
the threshold discrimination circuit is used for performing threshold discrimination on the voltage signal and outputting a corresponding logic signal to the reset logic circuit;
the reset logic circuit is used for outputting a reset trigger signal to the integral reset circuit and simultaneously outputting a trigger signal to the monostable trigger circuit or closing the integral reset circuit according to the logic signal;
the integral reset circuit is used for starting working and outputting reset current after receiving a reset trigger signal;
the monostable trigger circuit is used for shaping the trigger signal and outputting a digital level logic pulse signal with fixed width to the signal acquisition and processing system, wherein the frequency of the digital level logic pulse signal is in direct proportion to the weak current signal;
and the signal acquisition and processing system is used for acquiring and processing the digital level logic pulse signal to obtain the value of the weak current signal.
The current integrator includes: the low-bias current detection circuit comprises an integrating capacitor, a first current-limiting resistor and an operational amplifier with low bias current, wherein one end of the integrating capacitor and one end of the first current-limiting resistor are both connected with a weak current signal, the other end of the first current-limiting resistor is connected with the inverting input end of the operational amplifier, the non-inverting input end of the operational amplifier is grounded, and the other end of the integrating capacitor and the output end of the operational amplifier are connected with a threshold discrimination circuit.
As shown in FIG. 1, the current (charge) integrator is composed of a resistor R7, a low bias current (I)b) High-speed precision amplifier U4 and capacitor CfAnd the deep negative feedback structure based on the operational amplifier is formed. The precise operational amplifier is mainly selected by considering low bias current (I)b) High unity Gain Bandwidth (GBP) and Slew Rate (SR) indexes, wherein low bias current often accompanies lower input current noise, which is beneficial to improving the measurement lower limit index and resolution index, and unity gain bandwidth and slew rate can realize faster integration rate, i.e. beneficial to improving the measurement upper limit, a JFET input stage or CMOS process operational amplifier is generally selected, and the model of the operational amplifier U4 in the circuit is OPA128J (or OPA129, AD549, ADA4530-1, etc.); the capacitor should have high insulation resistance (R) as a feedback integrating capacitorinsulation＞1014Ohm), high quality factor (Q > 0.99), low loss angle (D < 0.01), wherein polystyrene capacitor is selected, the capacitance value is selectable from 12pF to 100pF, when higher sensitivity is needed, capacitor with lower capacitance value is preferred, and typical capacitance value of the circuit is 33 pF; the resistor R7 with a resistance of 1M omega is used as a current limiting protection resistor of the operational amplifier.
The threshold discrimination circuit includes: two parallel hysteresis comparators, first hysteresis comparator include: the reset circuit comprises a first resistor, a second resistor, a third resistor and a first high-speed comparator, wherein one end of the first resistor is connected with a current integrator, the other end of the first resistor is connected with one end of the second resistor, a first input end of the first high-speed comparator and one end of the third resistor, the other end of the second resistor and a second input end of the first high-speed comparator are grounded, and the other end of the third resistor and an output end of the first high-speed comparator are connected with a 1CLK end of the reset logic circuit; the second hysteresis comparator comprises: the circuit comprises a fourth resistor, a fifth resistor, a sixth resistor and a second high-speed comparator, wherein one end of the fourth resistor is connected with a current integrator, the other end of the fourth resistor is connected with one end of the fifth resistor, the first input end of the second high-speed comparator and one end of the sixth resistor, the other end of the fifth resistor and the second input end of the second high-speed comparator are grounded, and the other end of the sixth resistor and the output end of the second high-speed comparator are connected with the-1 CLK end of the reset logic circuit.
The trigger threshold of the first high-speed comparator is an upper voltage threshold, the output of the first high-speed comparator is a high level when the voltage signal exceeds the upper voltage threshold, and the output of the first high-speed comparator is a low level when the voltage signal is lower than the upper voltage threshold;
the trigger threshold of the second high speed comparator is a lower voltage threshold, the output of the second high speed comparator is at a high level when the voltage signal exceeds the lower voltage threshold, and the output of the second high speed comparator is at a low level when the voltage signal is lower than the lower voltage threshold.
As shown in FIG. 1, the threshold discrimination circuit is composed of a two-way high-speed comparator and a two-way hysteresis comparator composed of resistors R1-R6, wherein the two-way high-speed comparator adopts a MAX991EUB chip, the resistors R1 and R5 are 1% of 15k omega resistors, the resistors R2 and R6 are 1% of 8.2k resistors, the resistors R3 and R4 are 1% of 1.2M omega resistors, and V is a resistorTHLAnd VTHHCan be adjusted according to sensitivity, VTHLAnd VTHHTypical values are 100mV and 300mV respectively.
The reset logic is specifically configured to:
when the outputs of the first high-speed comparator and the second high-speed comparator are both high level, the reset port outputs high level, so that the integral reset circuit works and outputs reset current;
when the outputs of the first high-speed comparator and the second high-speed comparator are both low level, the reset port outputs low level, and the integral reset circuit is closed.
As shown in FIG. 3, the reset logic circuit is composed of a 74LS74 chip, the output of U5A in FIG. 1 is connected to pin 3 of the U3 chip, the output of U5B in FIG. 1 is connected to pin 1 of the U3 chip, pins 2 and 4 are connected to logic high level, and the logic and timing are shown in FIG. 4.
The integration reset circuit includes: the current integrator comprises a first diode, a second current-limiting resistor and a reset power switch, wherein the anode of the first diode and the cathode of the second diode are connected with the input end of the current integrator, the cathode of the first diode and the anode of the second diode are connected with one end of the second current-limiting resistor, the other end of the second current-limiting resistor is connected with the output end of the reset power switch, and the input end of the reset power switch is connected with the reset logic circuit.
As shown in fig. 2, the integral reset circuit is composed of a diode, a current limiting resistor, and a reset power switch. The reset power switch adopts an analog switch chip ADG 419; the diode D1A adopts a double-low reverse bias leakage current diode with the model of BAV199, and can also use two JFET type and MOS type field effect transistors with the same type as the diode for replacement; the double diodes are connected in parallel and then are connected in series with a current limiting resistor R10, the resistance value of the current limiting resistor R10 is 1 MOmega, one side of the diode is connected with the input end of the current integrator after the diode and the current limiting resistor are connected in series, and one side of the resistor is connected with the output end of the reset power supply; D1A and D1B are respectively used for reset currents with different polarities; when the integral reset circuit stops, the output of the reset power supply is zero potential; magnitude of reset current IResetIs (V)Reset-VDiode) /R10, wherein VResetFor reset voltage, VDiodeThe voltage is about 0.7V, V when the diode is conductedResetThe polarity needs to be selected to be opposite in accordance with the polarity of the input current, and the reset current value is generally set to 1 μ A (1 × 10) in order to reduce the influence of the reset time-6A)。
The monostable flip-flop circuit includes: the first input end of the first NOR gate is the input end of the monostable trigger circuit, the output end of the first NOR gate is connected with one end of the first capacitor, the other end of the first capacitor is connected with one end of the eighth resistor and the first input end of the second NOR gate, the other end of the eighth resistor is connected with the power supply, the second input end of the first NOR gate is connected with the output end of the second NOR gate, the second input end of the second NOR gate is grounded, the output end of the second NOR gate is connected with the first input end of the third NOR gate, the second input end of the third NOR gate is connected with the second input end of the fourth NOR gate and grounded, the output end of the third NOR gate is connected with the first input end of the fourth NOR gate, and the output end of the fourth NOR gate is the output end of the monostable trigger circuit.
The monostable flip-flop circuit includes: the first input end of the first NAND gate is the input end of the monostable trigger circuit, the first input end of the first NAND gate is connected with the second input end of the second NAND gate, the output end of the first NAND gate is connected with one end of the ninth resistor, the other end of the ninth resistor is connected with one end of the second capacitor and the second input end of the second NAND gate, the output end of the second NAND gate is connected with the first input end and the second input end of the third NAND gate, the output end of the third NAND gate is connected with the first input end and the second input end of the fourth NAND gate, and the output end of the fourth NAND gate is the output end of the monostable trigger circuit.
The NOR gate in the monostable flip-flop circuit is composed of a NOR logic chip 74LS02, and the NAND gate is composed of a NAND logic chip 74LS 00. Fig. 5 shows a monostable flip-flop formed by a nor logic chip 74LS02, fig. 6 shows a monostable flip-flop formed by a nand logic chip 74LS00, either one of the two circuits can be selected, and a digital level pulse signal having a pulse width of about 1 μ s is output after being shaped by the monostable flip-flop circuit.
The signal acquisition and processing system comprises: the pulse counter, the microcontroller and the display are connected in sequence and used for collecting and processing the digital level logic pulse signals to obtain a time interval T between two pulses or a unit time pulse count n;
if the integration time is T1 and the reset time is T2, T1+ T2 is 1/n.
T1 and t2 are calculated by the following formula:
wherein, IResetTo reset the current, IINAs a weak current signal, CfIs the integrating capacitance.
If the reset current IResetMuch larger than weak current signal IINT1 is a constant value, T1 is much larger than T2, and T is approximately equal to T1, the weak current signal IINThe value of (d) is calculated by:
wherein, VTHHTo an upper voltage threshold, VTHLIs a lower voltage threshold, CfIs the integrating capacitance.
The pulse counter can be realized by an external counting function of a single chip microcomputer, for example, when an STM32f103RCT 32-bit microcontroller is adopted, a TIM8-ETR pin can be adopted to configure into an external counting mode to complete the counting function, and the calculation of an input current value can be completed through a formula (3) by acquiring the number n of pulses within a fixed time; the circuit can also be directly calibrated through a standard weak current source, and the parameters of the circuit are obtained through the linear relation between the standard current value and the counting rate.
As shown in fig. 7, a weak current measuring method based on a current-frequency transformation method includes:
s100, collecting a weak current signal by a current integrator and outputting a voltage signal to a threshold discrimination circuit, wherein the amplitude of the voltage signal is in direct proportion to the total charge amount of the weak current signal;
s200, threshold discrimination is carried out on the voltage signal by a threshold discrimination circuit, and a corresponding logic signal is output to a reset logic circuit;
s300, the reset logic circuit outputs a reset trigger signal to the integral reset circuit and simultaneously outputs a trigger signal to the monostable trigger circuit or closes the integral reset circuit according to the logic signal; the integral reset circuit starts to work and outputs reset current after receiving a reset trigger signal;
s400, shaping the trigger signal by the monostable trigger circuit, and outputting a digital level logic pulse signal with a fixed width to a signal acquisition and processing system, wherein the frequency of the digital level logic pulse signal is in direct proportion to a weak current signal;
and S500, the signal acquisition and processing system acquires and processes the digital level logic pulse signal to obtain the value of the weak current signal.
The weak current measuring circuit and the method of the invention have the advantages that:
1. the weak current value to be measured is indirectly obtained by measuring capacitance value and time parameters, and the measurement precision and uncertainty of capacitance measurement and time measurement are superior to those of high-value resistance measurement, so that the method has better measurement precision and smaller measurement uncertainty.
2. By converting current to frequency (counting rate or time), 7-8 orders of magnitude of wide-range weak current measurement can be realized without an additional range switching circuit.
3. Large-volume components such as high-value resistors and high-insulation relays are not used, so that the circuit is small in size.
4. The capacitance is used as a core device for measurement, and because the temperature coefficient of the capacitance and the humidity sensitivity of the insulation resistance are far smaller than that of the high-value resistance, compared with a measurement scheme adopting the high-value resistance, the temperature range and the humidity range can be wider, and the environmental adaptability is better.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is intended to include such modifications and variations.
Claims (5)
1. A weak current measuring circuit based on a current frequency conversion method is characterized by comprising: the device comprises a current integrator, a threshold discrimination circuit, a reset logic circuit, a monostable trigger circuit, a signal acquisition and processing system and an integral reset circuit, wherein the current integrator, the threshold discrimination circuit, the reset logic circuit, the monostable trigger circuit and the signal acquisition and processing system are sequentially connected with one another;
the current integrator is used for collecting a weak current signal and outputting a voltage signal to the threshold discrimination circuit, wherein the amplitude of the voltage signal is in direct proportion to the total charge amount of the weak current signal;
the current integrator includes: the circuit comprises an integrating capacitor, a first current-limiting resistor and an operational amplifier with low bias current, wherein one end of the integrating capacitor and one end of the first current-limiting resistor are both connected with a weak current signal, the other end of the first current-limiting resistor is connected with the inverting input end of the operational amplifier, the non-inverting input end of the operational amplifier is grounded, and the other end of the integrating capacitor and the output end of the operational amplifier are connected with a threshold discrimination circuit;
the threshold discrimination circuit is used for performing threshold discrimination on the voltage signal and outputting a corresponding logic signal to the reset logic circuit;
the threshold discrimination circuit includes: two parallel hysteresis comparators, first hysteresis comparator include: the current integrator is connected with one end of the first resistor, the other end of the first resistor is connected with one end of the second resistor, a first input end of the first high-speed comparator and one end of the third resistor, the other end of the second resistor and a second input end of the first high-speed comparator are grounded, and the other end of the third resistor and an output end of the first high-speed comparator are connected with a 1CLK end of the reset logic circuit; the second hysteresis comparator comprises: one end of the fourth resistor is connected with the current integrator, the other end of the fourth resistor is connected with one end of the fifth resistor, the first input end of the second high-speed comparator and one end of the sixth resistor, the other end of the fifth resistor and the second input end of the second high-speed comparator are grounded, and the other end of the sixth resistor and the output end of the second high-speed comparator are connected with the-1 CLK end of the reset logic circuit;
the reset logic circuit is used for outputting a reset trigger signal to the integral reset circuit and outputting a trigger signal to the monostable trigger circuit at the same time or closing the integral reset circuit according to the logic signal;
the reset logic circuit is composed of a 74LS74 chip, a pin 3 of the chip is connected with the output end of the first high-speed comparator of the threshold discrimination circuit, a pin 1 of the chip is connected with the output end of the second high-speed comparator of the threshold discrimination circuit, and a pin 2 and a pin 4 of the chip are connected with a logic high level;
the integral reset circuit is used for starting to work and outputting reset current after receiving the reset trigger signal;
the integration reset circuit includes: the current integrator comprises a first diode, a second current-limiting resistor and a reset power switch, wherein the anode of the first diode and the cathode of the second diode are connected with the input end of the current integrator, the cathode of the first diode and the anode of the second diode are connected with one end of the second current-limiting resistor, the other end of the second current-limiting resistor is connected with the output end of the reset power switch, and the input end of the reset power switch is connected with the reset logic circuit;
the monostable trigger circuit is used for shaping the trigger signal and outputting a digital level logic pulse signal with a fixed width to the signal acquisition and processing system, wherein the frequency of the digital level logic pulse signal is in direct proportion to the weak current signal;
the monostable flip-flop circuit includes: the first input end of the first NOR gate is the input end of the monostable trigger circuit, the output end of the first NOR gate is connected with one end of the first capacitor, the other end of the first capacitor is connected with one end of the eighth resistor and the first input end of the second NOR gate, the other end of the eighth resistor is connected with a power supply, the second input end of the first NOR gate is connected with the output end of the second NOR gate, the second input end of the second NOR gate is grounded, the output end of the second NOR gate is connected with the first input end of the third NOR gate, the second input end of the third NOR gate is connected with the second input end of the fourth NOR gate and grounded, and the output end of the third NOR gate is connected with the first input end of the fourth NOR gate, the output end of the fourth NOR gate is the output end of the monostable trigger circuit;
the signal acquisition and processing system is used for acquiring and processing the digital level logic pulse signal to obtain the value of the weak current signal;
the signal acquisition and processing system comprises: the pulse counter, the microcontroller and the display are connected in sequence and used for collecting and processing the digital level logic pulse signal to obtain a time interval T between two pulses or a unit time pulse count n;
if the integration time is T1 and the reset time is T2, T is T1+ T2 is 1/n;
t1 and t2 are calculated by the following formula:
wherein, IResetFor the reset current, IINAs the weak current signal, CfIs an integrating capacitor;
if the reset current IResetMuch larger than the weak current signal IINT1 is a fixed value, T1 is much larger than T2, and T is approximately equal to T1, then the weak current signal IINThe value of (d) is calculated by:
wherein, VTHH is the upper voltage threshold, VTHL is the lower voltage threshold;
the pulse counter is realized by an external counting function of the single chip microcomputer, and the calculation of the input current value is completed through a formula (3) by acquiring the number n of pulses in a fixed time.
2. The weak current measuring circuit based on the current-frequency transformation method as claimed in claim 1, wherein the trigger threshold of the first high-speed comparator is an upper voltage threshold, the output of the first high-speed comparator is at a high level when the voltage signal exceeds the upper voltage threshold, and the output of the first high-speed comparator is at a low level when the voltage signal is lower than the upper voltage threshold;
the trigger threshold of the second high speed comparator is a lower voltage threshold, the output of the second high speed comparator is at a high level when the voltage signal exceeds the lower voltage threshold, and the output of the second high speed comparator is at a low level when the voltage signal is lower than the lower voltage threshold.
3. The weak current measurement circuit based on the current-to-frequency conversion method as claimed in claim 1, wherein the reset logic circuit is specifically configured to:
when the outputs of the first high-speed comparator and the second high-speed comparator are both high level, a reset port outputs high level, so that the integral reset circuit works and outputs reset current;
when the outputs of the first high-speed comparator and the second high-speed comparator are both low level, the reset port outputs low level, and the integral reset circuit is closed.
4. The weak current measuring circuit based on the current-frequency conversion method as claimed in claim 1, wherein the monostable trigger circuit comprises: the first input end of the first NAND gate is the input end of the monostable trigger circuit, the first input end of the first NAND gate is connected with the second input end and the first input end of the second NAND gate, the output end of the first NAND gate is connected with one end of the ninth resistor, the other end of the ninth resistor is connected with one end of the second capacitor and the second input end of the second NAND gate, the output end of the second NAND gate is connected with the first input end and the second input end of the third NAND gate, the output end of the third NAND gate is connected with the first input end and the second input end of the fourth NAND gate, and the output end of the fourth NAND gate is the output end of the monostable trigger circuit.
5. A weak current measuring method based on a current frequency conversion method is applied to a weak current measuring circuit based on the current frequency conversion method according to any one of claims 1 to 4, and is characterized by comprising the following steps:
(1) the current integrator collects a weak current signal and outputs a voltage signal to the threshold discrimination circuit, wherein the amplitude of the voltage signal is in direct proportion to the total charge amount of the weak current signal;
(2) the threshold discrimination circuit discriminates the threshold of the voltage signal and outputs a corresponding logic signal to the reset logic circuit;
(3) the reset logic circuit outputs a reset trigger signal to the integral reset circuit and simultaneously outputs a trigger signal to the monostable trigger circuit according to the logic signal, or closes the integral reset circuit; the integral reset circuit starts to work and outputs reset current after receiving the reset trigger signal;
(4) the monostable trigger circuit shapes the trigger signal and outputs a digital level logic pulse signal with fixed width to a signal acquisition and processing system, wherein the frequency of the digital level logic pulse signal is in direct proportion to the weak current signal;
(5) and the signal acquisition and processing system acquires and processes the digital level logic pulse signal to obtain the value of the weak current signal.
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