CN112185702A

CN112185702A - Multilayer ceramic capacitor

Info

Publication number: CN112185702A
Application number: CN202010641390.6A
Authority: CN
Inventors: 李泽正; 李旼坤; 崔才烈; 郑镇万; 朱镇卿
Original assignee: Samsung Electro Mechanics Co Ltd
Current assignee: Samsung Electro Mechanics Co Ltd
Priority date: 2019-07-04
Filing date: 2020-07-06
Publication date: 2021-01-05
Anticipated expiration: 2040-07-06
Also published as: CN117275940A; CN112185702B; CN212161587U

Abstract

The present invention provides a multilayer ceramic capacitor including: a body including a dielectric layer and first and second internal electrodes disposed such that the dielectric layer is interposed between the first and second internal electrodes and disposed to be point-symmetrical to each other; first and second connection electrodes penetrating the body in a direction perpendicular to the dielectric layers and connected to the first internal electrodes; third and fourth connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the second internal electrodes; first and second external electrodes disposed on both surfaces of the body and connected to the first and second connection electrodes, respectively; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to third and fourth connection electrodes, the first and second internal electrodes including regions in which the electrodes are not disposed.

Description

Multilayer ceramic capacitor

This application claims the benefit of priority of korean patent application No. 10-2019-.

Technical Field

The present disclosure relates to a multilayer ceramic capacitor.

Background

Electronic devices including multilayer ceramic capacitors (MLCCs) have been increasingly used recently. In the era of 5 th generation communication, a larger number of capacitors have been used in smartphones, and such capacitors are required to have high capacity. However, the mounting area of passive components such as MLCCs and inductors is reduced as the size of a kit is reduced, and thus, the demand for reducing the size of the passive components is increased. The MLCC and inductor may be packaged with an Integrated Circuit (IC) and an Application Processor (AP), may be embedded in a substrate, or may be mounted at the lower end of the AP in the form of a (land side capacitor) LSC to improve mounting flexibility, as desired.

Therefore, the mounting area can be reduced, and the equivalent series inductance (ESL) occurring in the substrate can also be reduced. Therefore, there is an increasing demand for MLCC products with reduced size.

Unlike a general MLCC, the dual via type capacitor may include a through hole. In the dual via type capacitor, the capping layer may be disposed in the upper and lower portions, the through hole may be formed in the body in which the effective layer forming the capacitance is disposed, the through hole may be filled with the via electrode, and the via electrode may be electrically connected.

However, in such a via type capacitor, ESL and Equivalent Series Resistance (ESR) of the capacitor may be deteriorated due to the via, and the capacitance may be reduced.

Disclosure of Invention

An aspect of the present disclosure is to provide a multilayer ceramic capacitor having improved equivalent series inductance (ESL) by canceling mutual inductance.

Another aspect of the present disclosure is to provide a multilayer ceramic capacitor having an increased capacitance compared to a multilayer ceramic capacitor having an internal via structure.

Another aspect of the present disclosure is to provide a multilayer ceramic capacitor having an improved insulation breakdown voltage (BDV).

According to an aspect of the present disclosure, there is provided a multilayer ceramic capacitor including: a body including a dielectric layer and first and second internal electrodes disposed such that the dielectric layer is interposed therebetween and disposed to be point-symmetrical to each other; first and second connection electrodes penetrating the body in a direction perpendicular to the dielectric layers and connected to the first internal electrodes; third and fourth connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the second internal electrodes; first and second external electrodes disposed on both surfaces of the body and connected to the first and second connection electrodes, respectively; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes, the first and second internal electrodes including regions in which no electrode is disposed.

According to another aspect of the present disclosure, there is provided a multilayer ceramic capacitor including: a body including first and second internal electrodes disposed to be point-symmetrical to each other, and a dielectric layer interposed between the first and second internal electrodes; first and second connection electrodes disposed perpendicular to the dielectric layer and exposed through the first and second surfaces of the body, connected to the first internal electrodes and spaced apart from a portion of the second internal electrodes; third and fourth connection electrodes disposed perpendicular to the dielectric layer and exposed through the first and second surfaces of the body, connected to the second internal electrode and spaced apart from a portion of the first internal electrode and the first and second connection electrodes; first and second external electrodes disposed on the first and second surfaces of the body, respectively, and connected to the first and second connection electrodes; and third and fourth external electrodes disposed on the first and second surfaces of the body, respectively, spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes.

Drawings

The above and other aspects, features and advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

fig. 1 is a perspective view illustrating a multilayer ceramic capacitor according to an example embodiment of the present disclosure;

FIG. 2 is a sectional view taken along line I-I' in FIG. 1;

fig. 3A and 3B are sectional views taken along the X and Y directions shown in fig. 1, in which fig. 3A is a sectional view showing a first internal electrode and fig. 3B is a sectional view showing a second internal electrode; and

fig. 4A and 4B are sectional views taken along the X and Y directions shown in fig. 1, in which fig. 4A is a sectional view showing a first internal electrode, and fig. 4B is a sectional view showing a second internal electrode.

Detailed Description

Hereinafter, embodiments of the present disclosure will be described as follows with reference to the accompanying drawings. The shapes and dimensions of constituent elements in the drawings may be exaggerated or reduced for clarity.

These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. It is to be understood that the various embodiments of the invention, although different, are not necessarily mutually exclusive. For example, structures, shapes, and dimensions described as examples in embodiments in the present disclosure may be implemented in another example embodiment without departing from the spirit and scope of the present disclosure. The shapes and sizes of elements in the drawings may be exaggerated for clarity of description, and the same elements will be denoted by the same reference numerals.

Some elements may be omitted or briefly shown for clarity of description, and thicknesses of elements may be exaggerated to clearly represent layers and regions. It will be understood that when an element is referred to as being "comprising" a portion, it can further comprise, but does not exclude, another element, unless otherwise indicated.

In the drawing, the X direction may be defined as a first direction, an L direction, or a length direction, the Y direction may be defined as a second direction, a W direction, or a width direction, and the Z direction may be defined as a third direction, a T direction, or a thickness direction. However, these directions are defined for convenience of explanation, and the claims are not specifically limited by the directions defined as described above.

The meaning of "connected" of a component to another component in the specification includes indirect connection through an adhesive layer and direct connection between two components. In addition, "electrically connected" is meant to include the concept of physically connected and physically disconnected. It is understood that when an element is referred to as being "first" and "second," the element is not limited thereto. The terms "first," "second," and the like may be used for the purpose of distinguishing elements from other elements only and may not limit the order or importance of the elements. In some instances, a first element may be termed a second element without departing from the scope of the claims set forth herein. Similarly, a second element may also be referred to as a first element.

The term "exemplary embodiment" as used herein does not refer to the same exemplary embodiment, and is provided to emphasize a particular feature or characteristic that is different from a feature or characteristic of another exemplary embodiment. However, the exemplary embodiments provided herein are considered to be capable of being implemented in whole or in part by combining with each other. For example, unless a contrary or contradictory description is provided therein, an element described in a particular exemplary embodiment, even if it is not described in another exemplary embodiment, may be understood as a description relating to another exemplary embodiment.

The terminology used herein is for the purpose of describing example embodiments only and is not intended to be limiting of the disclosure. In this case, the singular form includes the plural form unless the context otherwise explains.

In the following description, a multilayer ceramic capacitor according to an example embodiment will be described with reference to fig. 1 to 4B.

The multilayer ceramic capacitor 200 in the example embodiment may include: a main body 210, the main body 210 including a dielectric layer 211 and first and second

internal electrodes

221 and 222, the first and second

internal electrodes

221 and 222 being disposed with the dielectric layer 211 interposed therebetween and disposed to be point-symmetrical to each other; first and

second connection electrodes

231 and 234 penetrating the body 210 in a direction perpendicular to the dielectric layer 211 and connected to the first internal electrodes 221; third and

fourth connection electrodes

232 and 233 penetrating the body 210 in a direction perpendicular to the dielectric layer 211 and connected to the second internal electrodes 222; first and second

external electrodes

241 and 244 disposed on both surfaces of the body 210 and connected to the first and

second connection electrodes

231 and 234; and third and fourth

external electrodes

242 and 243 spaced apart from the first and second

external electrodes

241 and 244 and connected to the third and

fourth connection electrodes

232 and 233, and the first and second

internal electrodes

221 and 222 include

regions

222a and 221a, respectively, in which no electrode is disposed.

In the body 210, the dielectric layer 211 and the first and second

internal electrodes

221 and 222 may be alternately stacked. The shape of the body 210 may not be limited to any particular shape, and may have a hexahedral shape or a hexahedral-like shape as shown in the drawings. Since the ceramic powder included in the body 210 is shrunk during the sintering process, the body 210 may not have an exact hexahedral shape having a straight line, but may have a substantially hexahedral shape.

The body 210 may have a first surface S1 and a second surface S2 opposite to each other in a thickness direction (Z direction), a third surface S3 and a fourth surface S4 connected to the first surface S1 and the second surface S2 and opposite to each other in a width direction (Y direction), and a fifth surface S5 and a sixth surface S6 connected to the first surface S1 and the second surface S2 and the third surface S3 and the fourth surface S4 and opposite to each other in a length direction (X direction). One of the first surface S1 and the second surface S2 may be configured as a mounting surface.

The plurality of dielectric layers included in the body 210 may be in a sintered state, and the dielectric layers may be integrated such that a boundary between adjacent dielectric layers cannot be identified without using a Scanning Electron Microscope (SEM).

In example embodiments, the material of the dielectric layer 211 may not be limited to any particular material as long as sufficient capacitance may be obtained. For example, the dielectric layer 211 may be formed using a barium titanate material, a perovskite material compound having lead (Pb), a strontium titanate material, or the like. The barium titanate material may comprise BaTiO₃Powder of and BaTiO₃Examples of the powder may include (Ba) in which calcium (Ca), zirconium (Zr), or the like is partially solid-dissolved_1-xCa_x)TiO₃、Ba(Ti_1-yCa_y)O₃、(Ba_1-xCa_x)(Ti_1-yZr_y)O₃、Ba(Ti_1-yZr_y)O₃And the like. Barium titanate (BaTiO) added with various ceramic additives, organic solvents, coupling agents, dispersing agents, etc. may be used according to the intended purpose₃) Powder, etc. as the material of the dielectric layer 211.

First and

second cover parts

212 and 213 each having a certain thickness may be formed in lower parts of the lowermost internal electrodes and in upper parts of the uppermost internal electrodes of the body 210. The first and

second cover parts

212 and 213 may have the same composition as that of the dielectric layer 211, and the first and

second cover parts

212 and 213 may be formed by stacking at least one or more dielectric layers, which do not include electrodes, in each of the upper part of the uppermost internal electrode and the lower part of the lowermost internal electrode of the body 210.

In an example embodiment, the logo 250 may be disposed on the first cover 212 and/or the second cover 213, if desired. The logo 250 may be formed in one of the first and

second cover parts

212 and 213, and the upper and lower parts of the body 210 may be distinguished from each other based on a difference in brightness or color by the logo 250. The mark 250 may be configured as a dielectric layer formed by sintering a single ceramic green sheet or laminating a plurality of ceramic green sheets, and may be included in the first cover part 212 and/or the second cover part 213.

The method of providing the difference in brightness or color between the first and

second covers

212 and 213 by using the marker 250 is not limited to any particular method. For example, the logo 250 may be formed using ceramic particles each having a size different from that of the ceramic particles included in the body, or may be formed by oxidizing one or more metals selected from Ni, Mn, Cr, Mg, Y and V or BaSiO₃、CaSiO₃Etc. are added to the ceramic composition and a laser may be used to mark the logo 250. However, the material of the logo 250 and the method of forming the logo 250 may not be limited to the above examples. By providing the marks, the upper and lower portions of the main body can be distinguished from each other, and the direction of the protrusion protruding through the electrode can be recognized. Accordingly, the multilayer ceramic capacitor in the example may be mounted on a substrate in a direction in which an improved bonding force is obtained.

In an example embodiment, the thickness of the body 210 may be 100 μm or less. The thickness of the body 210 may refer to a vertical distance between the first surface and the second surface. The lower limit of the thickness is not limited to any particular size, and may be, for example, 5 μm or more. The multilayer ceramic capacitor in the example embodiment may be applied to a multilayer ceramic capacitor embedded in a substrate and/or a capacitor mounted on a lower end of an Application Processor (AP) in the form of a Land Side Capacitor (LSC) by manufacturing the body 210 to have a thickness of 100 μm or less.

The

internal electrodes

221 and 222 may include first and second

internal electrodes

221 and 222 alternately disposed and opposite to each other, and the dielectric layer 211 is interposed between the first and second

internal electrodes

221 and 222. The first and second

internal electrodes

221 and 222 may include

regions

222a and 221a, respectively, in which no electrode is disposed. The

regions

222a and 221a in which the electrodes are not disposed may refer to regions in which the first and second

internal electrodes

221 and 222 are not disposed, respectively, and the first and second

internal electrodes

221 and 222 may be connected to external electrodes having different polarities. Accordingly, the first and

second connection electrodes

231 and 234 may penetrate the region 221a in which the electrodes are not formed and may be spaced apart from the second internal electrode 222, and the third and

fourth connection electrodes

232 and 233 may penetrate the region 222a in which the electrodes are not formed and may be spaced apart from the first internal electrode 221.

By connecting the first and second

inner electrodes

221 and 222 to the first, second, third and fourth

outer electrodes

241, 244, 242 and 243 using the first, second, third and

fourth connection electrodes

231, 234, 232 and 233, the overlapping area between the first and second

inner electrodes

221 and 222 with the dielectric layer 211 interposed therebetween may be increased, and thus the capacitance of the multilayer ceramic capacitor 200 may be increased.

The first and second

internal electrodes

221 and 222 may include a large amount of nickel (Ni), but the composition of the first and second

internal electrodes

221 and 222 is not limited thereto. For example, the first and second

internal electrodes

221 and 222 may be formed using a conductive paste containing one or more materials from silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), tin (Sn), copper (Cu), tungsten (W), titanium (Ti), indium (In), and alloys thereof. As a method of printing the conductive paste, a screen printing method, a gravure printing method, or the like may be used, but the printing method is not limited thereto.

The multilayer ceramic capacitor 200 in example embodiments may include first and

second connection electrodes

231 and 234, third and

fourth connection electrodes

232 and 233, the first and

second connection electrodes

231 and 234 may be electrically connected to first and second

outer electrodes

241 and 244, and the third and

fourth connection electrodes

232 and 233 may be electrically connected to third and fourth

outer electrodes

242 and 243.

As described above, by providing a plurality of connection electrodes connecting the first and second

external electrodes

241 and 244 and the third and fourth

external electrodes

242 and 243, the coupling force between the external electrodes and the main body may be improved.

Fig. 3A and 3B are sectional views illustrating shapes of the first and second

internal electrodes

221 and 222. Referring to fig. 3A and 3B, the first and second

internal electrodes

221 and 222 may have shapes formed to be point-symmetrical to each other. The formation of the point-symmetric configuration of the

internal electrodes

221 and 222 may mean: assuming that there are electrodes in regions of the

internal electrodes

221 and 222 where no electrodes are actually disposed, the first and second

internal electrodes

221 and 222 may be disposed to be point-symmetric to each other with reference to a center point of each of the

internal electrodes

221 and 222. Since the first and second

internal electrodes

221 and 222 have shapes forming point symmetry, mutual inductance can be cancelled, thereby improving equivalent series inductance (ESL) of the multilayer ceramic capacitor.

In example embodiments, each of the first and second

internal electrodes

221 and 222 may have a T-shaped form. Referring to fig. 3A and 3B, each of the first and second

internal electrodes

221 and 222 may have a shape of a long side taken in a length direction and a short side taken in a width direction, and the shape illustrated in fig. 3A and 3B may represent a T-shaped form.

Since each of the

internal electrodes

221 and 222 has a T-shaped form, the

regions

221a and 222a in which no electrode is disposed may be formed in the

internal electrodes

222 and 221, the

connection electrodes

231 and 234 may penetrate the region 221a in which no electrode is disposed, and the

connection electrodes

233 and 234 may penetrate the region 222a in which no electrode is disposed. By including the above structure, the capacitance can be increased as compared with a configuration in which a via hole is formed in the internal electrode.

In example embodiments, each of the

regions

222a and 221a in which the electrodes are not disposed among the

internal electrodes

221 and 222 may have a rectangular shape. Referring to fig. 3A and 3B, each of the

regions

221a and 222a in which the electrodes are not disposed may have a rectangular shape toward the center portion of the inner electrode.

In another example embodiment, each of the

regions

222a and 221a of the

inner electrodes

221 and 222, where no electrode is disposed, may have a circular shape. Referring to fig. 4A and 4B, each of the

regions

221a and 222a in which the electrodes are not disposed may have a circular shape toward the center portion of the inner electrode. That is, the corner portions of the

internal electrodes

221 and 222 have

areas

222a and 221a recessed in an approximately circular shape toward the center portion thereof.

In the above-described example embodiments, each of the regions of the internal electrodes where no electrode is disposed may have a rectangular shape and/or a circular shape, but the shape of the regions where no electrode is disposed is not limited thereto. Examples of the shape of the region where the electrode is not provided may include a quadrangular shape (e.g., a trapezoidal shape, a rectangular shape), a triangular shape, a polygonal shape having more than four sides, a circular shape, an elliptical shape, and a combination of any of these shapes.

In example embodiments, the

connection electrodes

231, 232, 233, and 234 may include a large amount of nickel, but the composition of the

connection electrodes

231, 232, 233, and 234 is not limited thereto. For example, the

connection electrodes

231, 232, 233, and 234 may be formed using a conductive paste containing one or more materials from among silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), tin (Sn), copper (Cu), tungsten (W), titanium (Ti), and an alloy thereof. The method of forming the

connection electrodes

231, 232, 233, and 234 is not limited to any particular method. For example, the

connection electrodes

231, 232, 233, and 234 may be formed by: a laminated body in which the dielectric layer 211, the first internal electrode 221, and the second internal electrode 222 are laminated is formed, the body 210 is drilled in the third direction (Z direction) using laser drilling, mechanical pin punching, or the like, and the drilled portion is filled with the above-described conductive paste.

In an example embodiment, the

inner electrodes

221 and 222 and the

connection electrodes

231, 232, 233, and 234 may include the same metal material. The same metal material may be nickel (Ni), but examples of the metal material are not limited thereto. For example, the metal material may include one or more elements from silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), tin (Sn), copper (Cu), tungsten (W), titanium (Ti), and alloys thereof. When the

internal electrodes

221 and 222 and the

connection electrodes

231, 232, 233, and 234 of the multilayer ceramic capacitor include the same metal material, the sintering initiation temperature and/or the sintering shrinkage rate of the

internal electrodes

221 and 222 and the

connection electrodes

231, 232, 233, and 234 may be matched, so that cracks, delamination, and the like may be prevented.

In example embodiments, the

connection electrodes

231, 232, 233, and 234 may protrude in the Z direction. Referring to fig. 2, the connection electrode 231 may protrude to the second surface of the body 210. This is because the connection electrode 231 may protrude outward of the through-hole of the body 210 due to sintering shrinkage or the like during a process for forming the connection electrode. Depending on the size of the protrusion, when the multilayer ceramic capacitor is mounted in or on the substrate, an air gap may be formed between the electrode and the substrate, which may cause deterioration of the bonding force. In the multilayer ceramic capacitor in example embodiments, since the external electrodes are disposed on both the first and second surfaces of the body, deterioration of the coupling force caused by the protrusion may be prevented.

In example embodiments, the cross-sectional shape of each of the

connection electrodes

231, 232, 233, and 234 may be configured as a circle, but examples of the cross-sectional shape are not limited thereto. The cross section of each of the

connection electrodes

231, 232, 233, and 234 may have a quadrangular shape, a triangular shape, or the like. Also, the

connection electrodes

231, 232, 233, and 234 may occupy 5% to 65% of an area in a width direction (Y direction) of the body, but example embodiments thereof are not limited thereto.

In example embodiments, first, second, third, and fourth

external electrodes

241, 244, 242, and 243 may be disposed on both surfaces of the body 210. The first and second

external electrodes

241 and 244 may be disposed on the first and second surfaces S1 and S2 of the body 210, respectively, and may be electrically connected to each other by the first and

second connection electrodes

231 and 234. The third and fourth

external electrodes

242 and 243 may be spaced apart from the first and second

external electrodes

241 and 244, may be disposed on the first and second surfaces S1 and S2 of the body 110, respectively, and may be electrically connected through the third and

fourth connection electrodes

232 and 233.

The multilayer ceramic capacitor 200 configured as above may have improved capacitance by increasing the area where the first and second

internal electrodes

221 and 222 are disposed by reducing the edge portions on the side surfaces of the upper and lower surfaces of the connection body 210. Therefore, in the multilayer ceramic capacitor 200 in the example embodiment, the external electrodes may not be disposed on the side surfaces, and the internal electrodes may be connected to the external electrodes through the connection electrodes penetrating the body, thereby increasing the capacitance.

In the following description, the configuration of the external electrode will be described based on the first external electrode 241 with reference to fig. 2. The description of the first external electrode 241 may be applied to the second, third and fourth

external electrodes

244, 242 and 243.

Referring to fig. 2, the first external electrode 241 may include a first sintered electrode 241a and first and second plating layers 241b and 241 c. The first sintered electrode 241a may include one or more materials from among silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), tin (Sn), copper (Cu), tungsten (W), titanium (Ti), and alloys thereof, and may be configured as a sintered electrode formed, for example, by sintering a conductive paste including nickel (Ni). When the outer electrode includes a sintered electrode (first sintered electrode 241), the outer electrode may be sintered simultaneously with the body and the inner electrode, and the bonding strength between the body and the outer electrode may be improved. In addition, referring to fig. 2, the second external electrode 244 may include a first sintered electrode 244a and first and second plating layers 244b and 244 c. Since the description of the first external electrode 241 is applicable to the second, third and fourth

external electrodes

244, 242 and 243, a detailed description thereof will be omitted.

In example embodiments, the arithmetic average roughness (Ra) of the surface of each of the first, second, third and fourth

external electrodes

241, 244, 242 and 243 (e.g., the sintered electrode of each of the first, second, third and fourth

external electrodes

241, 244, 242 and 243) may be in the range of 1nm to 100 nm. In example embodiments, the term "arithmetic average roughness (Ra)" may refer to an average roughness value of a distance to a virtual center line, and the concept that the outer electrode has the arithmetic average roughness (Ra) of 1nm to 100nm may refer to that the outer electrode may have a surface roughness in the above-described range, and may refer to that the outer electrode may have an artificially structured surface roughness satisfying the above-described range.

The arithmetic mean roughness (Ra) can be calculated by: a virtual center line is set with respect to regions having roughness on the surfaces of the first, second, third, and fourth

outer electrodes

241, 244, 242, and 243, distances from the apex of each region having roughness to the virtual center line (e.g., r1, r2, r3, … … rn) are measured, an average value of the distances is calculated using equation 1 (below), and a value obtained from the calculation may be determined as an arithmetic average roughness (Ra) of the outer electrode.

[ formula 1]

The external electrode having the arithmetic average roughness (Ra) satisfying the above range may be formed by physical or chemical surface modification. The method of surface modification is not limited to any particular method as long as the above-described roughness can be obtained. For example, surface treatment with an acid or alkaline solution, physical polishing treatment with an abrasive material, or the like can be used.

In general, since an oxide layer may be formed on the surface of a sintered electrode including nickel during a sintering process, it may be difficult to form a plated layer, the plated layer may be easily separated, or other problems may exist. When the surface of the external electrode in the exemplary embodiment is reformed to have an arithmetic average roughness (Ra) satisfying the above range, the oxide layer may be removed, or a surface having a certain roughness may be formed. Accordingly, the adhesion between the sintered electrode of the external electrode and the plating layer can be improved, and the separation of the plating layer can be prevented.

The first plating layer 241b may include nickel, and the second plating layer 241c may include copper or tin. Since the first plating layer 241b includes nickel, the adhesion to the first sintering electrode 241a may be improved. In addition, since the second plating layer 241b includes copper or tin, an external electrode having improved conductivity, improved plating adhesion property, and improved soldering property may be provided.

In another example embodiment, the first plating layer 241b may include tin and the second plating layer 241c may include nickel. Since the first plating layer 241b includes tin, the adhesion with the first sintering electrode 241a may be improved. In addition, since the second plating layer 241b includes nickel, a uniform plating layer can be formed.

In example embodiments, each of the first, second, third, and fourth

external electrodes

241, 244, 242, and 243 may have a thickness in a range of 3 μm to 30 μm. The thickness of each of the first, second, third and fourth

external electrodes

241, 244, 242 and 243 may refer to a total thickness of the external electrode including the sintered electrode, the first plating layer and the second plating layer stacked therein, and may refer to a distance from the body perpendicular to the surface of the external electrode. By configuring the thickness of the external electrode as above, the multilayer ceramic capacitor may not occupy a large area when mounted on or embedded in a substrate, and may have improved mounting performance.

The multilayer ceramic capacitor in the example embodiment may be manufactured by the method described below. A green sheet having a paste including a conductive metal printed on one surface thereof at a certain thickness (for forming a dielectric layer) may be stacked, thereby preparing a body including a dielectric layer and first and second internal electrodes with the dielectric layer interposed therebetween.

The first and

second cover parts

212 and 213 may be formed by laminating dielectric layers not including the internal electrodes on the upper and lower parts of the body 210. An identification 250 may be set if desired.

After forming the cover, vias may be formed in the body using laser drilling, mechanical pin punching, or the like. The via holes may be coated with a conductive paste or may be filled with a conductive material through a plating process or the like, thereby forming the first connection electrode 231, the second connection electrode 234, the third connection electrode 232, and the fourth connection electrode 233.

First and second

external electrodes

241 and 244 connected to the first and

second connection electrodes

231 and 234 and third and fourth

external electrodes

242 and 243 connected to the third and

fourth connection electrodes

232 and 233 may be formed on the first and second surfaces of the body 210.

For example, forming the first to fourth outer electrodes may include: the method includes forming first to fourth sintered electrodes including nickel on a body, forming a first plating layer on each of the first to fourth sintered electrodes, and forming a second plating layer on the first plating layer.

The sintered electrode may be formed by coating a surface with a conductive paste including nickel and sintering the paste, the first plating layer may include nickel and may be formed by an electroplating method or an electroless plating method, and the second plating layer may include copper or tin and may be formed by an electroplating method or an electroless plating method.

After the sintered electrode layer is formed, a baking process and a sintering process may be performed, and the first and second plating layers may be formed, thereby manufacturing the multilayer ceramic capacitor shown in fig. 1.

According to the foregoing example embodiments, the capacitance of the multilayer ceramic capacitor may be improved.

In addition, the dielectric breakdown voltage (BDV) of the multilayer ceramic capacitor can be improved.

Further, a multilayer ceramic capacitor having improved equivalent series inductance (ESL) can be provided by canceling mutual inductance.

While example embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the scope of the invention as defined by the appended claims.

Claims

1. A multilayer ceramic capacitor comprising:

a body including a dielectric layer and first and second internal electrodes disposed such that the dielectric layer is interposed therebetween and disposed to be point-symmetrical to each other;

first and second connection electrodes penetrating the body in a direction perpendicular to the dielectric layers and connected to the first internal electrodes;

third and fourth connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the second internal electrodes;

first and second external electrodes respectively disposed on both surfaces of the body opposite to each other in a stacking direction of the first and second internal electrodes and connected to the first and second connection electrodes; and

third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes,

wherein each of the first and second internal electrodes comprises one or more selected from the group consisting of silver, palladium, gold, platinum, nickel, tin, copper, tungsten, titanium, indium, and alloys thereof,

wherein the first and second internal electrodes include regions in which no electrode is disposed.

2. The multilayer ceramic capacitor according to claim 1, wherein each of the first and second internal electrodes has a T-shape.

3. The multilayer ceramic capacitor according to claim 1, wherein a region in each of the first and second internal electrodes where no electrode is provided has a rectangular shape or a circular shape.

4. The multilayer ceramic capacitor as set forth in claim 1,

wherein the first connection electrode and the second connection electrode penetrate through a region where no electrode is disposed in the second internal electrode, and

wherein the third connection electrode and the fourth connection electrode penetrate through a region where no electrode is disposed in the first internal electrode.

5. The multilayer ceramic capacitor according to claim 1, wherein the first and second internal electrodes comprise nickel.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein the first to fourth external electrodes comprise sintered electrodes containing nickel.

7. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein each of the first to fourth external electrodes has an arithmetic average roughness of 1 to 100 nm.

8. The multilayer ceramic capacitor according to claim 1, wherein the first to fourth external electrodes comprise sintered electrodes and first and second plating layers sequentially stacked on the sintered electrodes.

9. The multilayer ceramic capacitor according to claim 1, wherein each of the first to fourth external electrodes has a thickness in a range of 3 to 30 μm.

10. The multilayer ceramic capacitor of claim 1 wherein the body has a thickness of 100 μ ι η or less.

11. A multilayer ceramic capacitor comprising:

a body including first and second internal electrodes disposed to be point-symmetrical to each other, and a dielectric layer interposed between the first and second internal electrodes;

first and second connection electrodes disposed perpendicular to the dielectric layer and exposed through the first and second surfaces of the body, connected to the first internal electrodes and spaced apart from a portion of the second internal electrodes;

third and fourth connection electrodes disposed perpendicular to the dielectric layer and exposed through the first and second surfaces of the body, connected to the second internal electrode and spaced apart from a portion of the first internal electrode and the first and second connection electrodes;

first and second external electrodes disposed on the first and second surfaces of the body, respectively, and connected to the first and second connection electrodes; and

third and fourth external electrodes disposed on the first and second surfaces of the body, respectively, spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes,

wherein each of the first and second internal electrodes includes one or more selected from the group consisting of silver, palladium, gold, platinum, nickel, tin, copper, tungsten, titanium, indium, and alloys thereof.

12. The multilayer ceramic capacitor of claim 11, wherein the first and second internal electrodes comprise a conductive material disposed on the dielectric layer.

13. The multilayer ceramic capacitor according to claim 12, wherein the portion of the first internal electrode spaced apart from the third and fourth connection electrodes and the portion of the second internal electrode spaced apart from the first and second connection electrodes include portions where the conductive material is not present.

14. The multilayer ceramic capacitor according to claim 13, wherein each of the portion of the first internal electrode spaced apart from the third and fourth connection electrodes and the portion of the second internal electrode spaced apart from the first and second connection electrodes has a shape selected from the group consisting of a quadrangle, a triangle, a polygon having more than four sides, a circle, an ellipse, and combinations thereof.

15. The multilayer ceramic capacitor according to any one of claims 11 to 14, wherein each of the first, second, third and fourth external electrodes has an arithmetic average roughness of 1nm to 100 nm.

16. The multilayer ceramic capacitor according to claim 11, wherein each of the first connection electrode, the second connection electrode, the third connection electrode, and the fourth connection electrode includes a via penetrating the body, the via being filled with a conductive material.

17. The multilayer ceramic capacitor of any one of claims 11-14, further comprising an identification layer disposed on one or both of the first and second surfaces of the body.