CN112179329A - System for realizing carrier tracking - Google Patents
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- CN112179329A CN112179329A CN201910589075.0A CN201910589075A CN112179329A CN 112179329 A CN112179329 A CN 112179329A CN 201910589075 A CN201910589075 A CN 201910589075A CN 112179329 A CN112179329 A CN 112179329A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
- G01C19/00—Gyroscopes; Turn-sensitive devices using vibrating masses; Turn-sensitive devices without moving masses; Measuring angular rate using gyroscopic effects
- G01C19/56—Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces
- G01C19/5776—Signal processing not specific to any of the devices covered by groups G01C19/5607 - G01C19/5719
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
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Abstract
The invention provides a system for realizing carrier tracking. The system comprises a discriminator, a loop filter, a voltage-controlled oscillator and a resonator, wherein the discriminator has two paths of inputs, one path of input is from the output of the resonator, the other path of input is from the output of the voltage-controlled oscillator, and the discriminator calculates the phase error and the frequency error of the two inputs and converts the phase error and the frequency error into voltage output; the loop filter carries out low-pass filtering on the output voltage of the discriminator to obtain a voltage direct-current component; and the voltage-controlled oscillator continuously accumulates the phase of the voltage direct-current component output by the loop filter, converts the voltage into phase output, and adjusts the amplitude of the voltage change through the voltage-controlled sensitivity coefficient to obtain the changed phase output. The invention can realize fast and high-precision carrier tracking by combining a frequency locking loop and a phase locking loop.
Description
Technical Field
The invention relates to the technical field of MEMS, in particular to a system for realizing carrier tracking.
Background
With the large-scale development of integrated circuits, Micro-Electro-Mechanical systems (MEMS) which is a kind of MEMS gyroscope is rapidly developed based on the conventional integrated circuits, and the silicon Micro gyroscope is a most complex sensor in the world due to the integration of various technologies, has the characteristics of small volume, high sensitivity and the like, has very wide application, and plays a very important role in both the national defense field and the civil field.
Although the application field of the silicon micro gyroscope is so wide, because the research on the silicon micro gyroscope in China starts late, most of the produced gyroscopes are in medium and low precision based on the current design and processing level and are difficult to adapt to the application in occasions with higher requirements such as national defense, aerospace and the like, the improvement of the precision becomes a key problem for researching the silicon micro gyroscope.
In order to realize high precision of the silicon micro gyroscope, a closed loop driving circuit of the silicon micro gyroscope needs to be improved, a main component of the all-digital closed loop driving circuit is a digital phase-locked loop, and most of components of the traditional digital phase-locked loop are a phase discriminator, a low-pass filter and a voltage-controlled oscillator. In the high dynamic process, in order to meet the environmental requirements, the phase-locked loop achieves higher tracking precision, the bandwidth is narrower, and the system performance is difficult to meet.
Disclosure of Invention
The system for realizing carrier tracking can realize rapid and high-precision carrier tracking by using a mode of combining a frequency locking ring and a phase locking ring.
In a first aspect, the present invention provides a system for implementing carrier tracking, the system comprising a discriminator, a loop filter, a voltage controlled oscillator, and a resonator, wherein,
the discriminator has two paths of inputs, one path of input is from the output of the resonator, the other path of input is from the output of the voltage-controlled oscillator, the discriminator calculates the phase error and the frequency error of the two inputs and converts the phase error and the frequency error into voltage output;
the loop filter carries out low-pass filtering on the output voltage of the discriminator to obtain a voltage direct-current component;
and the voltage-controlled oscillator continuously accumulates the phase of the voltage direct-current component output by the loop filter, converts the voltage into phase output, and adjusts the amplitude of the voltage change through the voltage-controlled sensitivity coefficient to obtain the changed phase output.
Optionally, the discriminator includes a frequency discriminator and a phase discriminator, where the frequency discriminator and the phase discriminator have two inputs, one input is from the output of the resonator, and the other input is from the output of the voltage-controlled oscillator.
Optionally, the frequency discriminator performs point and cross calculation on the two paths of input, and divides the calculated point and cross calculation by sampling time through a function ATAN2 to output a frequency error; the phase detector outputs a phase error through the calculation of a function ATAN2 on the two paths of input.
Optionally, the phase detector outputs a sinusoidal signal with a frequency approximating the true frequency error and the phase detector outputs a sinusoidal signal with a phase error.
Optionally, the loop filter includes a second-order frequency-locked loop filter and a third-order phase-locked loop filter, the second-order frequency-locked loop filter filters and denoises the frequency error output by the frequency discriminator, the third-order phase-locked loop filter filters and denoises the phase error output by the phase discriminator, and the loop filter normalizes the outputs of the second-order frequency-locked loop filter and the third-order phase-locked loop filter to obtain the low-frequency direct-current component.
Optionally, the second-order frequency-locked loop filter filters a frequency error output by the frequency discriminator, removes a high-frequency component, and outputs a low-frequency direct-current component; and the third-order phase-locked loop filter filters the phase error output by the phase discriminator, removes high-frequency components and outputs low-frequency direct-current components.
The system for realizing carrier tracking provided by the embodiment of the invention comprises a novel second-order frequency-locked loop-assisted third-order phase-locked loop consisting of the frequency-locked loop and the phase-locked loop, wherein the frequency-locked loop is used for carrying out frequency tracking, the phase-locked loop is used for carrying out phase compensation after tracking, and the frequency-locked loop and the phase-locked loop are combined to realize fast and high-precision carrier tracking in a mode of combining the frequency-locked loop and the phase-locked loop under different conditions.
Drawings
Fig. 1 is a block diagram of an overall structure of a system for implementing carrier tracking according to an embodiment of the present invention;
fig. 2 is a block diagram of an overall structure of a third-order phase-locked loop according to an embodiment of the present invention;
fig. 3 is a structural diagram of a third-order pll filter assisted by a second-order frequency-locked loop according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An embodiment of the present invention provides a system for implementing carrier tracking, as shown in fig. 1, the system includes a discriminator, a loop filter, a voltage-controlled oscillator, and a resonator, wherein,
the discriminator has two paths of inputs, one path of input is from the output of the resonator, the other path of input is from the output of the voltage-controlled oscillator, the discriminator calculates the phase error and the frequency error of the two inputs and converts the phase error and the frequency error into voltage output;
the loop filter carries out low-pass filtering on the output voltage of the discriminator to obtain a voltage direct-current component;
the voltage-controlled oscillator is essentially an integral accumulator, the voltage direct-current component output by the loop filter is subjected to phase continuous accumulation, the voltage is converted into phase output, the amplitude of voltage change is adjusted through a voltage-controlled sensitivity coefficient to obtain changed phase output, finally, the output signal of the discriminator is stable, and the output phase of the voltage-controlled oscillator is also stable.
The following describes a system for implementing carrier tracking according to an embodiment of the present invention in detail.
As shown in fig. 2, the third-order phase-locked loop is an overall structure block diagram of the third-order phase-locked loop, where the frequency detector and the phase detector have two inputs, one input is from the output of the resonator, and the other input is from the output of the voltage-controlled oscillator. The local oscillation signal and the feedback signal are subjected to integral zero clearing to obtain two paths of signals I and Q, the signal I enters a frequency discriminator, the signal Q enters a phase discriminator, the output signal of the frequency discriminator is a frequency error of two inputs, and the output of the phase discriminator is a phase error of the two inputs. The frequency discriminator performs point and cross calculation on the two paths of input, divides the calculation of the function ATAN2 by sampling time, and outputs a frequency error; the phase detector outputs a phase error through the calculation of a function ATAN2 on the two paths of input. The phase discriminator outputs a sinusoidal signal with a frequency approximate to a real frequency error, and the phase discriminator outputs a sinusoidal signal with a phase error.
The loop filter comprises a second-order frequency-locked loop filter and a third-order phase-locked loop filter, the second-order frequency-locked loop filter carries out filtering and denoising on the frequency error output by the frequency discriminator, the third-order phase-locked loop filter carries out filtering and denoising on the phase error output by the phase discriminator, and the loop filter carries out normalization processing on the outputs of the second-order frequency-locked loop filter and the third-order phase-locked loop filter to obtain a low-frequency direct-current component.
The output of the second-order frequency discriminator passes through a first-order filter, the output of the third-order phase discriminator passes through a second-order filter, the error is subjected to low-pass filtering and smoothing after filtering, voltage is output, the voltage-controlled oscillator outputs instantaneous frequency and phase, and the frequency and phase are fed back as the frequency phase of a new input signal in a compensation mode, so that the same frequency and phase of the input signal and the output signal are realized.
In the embodiment of the present invention, the discriminator uses the implementation algorithm of ATAN2(cross product, dot), which outputs the sine signal divided by the sampling time in seconds, to more accurately approximate the real frequency error. The phase detector uses the implementation algorithm ATAN2(Q, I), and returns the result in radians. The frequency detector and the phase detector are specifically realized as follows:
cross=I(n-1)*Q(n)-I(n)*Q(n-1)
dot=I(n)*I(n-1)+Q(n)*Q(n-1)
the output of the frequency discriminator is: FD (1) ═ atan2(cross, dot)/(t)2-t1)
The phase discriminator outputs: PD (1) ═ atan2(Q (n), I (n))
Thus the output of the frequency discriminator isA frequency error value, the output of the phase discriminator isA phase error value. Due to the characteristics of the function ATAN2, the input error of the discriminator can keep linearity within the range of + -180, the linearity is good, and the frequency difference and the phase difference can be accurately estimated.
Two error signals from the discriminator are simultaneously input into a phase-locked loop filter assisted by a frequency-locked loop, the frequency-locked loop adjusts the frequency error, and the phase-locked loop carries out phase compensation on the result of the frequency-locked loop adjustment, so that the whole closed-loop system can quickly and accurately lock the input signals. In the structural design of the filter, a first-order filter is adopted as the filter of the frequency-locked loop, a second-order filter is adopted as the filter of the phase-locked loop, and the value of the coefficient is determined according to the loop bandwidth of the system.
As shown in fig. 3, which is a structure diagram of a third-order pll assisted by a second-order pll, wherein,
a second-order frequency-locked loop filter: noise bandwidth BL=0.53·ω0Known as BL30, then ω0=56.6038。
Coefficient cf1 → a2ω0=1.414ω0=80.0378
Coefficient cf2 → ω0 2=3204
A third order phase-locked loop filter: noise bandwidth BL=0.7845·ω0Known as BL60, then ω0=76.4818。
Coefficient cp1 → b3ω0=2.4ω0=183.5564
Coefficient cp2 → a3ω0 2=1.1ω0=6434.5
Coefficient cp3 → ω0 3=447380
Output of the second order frequency locked loop filter:
output of the third order phase locked loop filter:
the output of the loop filter is normalized by a second-order frequency-locked loop filter and a third-order phase-locked loop filter, and the order is as follows:
the output of the filter is therefore:
and carrying out linearization processing on the output to obtain linear normalized filter output:
LP(1)=2·LP(2)-LP(3)+cf·FD'+cp·PD'
the frequency controlled characteristics of the voltage controlled oscillator are: omegao(t)=ωr+Aovc(t),ωrIs a control voltage vcFree-running angular frequency at 0, AoIs the voltage control sensitivity, which is in units of (radians/sec)/volt. The phase control characteristic is as follows:
the phase is the integral of the frequency and the change in phase is instantaneous, so the phase-controlled characteristic can be simplified to:
the system for realizing carrier tracking provided by the embodiment of the invention comprises a novel second-order frequency-locked loop-assisted third-order phase-locked loop consisting of the frequency-locked loop and the phase-locked loop, wherein the frequency-locked loop is used for carrying out frequency tracking, the phase-locked loop is used for carrying out phase compensation after tracking, and the frequency-locked loop and the phase-locked loop are combined to realize fast and high-precision carrier tracking in a mode of combining the frequency-locked loop and the phase-locked loop under different conditions.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (6)
1. An implementation system for carrier tracking, the system comprising a discriminator, a loop filter, a voltage controlled oscillator, and a resonator, wherein,
the discriminator has two paths of inputs, one path of input is from the output of the resonator, the other path of input is from the output of the voltage-controlled oscillator, the discriminator calculates the phase error and the frequency error of the two inputs and converts the phase error and the frequency error into voltage output;
the loop filter carries out low-pass filtering on the output voltage of the discriminator to obtain a voltage direct-current component;
and the voltage-controlled oscillator continuously accumulates the phase of the voltage direct-current component output by the loop filter, converts the voltage into phase output, and adjusts the amplitude of the voltage change through the voltage-controlled sensitivity coefficient to obtain the changed phase output.
2. The system of claim 1, wherein the discriminator comprises a frequency detector and a phase detector, each of the frequency detector and the phase detector having two inputs, one input from the output of the resonator and the other input from the output of the voltage controlled oscillator.
3. The system according to claim 2, wherein the frequency discriminator performs point and cross calculation on the two inputs, and divides the point and cross calculation by the sampling time after calculation of a function ATAN2 to output a frequency error; the phase detector outputs a phase error through the calculation of a function ATAN2 on the two paths of input.
4. The system of claim 3, wherein the frequency detector outputs a sinusoidal signal with a frequency approximating the true frequency error and the phase detector outputs a sinusoidal signal with a phase error.
5. The system according to any one of claims 2 to 4, wherein the loop filter comprises a second order frequency-locked loop filter and a third order phase-locked loop filter, the second order frequency-locked loop filter filters and denoises the frequency error output by the frequency discriminator, the third order phase-locked loop filter filters and denoises the phase error output by the phase discriminator, and the loop filter normalizes the outputs of the second order frequency-locked loop filter and the third order phase-locked loop filter to obtain the low-frequency DC component.
6. The system according to claim 5, wherein the second order frequency-locked loop filter filters the frequency error output by the frequency discriminator to remove high frequency components and output low frequency direct current components; and the third-order phase-locked loop filter filters the phase error output by the phase discriminator, removes high-frequency components and outputs low-frequency direct-current components.
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US11411568B1 (en) * | 2021-08-31 | 2022-08-09 | Guangdong University Of Technology | Beidou signal tracking system with nonlinear phase-locked loop |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4580107A (en) * | 1984-06-06 | 1986-04-01 | The United States Of America As Represented By The Secretary Of The Air Force | Phase lock acquisition system having FLL for coarse tuning and PLL for fine tuning |
US6650682B1 (en) * | 1999-04-30 | 2003-11-18 | University Of New Mexico | Bi-directional short pulse ring laser |
CN101931404A (en) * | 2010-06-21 | 2010-12-29 | 胡伟东 | Phase lock technique-based microwave carbon testing frequency synthesizer |
CN103297042A (en) * | 2013-06-24 | 2013-09-11 | 中国科学院微电子研究所 | Charge pump phase-locked loop circuit capable of being locked quickly |
CN104345323A (en) * | 2013-07-24 | 2015-02-11 | 安凯(广州)微电子技术有限公司 | GPS satellite signal carrier loop tracking method and device |
CN107305253A (en) * | 2016-04-21 | 2017-10-31 | 大唐半导体设计有限公司 | A kind of receiver tracking device and the method for realizing receiver tracking |
CN109889195A (en) * | 2019-01-31 | 2019-06-14 | 西南电子技术研究所(中国电子科技集团公司第十研究所) | Frequency locking ring assists phase locked loop fast lock method |
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- 2019-07-02 CN CN201910589075.0A patent/CN112179329A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4580107A (en) * | 1984-06-06 | 1986-04-01 | The United States Of America As Represented By The Secretary Of The Air Force | Phase lock acquisition system having FLL for coarse tuning and PLL for fine tuning |
US6650682B1 (en) * | 1999-04-30 | 2003-11-18 | University Of New Mexico | Bi-directional short pulse ring laser |
CN101931404A (en) * | 2010-06-21 | 2010-12-29 | 胡伟东 | Phase lock technique-based microwave carbon testing frequency synthesizer |
CN103297042A (en) * | 2013-06-24 | 2013-09-11 | 中国科学院微电子研究所 | Charge pump phase-locked loop circuit capable of being locked quickly |
CN104345323A (en) * | 2013-07-24 | 2015-02-11 | 安凯(广州)微电子技术有限公司 | GPS satellite signal carrier loop tracking method and device |
CN107305253A (en) * | 2016-04-21 | 2017-10-31 | 大唐半导体设计有限公司 | A kind of receiver tracking device and the method for realizing receiver tracking |
CN109889195A (en) * | 2019-01-31 | 2019-06-14 | 西南电子技术研究所(中国电子科技集团公司第十研究所) | Frequency locking ring assists phase locked loop fast lock method |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11411568B1 (en) * | 2021-08-31 | 2022-08-09 | Guangdong University Of Technology | Beidou signal tracking system with nonlinear phase-locked loop |
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