CN112152572A - Signal receiving circuit and signal transmission device capable of resisting ground potential drift - Google Patents

Signal receiving circuit and signal transmission device capable of resisting ground potential drift Download PDF

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Publication number
CN112152572A
CN112152572A CN202011056141.7A CN202011056141A CN112152572A CN 112152572 A CN112152572 A CN 112152572A CN 202011056141 A CN202011056141 A CN 202011056141A CN 112152572 A CN112152572 A CN 112152572A
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signal
logic switch
contact
output port
comparison input
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CN112152572B (en
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李智
赵建中
周玉梅
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers

Abstract

The present disclosure provides a signal receiving circuit and a signal transmission device resistant to ground potential drift, wherein the signal receiving circuit includes: the circuit comprises a first phase shift circuit, a second phase shift circuit, a differential comparator and a reference voltage switching circuit; the first phase shift circuit includes: the circuit comprises a first input port, a first resistor, a first capacitor and a first output port; the second phase shift circuit includes: the second input port, the second resistor, the second capacitor and the second output port; the reference voltage switching circuit includes: the first logic switch, the second logic switch, the third logic switch and the fourth logic switch are connected with the reference voltage source; the differential comparator includes: a first positive comparison input terminal, a second positive comparison input terminal, a first negative comparison input terminal, a second negative comparison input terminal and an output port.

Description

Signal receiving circuit and signal transmission device capable of resisting ground potential drift
Technical Field
The present disclosure relates to the field of integrated circuit design, and in particular, to a signal receiving circuit and a signal transmitting apparatus capable of resisting ground potential drift.
Background
Digital interfaces of integrated circuit systems generally use high and low levels to represent logic states of signals, such as TTL, CMOS, LVTTL, LVCMOS, and the like. The signal or power transmission between systems needs to pass through a ground loop. In order to save costs, a signal ground loop and a power ground loop are often shared, and current exists in the ground loop, so that a potential difference exists between the two systems due to the inevitable impedance of the ground loop.
In the prior art, the influence of ground potential drift on digital signal transmission is more obvious, and when a level signal received by a receiving end has a potential difference compared with a level signal sent by a sending end, when the value of the potential difference is large to a certain degree, a high level signal received by the receiving end is lower than the lower threshold of a high level effective signal of the receiving end, or a low level signal received by the receiving end is higher than the upper threshold of a low level effective signal of the receiving end, the above conditions all cause data transmission failure of the signal sending end and the receiving end. This situation is increasingly severe in small-swing signal transmission systems or high-power transmission systems.
Therefore, in the course of implementing the disclosed concept, the inventors found that there are at least the following problems in the related art: ground potential drift causes distortion of transmitted signals, and a ground loop has a complex design structure and high cost.
Disclosure of Invention
In view of the above, the present disclosure provides a signal receiving circuit resistant to ground potential drift.
One aspect of the present disclosure provides a signal receiving circuit resistant to ground potential drift, including: the phase shifter comprises a first phase shift circuit, a second phase shift circuit, a differential comparator and a reference voltage switching circuit.
According to an embodiment of the present disclosure, a first phase shift circuit includes: the circuit comprises a first input port, a first resistor, a first capacitor and a first output port, wherein two ends of the first input port are respectively connected with a preset input port and a first end of the first resistor;
according to an embodiment of the present disclosure, the second phase shift circuit includes: the first input port, the second resistor, the second capacitor and the second output port are connected, wherein two ends of the second input port are respectively connected with the preset input port and a first end of the second resistor, a second end of the second resistor is connected with the second output port, a first end of the second capacitor is connected between a second end of the second resistor and the second output port, and a second end of the second capacitor is grounded;
according to an embodiment of the present disclosure, the reference voltage switching circuit is configured to input a first negative comparison input signal and a second negative comparison input signal to the differential comparator, and the reference voltage switching circuit is further configured to receive a feedback signal from an output port of the differential comparator;
according to an embodiment of the present disclosure, a differential comparator includes: the differential comparator comprises a first positive comparison input end, a second positive comparison input end, a first negative comparison input end, a second negative comparison input end and an output port, wherein the first positive comparison input end is connected with the first output port, the second positive comparison input end is connected with the second output port, the first negative comparison input end is used for receiving a first negative comparison input signal, the second negative comparison input end is used for receiving a second negative comparison input signal, and the output port is used for outputting a feedback signal of the differential comparator.
According to an embodiment of the present disclosure, a reference voltage switching circuit includes: the reference voltage source, the first logic switch, the second logic switch, the third logic switch and the fourth logic switch, wherein the anode of the reference voltage source is connected with the second contact of the first logic switch and the first contact of the fourth logic switch, the cathode of the reference voltage source is connected with the first contact of the second logic switch and the second contact of the third logic switch, the first contact of the first logic switch and the first contact of the third logic switch are both connected with the first negative comparison input end, the second contact of the second logic switch and the second contact of the fourth logic switch are both connected with the second negative comparison input end, and the third contact of the first logic switch, the third contact of the second logic switch, the third contact of the third logic switch and the third contact of the fourth logic switch are all connected with the output port.
According to the embodiment of the disclosure, the phase value of the offset between the voltage signal of the first output port and the voltage signal of the preset input port is smaller than the phase value of the offset between the voltage signal of the second output port and the voltage signal of the preset input port.
According to an embodiment of the present disclosure, an input port is presetHas a ground potential drift signal of VGThe voltage signal of the first output port is VS1+VGThe voltage signal of the second output port is VS2+VGThe differential signal VP of the second positive comparison input terminal is equal to VS1-VS2。
According to an embodiment of the present disclosure, when the differential signal of the second positive comparison input terminal is greater than or equal to the second negative comparison input signal, the output port outputs a high level, and when the differential signal of the second positive comparison input terminal is smaller than the second negative comparison input signal, the output port outputs a low level.
According to the embodiment of the disclosure, when the output port outputs a low level, the first contact of the first logic switch is connected with the second contact of the first logic switch, the first contact of the second logic switch is connected with the second contact of the second logic switch, the first contact of the third logic switch is disconnected with the second contact of the third logic switch, the first contact of the fourth logic switch is disconnected with the second contact of the fourth logic switch, and the second negative comparison input signal is equal to the voltage value of the reference voltage source.
According to the embodiment of the disclosure, when the output port outputs a low level, the differential signal of the second positive comparison input terminal gradually increases and exceeds the second negative comparison input signal, and the output port of the differential comparator outputs a high level.
According to the embodiment of the disclosure, when the output port outputs a high level, the first contact of the third logic switch is connected to the second contact of the third logic switch, the first contact of the fourth logic switch is connected to the second contact of the fourth logic switch, the first contact of the first logic switch is disconnected from the second contact of the first logic switch, the first contact of the second logic switch is disconnected from the second contact of the second logic switch, and the second negative comparison input signal is equal to an opposite number of the voltage value of the reference voltage source.
According to the embodiment of the present disclosure, when the output port outputs a high level, the differential signal of the second positive comparison input terminal is gradually decreased and lower than the second negative comparison input signal, the output port outputs a low level.
Another aspect of the present disclosure provides a signal transmission apparatus including the above-mentioned signal receiving circuit resistant to ground potential drift.
According to the embodiment of the disclosure, for the ground potential drift signal contained in the preset input port, the first phase shift circuit and the second phase shift circuit are respectively designed according to two different phase shift values, the two phase shift circuits are used for carrying out phase shift on the voltage signal of the preset input port, and the differential comparator is used for eliminating the ground potential drift component in the signal of the preset input port. In addition, the reference voltage switching circuit designed by the invention can identify the signal edge, can effectively judge the change state of the level signal in the digital signal transmission process, solves the problem that the ground potential drift causes the transmitted signal to be distorted, enables the signal of the output port to follow the actual voltage signal received by the preset input end, and realizes the effective transmission of the actual signal in the path between the transmitting end and the receiving end. The circuit designed by the invention is applied to the transmission process of various signals with different level swings, can effectively eliminate the influence of ground potential drift on the signals, and avoids the use of large-swing signals. The circuit designed by the invention has a simple structure, reduces the cost of the ground loop structure design, and has a good application prospect.
Drawings
The above and other objects, features and advantages of the present disclosure will become more apparent from the following description of embodiments of the present disclosure with reference to the accompanying drawings, in which:
fig. 1 schematically illustrates a signal transmission path diagram affected by ground potential drift according to the present disclosure;
fig. 2 schematically illustrates a schematic diagram of a signal receiving circuit of the present disclosure that is resistant to ground potential drift;
fig. 3 schematically illustrates a waveform diagram of a key node of a signal receiving circuit resistant to ground potential drift according to an embodiment of the disclosure.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the disclosure. It may be evident, however, that one or more embodiments may be practiced without these specific details. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The terms "comprises," "comprising," and the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It is noted that the terms used herein should be interpreted as having a meaning that is consistent with the context of this specification and should not be interpreted in an idealized or overly formal sense.
Where a convention analogous to "at least one of A, B and C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a circuit cell having at least one of A, B and C" would include but not be limited to circuit cells having a alone, B alone, C alone, a and B together, a and C together, B and C together, and/or A, B, C together, etc.). Where a convention analogous to "A, B or at least one of C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a circuit cell having at least one of A, B or C" would include but not be limited to circuit cells having a alone, B alone, C alone, a and B together, a and C together, B and C together, and/or A, B, C together, etc.).
The embodiment of the disclosure provides a signal receiving circuit resistant to ground potential drift, wherein a first phase shift circuit and a second phase shift circuit are respectively designed according to two different phase shift values, signals received by the first phase shift circuit and the second phase shift circuit both comprise ground potential drift signals, and the two phase shift circuits are used for carrying out phase shift on voltage signals containing the ground potential drift signals, so that the influence of the ground potential drift in a signal transmission path on the transmitted signals is solved.
Fig. 1 schematically illustrates a signal transmission path diagram affected by ground potential drift according to the present disclosure.
As shown in FIG. 1, a communication loop between a system A and a system B comprises a ground loop, and an actual voltage signal sent by the system A to the system B is VSTrue voltage signal VSThe voltage signal is transmitted to a system B through a ground loop, and the voltage signal received by the system B is VIIdeally VI＝VS。
The systems a, B may be integrated circuit systems between which there is a communication signal of a ground loop.
There is a current I between the ground loops of system A and system BGAnd a loop resistance RGFrom ohm's law, the actual condition VI＝VS+IG×RGIf I isGOr RGTo a certain extent, at VIDuring the signal value being at high level, VIMay be less than the lower threshold of the system B high level active signal, at VIDuring the period when the signal value is at low level, VIMay be greater than the upper threshold of the system B low level active signal, causing a signal transmission failure between system a and system B. In view of the above, the present invention provides a signal receiving circuit resistant to ground potential drift.
Fig. 2 schematically illustrates a schematic diagram of a signal receiving circuit resistant to ground potential drift according to the present disclosure.
As shown in fig. 2, VIN is a signal of a preset input port, VOUT is a signal of an output port, R1 is a resistance of a first phase shift circuit, C1 is a capacitance of the first phase shift circuit, R2 is a resistance of a second phase shift circuit, C2 is a capacitance of the second phase shift circuit, V1 is a reference voltage source, S1L is a first logic switch, S2L is a second logic switch, S3H is a third logic switch, S4H is a fourth logic switch, contacts 1 to 3 of S1L respectively represent first to third contacts of the first logic switch, contacts 1 to 3 of S2L respectively represent first to third contacts of the second logic switch, contacts 1 to 3 of S3H respectively represent first to third contacts of the third logic switch, contacts 1 to 3 of S4H respectively represent first to third contacts of the fourth logic switch, represent a second positive to positive differential signal of a differential comparator VN, and a negative differential comparator signal of a differential comparator input terminal, namely, the reference voltage switching circuit is used for the second negative comparison input signal input to the differential comparator.
An embodiment of the present disclosure provides a signal receiving circuit resistant to ground potential drift, including: the phase shifter comprises a first phase shift circuit, a second phase shift circuit, a differential comparator and a reference voltage switching circuit.
According to an embodiment of the present disclosure, a first phase shift circuit includes: the first input port, the first resistor, the first capacitor and the first output port, wherein two ends of the first input port are respectively connected with the preset input port and a first end of the first resistor, a second end of the first resistor is connected with the first output port, a first end of the first capacitor is connected between a second end of the first resistor and the first output port, and a second end of the first capacitor is grounded.
According to the embodiment of the disclosure, the phase value of the offset between the voltage signal of the first output port and the voltage signal of the preset input port is α, the phase value of the offset represents the inclination degree of the voltage signal curve of the first output port, and the smaller the phase value α of the offset, the larger the inclination degree of the voltage signal curve of the first output port.
According to an embodiment of the present disclosure, the second phase shift circuit includes: the second input port, the second resistor, the second capacitor and the second output port, wherein two ends of the second input port are respectively connected with the preset input port and the first end of the second resistor, the second end of the second resistor is connected with the second output port, the first end of the second capacitor is connected between the second end of the second resistor and the second output port, and the second end of the second capacitor is grounded.
According to the embodiment of the disclosure, the product of the first resistance and the first capacitance of the first phase shift circuit is the time constant of the first phase shift circuit, the product of the second resistance and the second capacitance of the second phase shift circuit is the time constant of the second phase shift circuit, the time constant of the first phase shift circuit is different from the time constant of the second phase shift circuit, the time constant of the second phase shift circuit is larger than the time constant of the first phase shift circuit, and the larger the time constant of the first or second phase shift circuit is, the more obvious the phase shift degree of the first or second phase shift circuit is.
According to the embodiment of the disclosure, the phase value of the offset between the voltage signal of the second output port and the voltage signal of the preset input port is β, the phase value of the offset represents the inclination degree of the voltage signal curve of the second output port, and the smaller the phase value β of the offset, the larger the inclination degree of the voltage signal curve of the second output port.
According to the embodiment of the disclosure, the phase value α of the offset between the voltage signal of the first output port and the voltage signal of the preset input port is smaller than the phase value β of the offset between the voltage signal of the second output port and the voltage signal of the preset input port, i.e., α < β.
According to the embodiment of the disclosure, the first phase shift circuit and the second phase shift circuit correspondingly generate the voltage signal of the first output port and the voltage signal of the second output port with different slopes through alpha < beta, so that a theoretical basis is provided for eliminating the ground potential drift signal.
According to the embodiment of the disclosure, a current I exists between the ground loopsGAnd a loop resistance RGGround potential drift value is VG＝IG×RGThe signal received by the receiving end of the system B, i.e. the signal received by the preset input end of the signal receiving circuit of the invention is VI＝VS+VG。
According to the embodiment of the disclosure, the signal received by the preset input end is correspondingly output through the first phase shift circuit and the second phase shift point circuit, and the voltage signal V of the first output portS1+VGVoltage signal V of second output portS2+VGThe voltage signal output by the first output port and without the ground potential drift signal is VS1Second input ofThe voltage signal output by the output port after the ground potential drift signal is removed is VS2。
According to the embodiment of the disclosure, the ground potential drift signal of the voltage of the preset input port is VGThe voltage signal of the first output port is VS1+VGThe voltage signal of the second output port is VS2+VGThe differential signal VP of the second positive comparison input terminal is equal to VS1+VG-(VS2+VG)＝VS1-VS2。
According to the embodiment of the disclosure, the ground potential drift signal VG in the signal of the preset input port is eliminated through the differential operation of the differential comparator.
Fig. 3 schematically illustrates a waveform diagram of a key node of a signal receiving circuit resistant to ground potential drift according to an embodiment of the disclosure.
As shown in FIG. 3, when the actual voltage signal V received by the predetermined input terminalSWhen a forward transition from low level to high level is made, i.e. the actual voltage signal VSA rising edge occurs, and since α < β, the rising edge of the voltage signal of the first output port is steeper than the rising edge of the voltage signal of the second output port, and the slope of the voltage signal of the first output port is higher.
As shown in FIG. 3, when the actual voltage signal V received by the predetermined input terminalSAt a negative transition from high to low, i.e. the actual voltage signal VSA falling edge occurs, and since α < β, the falling edge of the voltage signal of the first output port is steeper than the falling edge of the voltage signal of the second output port, and the slope of the voltage signal of the first output port is higher.
According to the embodiment of the present disclosure, when the actual voltage signal V received by the preset input terminalSWhen a forward jump occurs, VS1Will be greater than V at the jump edge positionS2That is, the differential signal VP at the second positive comparison input terminal at the rising edge is greater than 0, when the actual voltage signal V received by the preset input terminal is greater than 0SWhen a negative jump occurs, VS1Will be less than V at the location of the jump edgeS2I.e. second positive ratio at falling edgeThe differential signal VP at the upper input is less than 0.
According to the embodiment of the disclosure, the reference voltage switching circuit is configured to input a first negative comparison input signal and a second negative comparison input signal to the differential comparator, and the reference voltage switching circuit is further configured to receive a feedback signal from an output port of the differential comparator.
According to the embodiment of the disclosure, the reference voltage switching circuit selects to connect the positive pole and the negative pole of the reference voltage source V1 to the front of the first negative comparison input end and the second negative comparison input end of the differential comparator in a positive-direction connection mode or a reverse-direction connection mode according to the feedback signal of the output port of the current differential comparator.
According to an embodiment of the present disclosure, a reference voltage switching circuit includes: the reference voltage source, the first logic switch, the second logic switch, the third logic switch and the fourth logic switch, wherein the anode of the reference voltage source is connected with the second contact of the first logic switch and the first contact of the fourth logic switch, the cathode of the reference voltage source is connected with the first contact of the second logic switch and the second contact of the third logic switch, the first contact of the first logic switch and the first contact of the third logic switch are both connected with the first negative comparison input end, the second contact of the second logic switch and the second contact of the fourth logic switch are both connected with the second negative comparison input end, and the third contact of the first logic switch, the third contact of the second logic switch, the third contact of the third logic switch and the third contact of the fourth logic switch are all connected with the output port.
According to the embodiment of the disclosure, the reference voltage switching circuit is simple in design structure, consists of four logic switches, is sensitive in response speed and high in execution efficiency, and provides guarantee for the voltage signal of the output port of the differential comparator to follow the actual voltage signal received by the preset input end.
According to the embodiment of the disclosure, when the third contact of the first logic switch is connected with the third contact of the second logic switch at a low level, the first contact of the first logic switch is connected with the second contact of the first logic switch, and the first contact of the second logic switch is connected with the second contact of the second logic switch; when the third contact of the third logic switch is connected with the third contact of the fourth logic switch at a high level, the first contact of the third logic switch is connected with the second contact of the third logic switch, and the first contact of the fourth logic switch is connected with the second contact of the fourth logic switch.
According to an embodiment of the present disclosure, a differential comparator includes: the differential comparator comprises a first positive comparison input end, a second positive comparison input end, a first negative comparison input end, a second negative comparison input end and an output port, wherein the first positive comparison input end is connected with the first output port, the second positive comparison input end is connected with the second output port, the first negative comparison input end is used for receiving a first negative comparison input signal, the second negative comparison input end is used for receiving a second negative comparison input signal, and the output port is used for outputting a feedback signal of the differential comparator.
According to an embodiment of the present disclosure, the differential comparator is configured to compare the differential signal at the second positive comparison input terminal with the second negative comparison input signal.
According to an embodiment of the present disclosure, when the differential signal of the second positive comparison input terminal is greater than or equal to the second negative comparison input signal, the output port outputs a high level, and when the differential signal of the second positive comparison input terminal is smaller than the second negative comparison input signal, the output port outputs a low level.
According to the embodiment of the disclosure, the differential signal of the second positive comparison input end is obtained through the first phase shift circuit and the second phase shift circuit, and the second negative comparison input signal is obtained through the reference voltage switching circuit.
According to the embodiment of the disclosure, when the output port outputs a low level, the first contact of the first logic switch is connected with the second contact of the first logic switch, the first contact of the second logic switch is connected with the second contact of the second logic switch, the first contact of the third logic switch is disconnected with the second contact of the third logic switch, the first contact of the fourth logic switch is disconnected with the second contact of the fourth logic switch, and the second negative comparison input signal is equal to the voltage value of the reference voltage source.
According to the embodiment of the present disclosure, the voltage value of the reference voltage source V1 is optionally VREF, and the value of VREF is determined according to the transmitted actual voltage signal VSIs determined.
According to the embodiment of the disclosure, when the output port outputs a low level, the differential signal of the second positive comparison input terminal gradually increases and exceeds the second negative comparison input signal, and the output port of the differential comparator outputs a high level.
According to the embodiment of the present disclosure, optionally, in the initial state, the output port of the differential comparator outputs a low level, the second negative comparison input signal VN is equal to VREF, and when the actual voltage signal V received by the preset input terminal is greater than VREF, the second negative comparison input signal VN is equal to VREFSWhen a forward jump occurs, i.e. VSWhen the VP is larger than VN, the differential comparator can accurately identify the rising edge, and the output port of the differential comparator outputs high level and outputs high level.
According to the embodiment of the disclosure, the invention realizes the purpose of carrying out the actual voltage signal V received by the preset input endSEffective identification when rising edge occurs, simultaneously, the output port outputs high level, the signal of the output port follows the actual voltage signal received by the preset input end and is compared with the actual voltage signal V received by the preset input endSThe consistency is kept, and the problem that the transmitted high-level signal is distorted due to ground potential drift is solved.
According to the embodiment of the disclosure, when the output port outputs a high level, the first contact of the third logic switch is connected to the second contact of the third logic switch, the first contact of the fourth logic switch is connected to the second contact of the fourth logic switch, the first contact of the first logic switch is disconnected from the second contact of the first logic switch, the first contact of the second logic switch is disconnected from the second contact of the second logic switch, and the second negative comparison input signal is equal to an opposite number of the voltage value of the reference voltage source.
According to the embodiment of the present disclosure, when the output port outputs a high level, the differential signal of the second positive comparison input terminal is gradually decreased and lower than the second negative comparison input signal, the output port outputs a low level.
According to the embodiment of the disclosure, the output port outputs a low level, the second negative comparison input signal VN is equal to-VREF, and when the actual voltage signal V received by the preset input terminal isSWhen a negative jump occurs, i.e. VSAnd when the VP is less than VN, the differential comparator can accurately identify the falling edge, and the output port of the differential comparator outputs a low level.
According to the embodiment of the disclosure, the invention realizes the purpose of carrying out the actual voltage signal V received by the preset input endSEffective identification when falling edge occurs, simultaneously, the output port outputs low level, the signal of the output port follows the actual voltage signal received by the preset input end and is compared with the actual voltage signal V received by the preset input endSThe consistency is kept, and the problem that the ground potential drift causes the distortion of the transmitted low-level signal is solved.
According to the embodiment of the disclosure, the circuit designed by the invention is applied to various signal transmission processes with different level swings, can effectively eliminate the influence of ground potential drift on signals, avoids the use of large-swing signals, and has good application prospect.
Another aspect of the present disclosure provides a signal transmission apparatus including the above-mentioned signal receiving circuit resistant to ground potential drift.
The signal transmission device comprises circuits and circuit units/modules with different functions in the disclosure, such as a first phase shift circuit, a second phase shift circuit, a differential comparator and a reference voltage switching circuit. The signal transmission device may include, but is not limited to, a railroad communication device, a medical device, a home appliance. The railway communication device comprises a power supply screen, an interlocking cabinet, a lightning protection device and an electrified relay box; the medical equipment comprises a nuclear magnetic resonance instrument, a B-ultrasonic instrument and/or an electrocardiograph, and the household appliances comprise a television, an air conditioner, a humidifier, a washing machine, a remote intelligent lamp and an intelligent gas stove.
Those skilled in the art will appreciate that various combinations and/or combinations of features recited in the various embodiments and/or claims of the present disclosure can be made, even if such combinations or combinations are not expressly recited in the present disclosure. In particular, various combinations and/or combinations of the features recited in the various embodiments and/or claims of the present disclosure may be made without departing from the spirit or teaching of the present disclosure. All such combinations and/or associations are within the scope of the present disclosure.
The embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the present disclosure, and such alternatives and modifications are intended to be within the scope of the present disclosure.

Claims (10)

1. A ground potential drift resistant signal receiving circuit, comprising: the circuit comprises a first phase shift circuit, a second phase shift circuit, a differential comparator and a reference voltage switching circuit;
wherein the first phase shift circuit comprises: the circuit comprises a first input port, a first resistor, a first capacitor and a first output port, wherein two ends of the first input port are respectively connected with a preset input port and a first end of the first resistor, a second end of the first resistor is connected with the first output port, a first end of the first capacitor is connected between a second end of the first resistor and the first output port, and a second end of the first capacitor is grounded;
wherein the second phase shift circuit comprises: the circuit comprises a second input port, a second resistor, a second capacitor and a second output port, wherein two ends of the second input port are respectively connected with a preset input port and a first end of the second resistor, a second end of the second resistor is connected with the second output port, a first end of the second capacitor is connected between the second end of the second resistor and the second output port, and a second end of the second capacitor is grounded;
the reference voltage switching circuit is used for inputting a first negative comparison input signal and a second negative comparison input signal to the differential comparator, and is also used for receiving a feedback signal of an output port of the differential comparator;
wherein the differential comparator comprises: the differential comparator comprises a first positive comparison input end, a second positive comparison input end, a first negative comparison input end, a second negative comparison input end and an output port, wherein the first positive comparison input end is connected with the first output port, the second positive comparison input end is connected with the second output port, the first negative comparison input end is used for receiving the first negative comparison input signal, the second negative comparison input end is used for receiving the second negative comparison input signal, and the output port is used for outputting a feedback signal of the differential comparator.
2. The signal receiving circuit of claim 1, wherein the reference voltage switching circuit comprises: a reference voltage source, a first logic switch, a second logic switch, a third logic switch, a fourth logic switch, wherein the anode of the reference voltage source is connected with the second contact of the first logic switch and the first contact of the fourth logic switch, the negative pole of the reference voltage source is connected with the first contact of the second logic switch and the second contact of the third logic switch, the first contact of the first logic switch and the first contact of the third logic switch are both connected with the first negative comparison input end, the second contact of the second logic switch and the second contact of the fourth logic switch are both connected with the second negative comparison input end, and the third contact of the first logic switch, the third contact of the second logic switch, the third contact of the third logic switch and the third contact of the fourth logic switch are all connected with the output port.
3. The signal receiving circuit of claim 1, wherein a phase value of an offset between the voltage signal of the first output port and the voltage signal of the preset input port is smaller than a phase value of an offset between the voltage signal of the second output port and the voltage signal of the preset input port.
4. The signal receiving circuit of claim 3, wherein the ground drift signal of the voltage of the predetermined input port is VGThe voltage signal of the first output port is VS1+VGThe voltage signal of the second output port is VS2+VGA differential signal VP ═ V at the second positive comparison input terminalS1-VS2。
5. The signal receiving circuit of claim 1, wherein the output port outputs a high level when the differential signal at the second positive comparison input terminal is greater than or equal to the second negative comparison input signal, and outputs a low level when the differential signal at the second positive comparison input terminal is less than the second negative comparison input signal.
6. The signal receiving circuit of claim 5, wherein when the output port outputs a low level, the first contact of the first logic switch is closed to the second contact of the first logic switch, the first contact of the second logic switch is closed to the second contact of the second logic switch, the first contact of the third logic switch is open to the second contact of the third logic switch, the first contact of the fourth logic switch is open to the second contact of the fourth logic switch, and the second negative comparison input signal is equal to the voltage value of the reference voltage source.
7. The signal receiving circuit of claim 6, wherein when the output port outputs a low level, the differential signal at the second positive comparison input terminal increases gradually and exceeds the second negative comparison input signal, the output port of the differential comparator outputs a high level.
8. The signal receiving circuit of claim 5, wherein when the output port outputs a high level, the first contact of the third logic switch is connected to the second contact of the third logic switch, the first contact of the fourth logic switch is connected to the second contact of the fourth logic switch, the first contact of the first logic switch is disconnected from the second contact of the first logic switch, the first contact of the second logic switch is disconnected from the second contact of the second logic switch, and the second negative comparison input signal is equal to an opposite of the voltage value of the reference voltage source.
9. The signal receiving circuit of claim 8, wherein when the output port outputs a high level, the differential signal at the second positive comparison input terminal decreases gradually and is lower than the second negative comparison input signal, and the output port outputs a low level.
10. A signal transmission apparatus, comprising: a signal receiving circuit as claimed in any one of claims 1 to 9.
CN202011056141.7A 2020-09-30 2020-09-30 Signal receiving circuit capable of resisting ground potential drift and signal transmission device Active CN112152572B (en)

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