CN109391277A - A kind of cascade bus signal receiving circuit and control system - Google Patents
A kind of cascade bus signal receiving circuit and control system Download PDFInfo
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- CN109391277A CN109391277A CN201811505454.9A CN201811505454A CN109391277A CN 109391277 A CN109391277 A CN 109391277A CN 201811505454 A CN201811505454 A CN 201811505454A CN 109391277 A CN109391277 A CN 109391277A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
Abstract
The invention belongs to electronic technology field, a kind of cascade bus signal receiving circuit and control system are disclosed, wherein a kind of cascade bus signal receiving circuit is set in power cable, including first diode, signal receiving module, processor and the 4th capacitor；The signal receiving module is electrically connected with the anode of first diode, the cathode of first diode and processor respectively；The signal receiving module for parsing control signal, and sends control signals to processor；The processor, for being controlled according to control signal slave load.A kind of cascade bus control system includes power supply unit, host, at least one slave and the load of at least one slave；Each described slave includes the current bypass circuit being connected in parallel and signal receiving circuit.The present invention can be suitable for fitted up house carry out smart home transformation；Signal noise present in signal receiving circuit can be also eliminated, conducive to accurately controlling slave load.
Description
Technical field
The invention belongs to electronic technology fields, and in particular to a kind of cascade bus signal receiving circuit and control system.
Background technique
Smart home be using house as platform, using comprehensive wiring technology, network communication technology, security precautions technology, from
Dynamic control technology, audio and video technology integrate the related facility of home life, construct efficient housing facilities and family's schedule thing
The management system of business promotes house security, convenience, comfort, artistry, and realizes the living environment of environmental protection and energy saving.For
Intelligentized control method is carried out to home equipment, needs to carry out data exchange with each home equipment, thus need to establish with it is each
The communication link of home equipment.
Currently, can be connected by buses such as RS-485, KNX, CAN, C-Bus, SCS-BUS, LonWorks, Modbus
Each home equipment realizes the control to home equipment.
For the method controlled at present home equipment, RS-485, KNX, CAN, C-Bus, SCS-BUS,
The buses such as LonWorks, Modbus are required to independent laying bus cable, need due to laying bus cable on wall or ground
On slot, the wall or ground for having fitted up house can be damaged, thus be not suitable for fitted up house carry out intelligence
It can household transformation.In the prior art, occurred being not required to by destroying finishing house wall or the hurtful home equipment in ground
Control system, however, in the prior art, control system, due to the characteristic of circuit itself, can generate letter when receiving control signal
Number noise, when control rate that signal is sent it is higher when, the presence of signal noise easily causes control signal not parse correctly
As a result, the control to home equipment brings adverse effect.
Summary of the invention
In order to solve the above problems existing in the present technology, it is an object of that present invention to provide a kind of receptions of cascade bus signal
Circuit and control system, signal receiving circuit can be received control signal by electrified cable, can be suitable for having fitted up
Residence carries out smart home transformation；In addition, cascade bus control system to existing house carry out smart home transformation while, can
Signal noise present in signal receiving circuit is eliminated, conducive to accurately controlling slave load.
The technical scheme adopted by the invention is as follows:
A kind of cascade bus signal receiving circuit, is set in power cable, including first diode, signal receive mould
Block, processor and the 4th capacitor；The signal receiving module respectively with the anode of first diode, first diode cathode and
The binding site and 3.3V power electric connection of processor electrical connection, the signal receiving module and processor；The signal receives mould
Block to parse control signal, and control signal is sent for detecting the pressure difference between the anode of first diode and cathode
To processor；The processor is electrically connected with slave load；The processor is carried out for being loaded according to control signal to slave
Control；One end of 4th capacitor is electrically connected with the cathode of first diode, and the other end of the 4th capacitor connects with signal
Receive module electrical connection.
Preferably, the signal receiving module includes third transistor, eleventh resistor, twelfth resistor and the four or three pole
Pipe；The base stage of the third transistor is electrically connected with the anode of first diode, the cathode of emitter and first diode is electrically connected
It connects, collector passes sequentially through eleventh resistor and twelfth resistor is electrically connected with the 4th capacitor；The base stage of 4th triode
It is electrically connected with the binding site of eleventh resistor and twelfth resistor, emitter is electrically connected with the 4th capacitor, collector and processor
Electrical connection；The collector of 4th triode and the binding site of processor and 3.3V power electric connection.
Preferably, the signal receiving circuit further includes the tenth resistance and thirteenth resistor；The both ends of tenth resistance
It is electrically connected respectively with the base stage of the anode of first diode and third transistor；The both ends of the thirteenth resistor are respectively with the 4th
The base stage and 3.3V power electric connection of triode.
Preferably, the signal receiving circuit further includes the first zener diode；The first zener diode setting exists
Between tenth resistance and third transistor, the anode of first zener diode is electrically connected with the tenth resistance, cathode and third
The base stage of triode is electrically connected.
Preferably, the signal receiving circuit further includes the second capacitor and third capacitor, the both ends point of second capacitor
It is not electrically connected with the collector of the base stage of third transistor, third transistor；The both ends of the third capacitor are respectively with the four or three
The collector of pole pipe, 3.3V power electric connection.
A kind of cascade bus control system, including power supply unit, host, at least one slave and at least one slave are negative
It carries, the slave and slave load are arranged in a one-to-one correspondence；First terminals of the power supply unit are electrically connected with each slave respectively
It connects, the second terminals of the power supply unit are electrically connected with host, and the host is electric with each slave, the load of each slave respectively
Connection；Each slave is electrically connected with a slave load respectively；The power supply unit, for passing through power cable to the master
Machine, each slave and each slave load supplying；The host, for leading to according to externally input control instruction
The power cable crossed between slave and host sends control signal to each slave；Each described slave is used for basis
The control signal that the host is sent controls the slave load being connected；Each described slave wraps
Signal receiving circuit described in any of the above embodiments is included, further includes current bypass circuit；The signal receiving circuit, for according to institute
The control signal for stating host transmission controls the slave load being connected；The current bypass circuit, is used for
The influence of leakage current and junction capacity to signal rising edge and failing edge in first diode is eliminated, the communication bit error rate is reduced.
Preferably, the host includes metal-oxide-semiconductor, TVS diode and host controller, the source electrode and TVS bis- of the metal-oxide-semiconductor
The anode electrical connection of pole pipe, drain electrode is electrically connected with the cathode of TVS diode, grid is electrically connected with host controller；The metal-oxide-semiconductor
Source electrode be electrically connected with the second terminals of power supply unit, the drain electrode of the metal-oxide-semiconductor respectively with current bypass circuit, signal receive
Circuit and slave load electrical connection；The host controller, for controlling the MOS according to the externally input control instruction
The on off operating mode of pipe, so that the voltage of the drain electrode of metal-oxide-semiconductor is in fluctuation status, fluctuation voltage is processed by the signal receiving circuit
The digital signal that processor can identify.
Preferably, the current bypass circuit includes first resistor, second resistance, the first triode and the second triode；
One end of the first resistor is electrically connected with the first terminals of power supply unit, and the other end of the first resistor passes through the second electricity
Resistance is electrically connected with the drain electrode of metal-oxide-semiconductor；The base stage of first triode is electrically connected with the binding site of first resistor and second resistance,
Collector is electrically connected with the base stage of the second triode, emitter is electrically connected with the drain electrode of metal-oxide-semiconductor；The current collection of second triode
Pole is electrically connected with the first terminals of power supply unit, emitter is electrically connected with the drain electrode of metal-oxide-semiconductor.
Preferably, the current bypass circuit further includes the 4th resistance and the second zener diode；Second pressure stabilizing two
The anode of pole pipe is electrically connected with the drain electrode of metal-oxide-semiconductor, cathode is electrically connected by the 4th resistance with the first terminals of power supply unit, institute
The binding site for stating the second zener diode and the 4th resistance is electric with the base stage of the collector of the first triode, the second triode respectively
Connection.
Preferably, the current bypass circuit further includes 3rd resistor, the 5th resistance, the 6th resistance and first capacitor；Institute
The both ends for stating 3rd resistor are electrically connected with the collector of the cathode of the second zener diode, the first triode respectively；Described 5th
The both ends of resistance are electrically connected with the first terminals of the collector of the second triode, power supply unit respectively；6th resistance
Both ends are electrically connected with the drain electrode of the emitter of the second triode, metal-oxide-semiconductor respectively；The both ends of the first capacitor are electric with first respectively
The drain electrode electrical connection of the binding site of resistance and second resistance, metal-oxide-semiconductor.
The invention has the benefit that
1) signal receiving circuit can by electrified cable receive control signal, can be suitable for fitted up house carry out
Smart home transformation；
2) the unified all slaves into circuit of host send control signal, and the signal receiving circuit in slave receives control
Signal is simultaneously parsed, if address information and this stapler machine in signal, respond the control instruction, then to be connected from
Machine load is controlled, and in the process, can be realized using existing power cable and be controlled slave load, without single
Bus cable is solely laid, the wall or ground for having fitted up house will not be damaged, therefore can be suitable for having fitted up
Residence carries out smart home transformation；
3) the current bypass circuit in slave can eliminate leakage current and knot in signal receiving circuit in first diode D1
Influence of the capacitor to signal rising edge and failing edge, avoids signal receiving circuit from parsing error signal, is conducive to accurately to slave
Load is controlled.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is the present invention
Some embodiments for those of ordinary skill in the art without creative efforts, can also basis
These attached drawings obtain other attached drawings.
Fig. 1 is a kind of control block diagram of cascade bus control system of the invention；
Fig. 2 is that a slave, the slave in a kind of cascade bus control system of the invention load and host and confession
The control block diagram of electric equipment；
Fig. 3 is the specific control block diagram of Fig. 2；
Fig. 4 is the circuit diagram of Fig. 3.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments, based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without making creative work, shall fall within the protection scope of the present invention.
Embodiment 1:
A kind of cascade bus signal receiving circuit, is set in power cable, as shown in figure 4, include first diode D1,
Signal receiving module, processor and the 4th capacitor C4；The anode of the first diode D1 and the first terminals of power supply unit
Electrical connection；The signal receiving module respectively with the anode of first diode D1, the cathode of first diode D1, processor and master
The binding site and 3.3V power electric connection of mechatronics, the signal receiving module and processor；The signal receiving module is used
Pressure difference between the anode and cathode of detection first diode D1, to parse the control signal of host transmission, and will control
Signal is sent to processor；The processor is electrically connected with slave load, it should be appreciated that slave load is that household is set
It is standby；The processor, for being controlled according to control signal slave load；One end and the one or two of the 4th capacitor C4
The cathode of pole pipe D1 is electrically connected, and the other end of the 4th capacitor C4 is electrically connected with host；It should be understood that host and power supply
Second terminals of equipment are electrically connected, and are achieved in the conducting in signal receiving circuit circuit.In the present embodiment, the power supply unit
It is powered by power cable to signal receiving circuit, the host is used to send control signal, institute to signal receiving circuit
It states processor and is all made of prior art realization, such as processor can be real using the microcontroller of model STM32F031K6U6
It is existing；In the process of running, signal receiving circuit directly passes through electrified cable and is electrically connected with host, and signal receiving circuit can directly lead to
The control signal for crossing the transmission of electrified cable receiving host avoids the destruction to existed building convenient for the intelligent regeneration of home equipment.
It should be noted that generating pressure between the cathode and anode of first diode D1 after host sends control signal
Difference, signal receiving module parses the control signal of host controller transmission by receiving this pressure difference, and will control signal
It is sent to processor, then processor controls slave load.It should be understood that being provided in each slave load
Drive module, drive module can be realized according to the difference of slave loadtype using the prior art, such as be when slave loads
When LED light, drive module can be realized using the LED drive chip of model BP1808A, at this point, when processor uses model
For STM32F031K6U6 microcontroller implementation when, 18 feet of processor are electrically connected with 3 feet of drive module.In the course of work
In, working condition of slave load, drive module receive electricity with corresponding signal where the drive module is used to detect it
Processor in road is connected, and processor controls the operation that slave loads by drive module, in addition when drive module detects
There is the processor that exception Shi Huixiang is connected and sends exception information in slave load.
Further, as shown in figure 4, the signal receiving module includes third transistor Q3, eleventh resistor R11,
12 resistance R12 and the 4th triode Q4；The base stage of the third transistor Q3 is electrically connected with the anode of first diode D1, sends out
Emitter-base bandgap grading is electrically connected with the cathode of first diode D1, collector passes sequentially through eleventh resistor R11 and twelfth resistor R12 and master
Mechatronics；The base stage of the 4th triode Q4 is electrically connected with the binding site of eleventh resistor R11 and twelfth resistor R12,
Emitter is electrically connected with host, collector is electrically connected with processor；The collector of the 4th triode Q4 and the knot of processor
Chalaza and 3.3V power electric connection.It should be noted that when processor is real using the microcontroller of model STM32F031K6U6
Now, 13 feet of processor are electrically connected with the collector of the 4th triode Q4.In addition, the third transistor Q3 is for detecting the
Pressure difference between the anode and cathode of one diode D1, third transistor Q3 change according to the pressure difference at the two poles of the earth first diode D1
The on off operating mode of itself, thus change the on off operating mode of the 4th triode Q4, the final electricity for changing the pin that is connected with processor
Flat height so that varying level parses the control signal of host controller transmission to processor based on the received, and controls slave
The working condition of load.Specifically, metal-oxide-semiconductor Q5 is N-type metal-oxide-semiconductor, when host controller does not send control signal, metal-oxide-semiconductor
Q5 conducting, the cathode voltage of first diode D1 are lower than anode voltage, third transistor Q3 cut-off；It is controlled when host controller is sent
When signal processed, metal-oxide-semiconductor Q5 cut-off, the cathode voltage of first diode D1 is higher than anode voltage, and third transistor Q3 is connected, and the 4th
Triode Q4 is connected therewith, to and send control signals to processor；Eleventh resistor R11 and twelfth resistor R12 rises
It is acted on to partial pressure.
Further, the signal receiving circuit further includes the tenth resistance R10 and thirteenth resistor R13；Tenth electricity
The both ends of resistance R10 are electrically connected with the base stage of the anode of first diode D1 and third transistor Q3 respectively；The thirteenth resistor
The both ends of R13 respectively with the base stage and 3.3V power electric connection of the 4th triode Q4.It should be understood that described includes the tenth electricity
Resistance R10 and thirteenth resistor R13 plays the role of current limliting.
Further, the signal receiving circuit further includes the first zener diode ZD1；First zener diode
ZD1 is arranged between the tenth resistance R10 and third transistor Q3, the anode and the tenth resistance of the first zener diode ZD1
R10 electrical connection, cathode are electrically connected with the base stage of third transistor Q3.It should be understood that the first zener diode ZD1 rises
To the effect for eliminating the clutter in power supply circuit.
Further, the signal receiving circuit further includes the second capacitor C2 and third capacitor C3, the second capacitor C2
Both ends be electrically connected respectively with the collector of the base stage of third transistor Q3, third transistor Q3；The two of the third capacitor C3
End respectively with the collector of the 4th triode Q4,3.3V power electric connection.It should be understood that the second capacitor C2 and third
Capacitor C3 is used to eliminate the High-frequency Interference in corresponding circuits.
Embodiment 2:
A kind of cascade bus control system, as shown in Figures 1 to 4, including power supply unit, host, at least one slave and extremely
Few slave load, the slave and slave load are arranged in a one-to-one correspondence；First terminals of the power supply unit respectively with
It is each that from mechatronics, the second terminals of the power supply unit are electrically connected with host, the host respectively with each slave, each
A slave load electrical connection；Each slave is electrically connected with a slave load respectively；The power supply unit, for passing through power supply
Cable is to the host, each slave and each slave load supplying；The host, for according to externally input
Control instruction sends control signal to each slave by the power cable between slave and host；Each it is described from
Machine, the control signal for being sent according to the host control the slave load being connected；Each institute
Slave is stated and include the signal receiving circuit as described in any one of embodiment 1, further includes current bypass circuit；The signal connects
Circuit is received, the control signal for sending according to the host controls the slave load being connected；It is described
Current bypass circuit, for eliminating the influence of leakage current and junction capacity to signal rising edge and failing edge in first diode D1,
Reduce the communication bit error rate.In the present embodiment, the master controller be can be implemented by using the prior art, such as master controller can use
The microcontroller implementation of model STM32F103VET6.
A kind of cascade bus signal receiving circuit provided in this embodiment, the first terminals and the host of power supply unit are electrically connected
Connect, the second terminals of power supply unit respectively in each slave current bypass circuit and signal receiving circuit be electrically connected, it is main
Machine respectively in each slave current bypass circuit and signal receiving circuit be electrically connected, signal in each slave receives electricity
Road be electrically connected with the load of slave respectively, power supply unit to the electric energy of each slave load transmission be required to by host with
Current bypass circuit and signal receiving circuit in corresponding slave, therefore host can be by the power supply that is connected with slave
Signal receiving circuit of the cable into each slave sends control signal, so that signal receiving circuit is according to control signal to connected
The slave load connect is controlled.At the same time, the current bypass circuit in each described slave and signal receiving circuit be simultaneously
Connection connection, current bypass circuit can eliminate leakage current in signal receiving circuit in first diode D1 and junction capacity on signal
The influence along failing edge is risen, avoids signal receiving circuit that from can not parsing correct signal.
It can be seen that the unified all slaves into circuit of host send control signal, due to the movement of host, so that for
The continuous state of electric current changes on electric wire cable, so that the identification information that corresponding slave loads is sent to signal receiving circuit
Interior, the signal receiving circuit in slave receives control signal and is parsed, if address information and this stapler machine in signal, i.e.,
Address information and the slave control slave load coincide, then respond the control instruction, then to the slave being connected load into
Row control can be realized using existing power cable and be controlled slave load in the process, total without individually laying
Line cable will not damage the wall or ground for having fitted up house, thus can be suitable for fitted up house carry out intelligence
It can household transformation.In addition, the current bypass circuit in slave can eliminate the electric leakage in signal receiving circuit in first diode D1
Stream and influence of the junction capacity to signal rising edge failing edge, avoid signal receiving circuit from parsing error signal, and it is accurate right to be conducive to
Slave load is controlled.
In the present embodiment, as shown in figure 4, the host includes metal-oxide-semiconductor Q5, TVS diode TVS1 and host controller, institute
The source electrode for stating metal-oxide-semiconductor Q5 is electrically connected with the anode of TVS diode TVS1, drain be electrically connected with the cathode of TVS diode TVS1, grid
Pole is electrically connected with host controller；The source electrode of the metal-oxide-semiconductor Q5 is electrically connected with the second terminals of power supply unit, the metal-oxide-semiconductor
The drain electrode of Q5 is electrically connected with the load of current bypass circuit, signal receiving circuit and slave respectively；The host controller is used for root
The on off operating mode of the metal-oxide-semiconductor Q5 is controlled according to the externally input control instruction, so that the voltage of the drain electrode of metal-oxide-semiconductor Q5 is in wave
Dynamic state, that is, change the voltage status of each slave input terminal, fluctuation voltage is processed into processor by the signal receiving circuit
The digital signal that can be identified.Specifically, when master controller can be real using the microcontroller of model STM32F103VET6
Now, 71 feet of master controller are electrically connected with the grid of metal-oxide-semiconductor Q5, and master controller is used to control the on-off of metal-oxide-semiconductor Q5, with to from
The signal receiving circuit of machine sends control signal, and when metal-oxide-semiconductor Q5 conducting, the signal receiving circuit of slave is connect with metal-oxide-semiconductor Q5
One end voltage be equal to power supply unit supply voltage Vin；When metal-oxide-semiconductor Q5 cut-off, the signal receiving circuit and MOS of slave
The supply voltage Vin that the voltage of one end of pipe Q5 connection is equal to power supply unit subtracts the voltage value of TVS diode TVS1 partial pressure；?
During this, since host controller sends control signal, on-off variation occurs for metal-oxide-semiconductor Q5, so that the two of first diode D1
End generates pressure difference, while the on off operating mode of metal-oxide-semiconductor Q5 influences the continuous state of electric current on power cable, and the signal of slave receives electricity
Road parses control signal further according to the pressure difference that the both ends of first diode D1 generate, to obtain host controller transmission
Signal is controlled, and changes the address information determined in control signal according to the pressure difference at the 4th both ends capacitor C4, then processor is true
Recognize the slave load whether this address information controls with it to coincide, if address information and slave load coincide, controller is to it
The slave load of connection is controlled, to realize host controller to signal receiving circuit sends control signal, signal receives
Circuit controls the effect of slave load by this control signal again.
The working principle of host and signal receiving circuit is illustrated below.When processor uses model
When the microcontroller implementation of STM32F031K6U6,13 feet of processor are electrically connected with the collector of the 4th triode Q4.In master control
During device processed sends control signal, control metal-oxide-semiconductor Q5 on-off, since the deadline of metal-oxide-semiconductor Q5 is very short, the 4th electricity
The energy for holding C4 storage prevents the anode voltage of first diode D1 from being mutated, and the third transistor Q3 is for detecting first
Pressure difference between the anode and cathode of diode D1, third transistor Q3 change certainly according to the pressure difference at the two poles of the earth first diode D1
The on off operating mode of body, thus change the on off operating mode of the 4th triode Q4, the final level for changing the pin that is connected with processor
Just, so that processor varying level parses the control signal of host controller transmission based on the received, and it is negative to control slave
The working condition of load.It should be understood that being provided with drive module in each slave load, drive module can be negative according to slave
The difference for carrying type, is realized using the prior art, such as when slave load is LED light, drive module can use model
The LED drive chip of BP1808A is realized, at this point, when processor uses the microcontroller implementation of model STM32F031K6U6
When, 18 feet of processor are electrically connected with 3 feet of drive module.Specifically, metal-oxide-semiconductor Q5 is N-type metal-oxide-semiconductor, works as host controller
When not sending control signal, metal-oxide-semiconductor Q5 conducting, the cathode of first diode D1 is low level, third transistor Q3 cut-off；Work as master
When machine controller sends control signal, the cathode of metal-oxide-semiconductor Q5 cut-off, first diode D1 is high level, and third transistor Q3 is led
Logical, the 4th triode Q4 is connected therewith, to and send control signals to processor；The electricity of eleventh resistor R11 and the 12nd
Resistance R12 plays the role of partial pressure.During the work time, the working condition of slave load where the drive module is used to detect it,
Drive module is connected with the processor in corresponding signal receiving circuit, and processor controls slave by drive module and loads
Operation, in addition when drive module detect slave load occur exception Shi Huixiang be connected processor transmission exception information.
Further, as shown in figure 4, the current bypass circuit includes first resistor R1, second resistance R2, the one or three pole
Pipe Q1 and the second triode Q2；One end of the first resistor R1 is electrically connected with the first terminals of power supply unit, and described first
The other end of resistance R1 is electrically connected by second resistance R2 with the drain electrode of metal-oxide-semiconductor Q5；The base stage of the first triode Q1 and the
One resistance R1 and second resistance R2 binding site electrical connection, collector be electrically connected with the base stage of the second triode Q2, emitter and
The drain electrode of metal-oxide-semiconductor Q5 is electrically connected；The collector of the second triode Q2 is electrically connected with the first terminals of power supply unit, emits
Pole is electrically connected with the drain electrode of metal-oxide-semiconductor Q5.It should be noted that sending control in signal receiving circuit of the host controller into slave
When signal processed, due to circuit self-characteristic, the inside of first diode D1 can have parasitic capacitance and Leakage Current, and work as host
When the control signal rate that controller is sent is higher, which will affect the slope of signal rising edge and failing edge, finally
Cause processor that can not parse correctly control signal；Current bypass circuit reduces knot electricity for consuming leakage current
Hold the influence to control signal.Specifically, first resistor R1, second resistance R2 and the first triode Q1 composition voltage judgement electricity
Road, when host controller does not send control signal, metal-oxide-semiconductor Q5 conducting, the transmitting extremely low level of the first triode Q1, first
Triode Q1 is connected and drags down the voltage of the base stage of the second triode Q2, so that becoming smaller two by the electric current that the second triode Q2 flows through
Reduce return loss；When host controller sends control signal, metal-oxide-semiconductor Q5 cut-off, the first triode Q1 cut-off, the two or three pole
The voltage of the base stage of pipe Q2 increases, so that being increased by the electric current that the second triode Q2 flows through, to accelerate first diode D1's
The voltage falling of anode to consume the leakage current of first diode D1, while reducing influence of the junction capacity to control signal,
The slope of the rising edge and failing edge that finally make the control signal that processor parses is more precipitous, control signal more subject to
Really.
Further, the current bypass circuit further includes the 4th resistance R4 and the second zener diode ZD2；Described second
The anode of zener diode ZD2 is electrically connected with the drain electrode of metal-oxide-semiconductor Q5, cathode connects by the first of the 4th resistance R4 and power supply unit
Line end electrical connection, the binding site of the second zener diode ZD2 and the 4th resistance the R4 current collection with the first triode Q1 respectively
The base stage electrical connection of pole, the second triode Q2.It should be understood that the 4th resistance R4 primarily serves metering function, it is described
4th resistance R4 and the second zener diode ZD2 plays the role of protecting circuit jointly.
Further, the current bypass circuit further includes 3rd resistor R3, the 5th resistance R5, the 6th resistance R6 and first
Capacitor C1；The both ends of the 3rd resistor R3 collector with the cathode of the second zener diode ZD2, the first triode Q1 respectively
Electrical connection；The both ends of the 5th resistance R5 are electric with the first terminals of the collector of the second triode Q2, power supply unit respectively
Connection；The both ends of the 6th resistance R6 are electrically connected with the drain electrode of the emitter, metal-oxide-semiconductor Q5 of the second triode Q2 respectively；It is described
The both ends of first capacitor C1 are electrically connected with the drain electrode of the binding site of first resistor R1 and second resistance R2, metal-oxide-semiconductor Q5 respectively.It should
Understand, the 3rd resistor R3, the 5th resistance R5 and the 6th resistance R6 primarily serve metering function, jointly to protect electricity
Component is without damage in road.In current bypass circuit, the 4th resistance R4, the second zener diode ZD2, the two or three pole
Pipe Q2, the 5th resistance R5 and the 6th resistance R6 constitute constant-current source circuit；The first resistor R1, second resistance R2, the one or three
Pole pipe Q1 and 3rd resistor R3 forms voltage decision circuitry；The high frequency that the first capacitor C1 is used to eliminate in corresponding circuits is dry
It disturbs.
The present invention is not limited to above-mentioned optional embodiment, anyone can show that other are each under the inspiration of the present invention
The product of kind form.Above-mentioned specific embodiment should not be understood the limitation of pairs of protection scope of the present invention, protection of the invention
Range should be subject to be defined in claims, and specification can be used for interpreting the claims.
Claims (10)
1. a kind of cascade bus signal receiving circuit, it is characterised in that: be set in power cable, including first diode
(D1), signal receiving module, processor and the 4th capacitor (C4)；The signal receiving module respectively with first diode (D1)
Anode, the cathode of first diode (D1) and processor electrical connection, the binding site of the signal receiving module and processor with
3.3V power electric connection；The signal receiving module, the pressure difference between anode and cathode for detecting first diode (D1),
To parse control signal, and send control signals to processor；The processor is electrically connected with slave load；The processing
Device, for being controlled according to control signal slave load；One end of 4th capacitor (C4) and first diode (D1)
Cathode electrical connection, the other end of the 4th capacitor (C4) is electrically connected with signal receiving module.
2. a kind of cascade bus signal receiving circuit according to claim 1, it is characterised in that: the signal receiving module
Including third transistor (Q3), eleventh resistor (R11), twelfth resistor (R12) and the 4th triode (Q4)；Described 3rd 3
The base stage of pole pipe (Q3) is electrically connected with the anode of first diode (D1), the cathode of emitter and first diode (D1) is electrically connected
It connects, collector passes sequentially through eleventh resistor (R11) and twelfth resistor (R12) is electrically connected with the 4th capacitor (C4)；Described
The base stage of four triodes (Q4) is electrically connected with the binding site of eleventh resistor (R11) and twelfth resistor (R12), emitter and
Four capacitors (C4) electrical connection, collector are electrically connected with processor；The collector of 4th triode (Q4) and the knot of processor
Chalaza and 3.3V power electric connection.
3. a kind of cascade bus signal receiving circuit according to claim 2, it is characterised in that: the signal receiving circuit
It further include the tenth resistance (R10) and thirteenth resistor (R13)；The both ends of tenth resistance (R10) respectively with first diode
(D1) the base stage electrical connection of anode and third transistor (Q3)；The both ends of the thirteenth resistor (R13) are respectively with the four or three
The base stage and 3.3V power electric connection of pole pipe (Q4).
4. a kind of cascade bus signal receiving circuit according to claim 3, it is characterised in that: the signal receiving circuit
It further include the first zener diode (ZD1)；First zener diode (ZD1) is arranged in the tenth resistance (R10) and the three or three
Between pole pipe (Q3), the anode of first zener diode (ZD1) is electrically connected with the tenth resistance (R10), cathode and the three or three
The base stage of pole pipe (Q3) is electrically connected.
5. a kind of cascade bus signal receiving circuit according to claim 4, it is characterised in that: the signal receiving circuit
Further include the second capacitor (C2) and third capacitor (C3), the both ends of second capacitor (C2) respectively with third transistor (Q3)
The collector electrical connection of base stage, third transistor (Q3)；The both ends of the third capacitor (C3) respectively with the 4th triode (Q4)
Collector, 3.3V power electric connection.
6. a kind of cascade bus control system, it is characterised in that: including power supply unit, host, at least one slave and at least one
A slave load, the slave and slave load are arranged in a one-to-one correspondence；First terminals of the power supply unit respectively with it is each
From mechatronics, the second terminals of the power supply unit are electrically connected with host, the host respectively with each slave, Ge Gecong
Machine load electrical connection；Each slave is electrically connected with a slave load respectively；The power supply unit, for passing through power cable
To the host, each slave and each slave load supplying；The host, for according to externally input control
Instruction sends control signal to each slave by the power cable between slave and host；Each described slave is used
In the control signal sent according to the host, the slave load being connected is controlled；Each it is described from
Machine includes such as signal receiving circuit described in any one of claim 1 to 5, further includes current bypass circuit；The signal connects
Circuit is received, the control signal for sending according to the host controls the slave load being connected；It is described
Current bypass circuit, for eliminating in first diode (D1) leakage current and junction capacity to the shadow of signal rising edge and failing edge
It rings, reduces the communication bit error rate.
7. a kind of cascade bus control system according to claim 6, it is characterised in that: the host includes metal-oxide-semiconductor
(Q5), TVS diode (TVS1) and host controller, the source electrode of the metal-oxide-semiconductor (Q5) and the anode electricity of TVS diode (TVS1)
Connection, drain electrode is electrically connected with the cathode of TVS diode (TVS1), grid is electrically connected with host controller；The metal-oxide-semiconductor (Q5)
Source electrode is electrically connected with the second terminals of power supply unit, and the drain electrode of the metal-oxide-semiconductor (Q5) connects with current bypass circuit, signal respectively
Receive circuit and slave load electrical connection；The host controller, for according to the externally input control instruction control
The on off operating mode of metal-oxide-semiconductor (Q5), so that the voltage of the drain electrode of metal-oxide-semiconductor (Q5) is in fluctuation status, the signal receiving circuit is by wave
Dynamic voltage is processed into the digital signal that processor can identify.
8. a kind of cascade bus control system according to claim 7, it is characterised in that: the current bypass circuit includes
First resistor (R1), second resistance (R2), the first triode (Q1) and the second triode (Q2)；The one of the first resistor (R1)
End is electrically connected with the first terminals of power supply unit, and the other end of the first resistor (R1) passes through second resistance (R2) and MOS
Manage the drain electrode electrical connection of (Q5)；The combination of the base stage and first resistor (R1) and second resistance (R2) of first triode (Q1)
Point electrical connection, collector is electrically connected with the base stage of the second triode (Q2), emitter is electrically connected with the drain electrode of metal-oxide-semiconductor (Q5)；Institute
The collector for stating the second triode (Q2) is electrically connected with the first terminals of power supply unit, the drain electrode of emitter and metal-oxide-semiconductor (Q5)
Electrical connection.
9. a kind of cascade bus control system according to claim 8, it is characterised in that: the current bypass circuit also wraps
Include the 4th resistance (R4) and the second zener diode (ZD2)；The anode and metal-oxide-semiconductor (Q5) of second zener diode (ZD2)
Drain electrode electrical connection, cathode be electrically connected with the first terminals of power supply unit by the 4th resistance (R4), second pressure stabilizing two
The binding site of pole pipe (ZD2) and the 4th resistance (R4) respectively with the collector of the first triode (Q1), the second triode (Q2)
Base stage electrical connection.
10. a kind of cascade bus control system according to claim 9, it is characterised in that: the current bypass circuit is also
Including 3rd resistor (R3), the 5th resistance (R5), the 6th resistance (R6) and first capacitor (C1)；The two of the 3rd resistor (R3)
End is electrically connected with the collector of the cathode of the second zener diode (ZD2), the first triode (Q1) respectively；5th resistance
(R5) both ends are electrically connected with the first terminals of the collector of the second triode (Q2), power supply unit respectively；6th electricity
The both ends of resistance (R6) are electrically connected with the drain electrode of the emitter of the second triode (Q2), metal-oxide-semiconductor (Q5) respectively；The first capacitor
(C1) both ends are electrically connected with the drain electrode of the binding site of first resistor (R1) and second resistance (R2), metal-oxide-semiconductor (Q5) respectively.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811505454.9A CN109391277A (en) | 2018-12-10 | 2018-12-10 | A kind of cascade bus signal receiving circuit and control system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811505454.9A CN109391277A (en) | 2018-12-10 | 2018-12-10 | A kind of cascade bus signal receiving circuit and control system |
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| CN109391277A true CN109391277A (en) | 2019-02-26 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811505454.9A Pending CN109391277A (en) | 2018-12-10 | 2018-12-10 | A kind of cascade bus signal receiving circuit and control system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114442723A (en) * | 2022-02-14 | 2022-05-06 | 昀迈(上海)物联网科技有限公司 | Cascade signal differential pressure correction, self-control standby power supply and protection circuit |
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